2010-08-14 16:23:56 +03:00
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# EESchema Netlist Version 1.1 created Sat 14 Aug 2010 08:20:44 AM COT
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2010-07-24 14:58:53 +03:00
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2010-08-14 16:23:56 +03:00
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( /4C4227FE/4C65D681 0603 C74 1uF {Lib=CAP}
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( 1 +3.3V )
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( 2 GND )
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)
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( /4C4227FE/4C65D67C 0402 C73 100nF {Lib=CAP}
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( 1 +3.3V )
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( 2 GND )
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)
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( /4C4227FE/4C65D661 0402 C72 100nF {Lib=CAP}
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( 1 +3.3V )
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( 2 GND )
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)
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( /4C4227FE/4C65A75D $noname U8 X25X64MB {Lib=X25X64MB}
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( 1 /FPGA_Spartan6/PROG_CSO )
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( 2 /FPGA_Spartan6/PROG_MISO1 )
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( 3 /FPGA_Spartan6/PROG_MISO2 )
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( 4 GND )
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( 5 /FPGA_Spartan6/PROG_MISO0 )
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( 6 /FPGA_Spartan6/PROG_CCLK )
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( 7 /FPGA_Spartan6/PROG_MISO3 )
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( 8 VCCO2 )
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)
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( /4C4227FE/4B76F5E2 $noname J1 MICROSD {Lib=MICROSD}
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2010-08-13 17:27:10 +03:00
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( CASE GND )
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2010-08-14 16:23:56 +03:00
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( COM GND )
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( CD ? )
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( 1 /Non_volatile_memories/SD_DAT2 )
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( 2 /FPGA_Spartan6/SD_DAT3 )
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( 3 /FPGA_Spartan6/SD_CMD )
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( 4 ? )
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( 5 /FPGA_Spartan6/SD_CLK )
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( 6 GND )
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( 7 /Non_volatile_memories/SD_DAT0 )
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( 8 /FPGA_Spartan6/SD_DAT1 )
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)
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( /4C4227FE/4B76F108 $noname U5 NAND {Lib=HY27UG088G5M}
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( 1 ? )
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( 2 ? )
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( 3 ? )
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( 4 ? )
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( 5 ? )
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( 6 /FPGA_Spartan6/NF_RNB )
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( 7 /FPGA_Spartan6/NF_RNB )
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( 8 /FPGA_Spartan6/NF_RE_N )
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( 9 /FPGA_Spartan6/NF_CS1_N )
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( 10 ? )
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( 11 ? )
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( 12 3.3V )
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( 13 GND )
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( 14 ? )
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( 15 ? )
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( 16 /FPGA_Spartan6/NF_CLE )
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( 17 /FPGA_Spartan6/NF_ALE )
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( 18 /Non_volatile_memories/NF_WE_N )
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( 19 3.3V )
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( 20 ? )
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( 21 ? )
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( 22 ? )
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( 23 ? )
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( 24 ? )
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( 25 ? )
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( 26 ? )
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( 27 ? )
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( 28 ? )
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( 29 /FPGA_Spartan6/NF_D0 )
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( 30 /Non_volatile_memories/NF_D1 )
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( 31 /Non_volatile_memories/NF_D2 )
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( 32 /Non_volatile_memories/NF_D3 )
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( 33 ? )
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( 34 ? )
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( 35 ? )
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( 36 GND )
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( 37 +3.3V )
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( 38 ? )
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( 39 ? )
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( 40 ? )
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( 41 /Non_volatile_memories/NF_D4 )
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( 42 /Non_volatile_memories/NF_D5 )
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( 43 /FPGA_Spartan6/NF_D6 )
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( 44 /FPGA_Spartan6/NF_D7 )
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( 45 ? )
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( 46 ? )
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( 47 ? )
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( 48 ? )
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)
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( /4C5F1EDC/4C6552BF $noname U7 MIC2550AYTS {Lib=MIC2550AYTS}
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( 1 +2.5V )
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( 2 ? )
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( 3 ? )
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( 4 ? )
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( 5 ? )
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( 7 GND )
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( 8 GND )
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( 9 ? )
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( 10 N-000355 )
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( 11 N-000350 )
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( 12 3.3V )
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( 14 3.3V )
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)
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( /4C5F1EDC/4C6552BE $noname C35 1uF {Lib=C}
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( 1 N-000356 )
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( 2 GND )
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)
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( /4C5F1EDC/4C6552BD $noname C36 1uF {Lib=C}
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( 1 N-000356 )
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( 2 GND )
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)
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( /4C5F1EDC/4C6552BC $noname C37 470nF {Lib=C}
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( 1 N-000356 )
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( 2 GND )
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)
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( /4C5F1EDC/4C6552BA $noname F2 MICROSMD075F {Lib=MICROSMD075F}
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( 1 N-000346 )
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( 2 +5V )
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)
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( /4C5F1EDC/4C6552B9 $noname V4 V0402MHS03 {Lib=V0402MHS03}
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( 1 N-000355 )
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( 2 GND )
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)
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( /4C5F1EDC/4C6552B8 $noname V3 V0402MHS03 {Lib=V0402MHS03}
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( 1 N-000350 )
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( 2 GND )
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)
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( /4C5F1EDC/4C6552B7 $noname C38 4.7nF {Lib=C}
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( 1 N-000357 )
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( 2 GND )
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)
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( /4C5F1EDC/4C6552B6 $noname R15 1M {Lib=R}
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( 1 N-000357 )
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( 2 GND )
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)
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( /4C5F1EDC/4C6552B1 0603 L7 FB {Lib=INDUCTOR}
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( 1 ? )
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( 2 GND )
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)
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( /4C5F1EDC/4C6552B0 0603 L6 FB {Lib=INDUCTOR}
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( 1 N-000346 )
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( 2 ? )
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)
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( /4C5F1EDC/4C63F252 0603 L4 FB {Lib=INDUCTOR}
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( 1 N-000359 )
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( 2 N-000358 )
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)
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( /4C5F1EDC/4C63F248 0603 L5 FB {Lib=INDUCTOR}
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( 1 N-000354 )
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( 2 GND )
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)
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( /4C5F1EDC/4C5F2D27 $noname R10 1M {Lib=R}
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( 1 N-000343 )
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( 2 GND )
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)
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( /4C5F1EDC/4C5F2D1E $noname C16 4.7nF {Lib=C}
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( 1 N-000343 )
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( 2 GND )
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)
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( /4C5F1EDC/4C5F2CA7 $noname V1 V0402MHS03 {Lib=V0402MHS03}
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( 1 N-000361 )
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( 2 GND )
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)
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( /4C5F1EDC/4C5F2CA3 $noname V2 V0402MHS03 {Lib=V0402MHS03}
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( 1 N-000342 )
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( 2 GND )
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)
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( /4C5F1EDC/4C5F2B55 $noname F1 MICROSMD075F {Lib=MICROSMD075F}
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( 1 N-000359 )
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( 2 +5V )
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)
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( /4C5F1EDC/4C5F23DD $noname J5 USB-48204-0001 {Lib=USB-48204-0001}
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( S1 N-000343 )
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( S2 N-000343 )
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( S3 N-000343 )
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( S4 N-000343 )
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( 1 N-000358 )
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( 2 N-000342 )
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( 3 N-000361 )
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( 4 N-000354 )
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)
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( /4C5F1EDC/4C5F2039 $noname C15 470nF {Lib=C}
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( 1 N-000360 )
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( 2 GND )
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)
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( /4C5F1EDC/4C5F2037 $noname C14 1uF {Lib=C}
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( 1 N-000360 )
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( 2 GND )
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)
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( /4C5F1EDC/4C5F2033 $noname C13 1uF {Lib=C}
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( 1 N-000360 )
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( 2 GND )
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)
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( /4C5F1EDC/4C5F2025 $noname U6 MIC2550AYTS {Lib=MIC2550AYTS}
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( 1 +2.5V )
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( 2 /USB/USBA_SPD )
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( 3 /FPGA_Spartan6/USBA_RCV )
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( 4 /USB/USBA_VP )
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( 5 /USB/USBA_VM )
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( 7 GND )
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( 8 GND )
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( 9 /FPGA_Spartan6/USBA_OE_N )
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( 10 N-000342 )
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( 11 N-000361 )
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( 12 3.3V )
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( 14 3.3V )
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)
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( /4C431A63/4C656D9D $noname C66 470nF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656D9A $noname C63 470nF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656D99 $noname C60 470nF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656D98 $noname C57 4.7uF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656D97 $noname C54 100uF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656D53 $noname C69 470nF {Lib=C}
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( 1 VCCO2 )
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( 2 GND )
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)
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( /4C431A63/4C656D49 $noname C67 470nF {Lib=C}
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( 1 VCCO2 )
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( 2 GND )
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)
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( /4C431A63/4C656D46 $noname C64 470nF {Lib=C}
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( 1 VCCO2 )
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( 2 GND )
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)
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( /4C431A63/4C656D45 $noname C61 470nF {Lib=C}
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( 1 VCCO2 )
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( 2 GND )
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)
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( /4C431A63/4C656D44 $noname C58 4.7uF {Lib=C}
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( 1 VCCO2 )
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( 2 GND )
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)
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( /4C431A63/4C656D43 $noname C55 100uF {Lib=C}
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( 1 VCCO2 )
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( 2 GND )
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)
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( /4C431A63/4C656D08 $noname C68 470nF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656CFC $noname C65 470nF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656CFB $noname C62 470nF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656CFA $noname C59 4.7uF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656CF9 $noname C56 100uF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656CBB $noname C50 470nF {Lib=C}
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( 1 +3.3V )
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( 2 GND )
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)
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( /4C431A63/4C656CBA $noname C47 470nF {Lib=C}
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( 1 +3.3V )
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( 2 GND )
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)
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( /4C431A63/4C656CB9 $noname C44 4.7uF {Lib=C}
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( 1 +3.3V )
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( 2 GND )
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)
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( /4C431A63/4C656CB7 $noname C41 100uF {Lib=C}
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( 1 +3.3V )
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( 2 GND )
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)
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( /4C431A63/4C656C49 $noname C53 470nF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656C27 $noname C51 470nF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656C24 $noname C49 470nF {Lib=C}
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( 1 +2.5V )
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( 2 GND )
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)
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( /4C431A63/4C656C16 $noname C46 4.7uF {Lib=C}
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( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C431A63/4C656BFA $noname C52 470nF {Lib=C}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C431A63/4C656BF9 $noname C43 4.7uF {Lib=C}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C431A63/4C656BF8 $noname C40 100uF {Lib=C}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C431A63/4C656AC2 $noname C48 470nF {Lib=C}
|
|
|
|
|
( 1 +1.2V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C431A63/4C656AC0 $noname C45 470nF {Lib=C}
|
|
|
|
|
( 1 +1.2V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C431A63/4C656ABD $noname C42 4.7uF {Lib=C}
|
|
|
|
|
( 1 +1.2V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C431A63/4C656A80 $noname C39 100uF {Lib=C}
|
|
|
|
|
( 1 +1.2V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C431A63/4C431E53 $noname U1 XC6SLX45FGG484 {Lib=XC6SLX45FGG484}
|
|
|
|
|
( H8 ? )
|
|
|
|
|
( P7 ? )
|
|
|
|
|
( N7 ? )
|
|
|
|
|
( M7 ? )
|
|
|
|
|
( L7 +2.5V )
|
|
|
|
|
( K7 ? )
|
|
|
|
|
( J7 ? )
|
|
|
|
|
( G7 ? )
|
|
|
|
|
( F7 ? )
|
|
|
|
|
( P6 ? )
|
|
|
|
|
( N6 ? )
|
|
|
|
|
( M6 ? )
|
|
|
|
|
( L6 ? )
|
|
|
|
|
( K6 /FPGA_Spartan6/M0_A3 )
|
|
|
|
|
( J6 ? )
|
|
|
|
|
( H6 /FPGA_Spartan6/M0_A7 )
|
|
|
|
|
( G6 ? )
|
|
|
|
|
( F6 +2.5V )
|
|
|
|
|
( E6 ? )
|
|
|
|
|
( U5 +2.5V )
|
|
|
|
|
( P5 ? )
|
|
|
|
|
( N5 +2.5V )
|
|
|
|
|
( M5 ? )
|
|
|
|
|
( K5 /FPGA_Spartan6/M0_RAS# )
|
|
|
|
|
( J5 +2.5V )
|
|
|
|
|
( H5 /DDR_Banks/M0_A2 )
|
|
|
|
|
( F5 ? )
|
|
|
|
|
( E5 ? )
|
|
|
|
|
( D5 ? )
|
|
|
|
|
( U4 ? )
|
|
|
|
|
( K21 /FPGA_Spartan6/M1_DQ6 )
|
|
|
|
|
( H21 /DDR_Banks/M1_RAS# )
|
|
|
|
|
( G21 +2.5V )
|
|
|
|
|
( F21 /DDR_Banks/M1_A0 )
|
|
|
|
|
( D21 /DDR_Banks/M1_CKE )
|
|
|
|
|
( C21 +2.5V )
|
|
|
|
|
( B21 ? )
|
|
|
|
|
( A21 ? )
|
|
|
|
|
( W20 ? )
|
|
|
|
|
( V20 ? )
|
|
|
|
|
( U20 /FPGA_Spartan6/M1_DQ12 )
|
|
|
|
|
( T20 ? )
|
|
|
|
|
( R20 /DDR_Banks/M1_DQ10 )
|
|
|
|
|
( P20 ? )
|
|
|
|
|
( N20 /FPGA_Spartan6/M1_DQ0 )
|
|
|
|
|
( M20 /DDR_Banks/M1_UDM )
|
|
|
|
|
( L20 /FPGA_Spartan6/M1_LDQS )
|
|
|
|
|
( K20 /DDR_Banks/M1_A5 )
|
|
|
|
|
( J20 /DDR_Banks/M1_DQ4 )
|
|
|
|
|
( H20 /FPGA_Spartan6/M1_CLK )
|
|
|
|
|
( G20 /FPGA_Spartan6/M1_A3 )
|
|
|
|
|
( F20 /FPGA_Spartan6/M1_A4 )
|
|
|
|
|
( E20 /FPGA_Spartan6/M1_A7 )
|
|
|
|
|
( D20 ? )
|
|
|
|
|
( C20 /FPGA_Spartan6/M1_A8 )
|
|
|
|
|
( B20 ? )
|
|
|
|
|
( A20 ? )
|
|
|
|
|
( P8 ? )
|
|
|
|
|
( M8 ? )
|
|
|
|
|
( K8 ? )
|
|
|
|
|
( Y2 ? )
|
|
|
|
|
( W2 +2.5V )
|
|
|
|
|
( V2 /FPGA_Spartan6/M0_DQ14 )
|
|
|
|
|
( T2 /DDR_Banks/M0_UDQS )
|
|
|
|
|
( R2 +2.5V )
|
|
|
|
|
( P2 /FPGA_Spartan6/M0_DQ8 )
|
|
|
|
|
( M2 /FPGA_Spartan6/M0_DQ2 )
|
|
|
|
|
( L2 +2.5V )
|
|
|
|
|
( K2 /FPGA_Spartan6/M0_DQ6 )
|
|
|
|
|
( H2 /FPGA_Spartan6/M0_A0 )
|
|
|
|
|
( G2 +2.5V )
|
|
|
|
|
( F2 /DDR_Banks/M0_WE# )
|
|
|
|
|
( D2 /DDR_Banks/M0_CKE )
|
|
|
|
|
( C2 +2.5V )
|
|
|
|
|
( B2 ? )
|
|
|
|
|
( A2 ? )
|
|
|
|
|
( Y1 ? )
|
|
|
|
|
( W1 ? )
|
|
|
|
|
( V1 /DDR_Banks/M0_DQ15 )
|
|
|
|
|
( U1 /DDR_Banks/M0_DQ13 )
|
|
|
|
|
( T1 ? )
|
|
|
|
|
( R1 /DDR_Banks/M0_DQ11 )
|
|
|
|
|
( P1 /FPGA_Spartan6/M0_DQ9 )
|
|
|
|
|
( N1 /FPGA_Spartan6/M0_DQ1 )
|
|
|
|
|
( M1 /DDR_Banks/M0_DQ3 )
|
|
|
|
|
( L1 ? )
|
|
|
|
|
( K1 /DDR_Banks/M0_DQ7 )
|
|
|
|
|
( J1 /FPGA_Spartan6/M0_DQ5 )
|
|
|
|
|
( H1 /DDR_Banks/M0_A1 )
|
|
|
|
|
( G1 /FPGA_Spartan6/M0_BA1 )
|
|
|
|
|
( T4 ? )
|
|
|
|
|
( R4 ? )
|
|
|
|
|
( P4 ? )
|
|
|
|
|
( N4 ? )
|
|
|
|
|
( M4 ? )
|
|
|
|
|
( L4 /FPGA_Spartan6/M0_LDM )
|
|
|
|
|
( K4 /FPGA_Spartan6/M0_CAS# )
|
|
|
|
|
( J4 /FPGA_Spartan6/M0_A6 )
|
|
|
|
|
( H4 /DDR_Banks/M0_CLK )
|
|
|
|
|
( G4 /FPGA_Spartan6/M0_A10 )
|
|
|
|
|
( F4 +2.5V )
|
|
|
|
|
( E4 ? )
|
|
|
|
|
( C4 ? )
|
|
|
|
|
( W3 ? )
|
|
|
|
|
( V3 ? )
|
|
|
|
|
( U3 /FPGA_Spartan6/M0_DQ12 )
|
|
|
|
|
( T3 ? )
|
|
|
|
|
( R3 /DDR_Banks/M0_DQ10 )
|
|
|
|
|
( P3 ? )
|
|
|
|
|
( N3 /DDR_Banks/M0_DQ0 )
|
|
|
|
|
( M3 /DDR_Banks/M0_UDM )
|
|
|
|
|
( L3 /FPGA_Spartan6/M0_LDQS )
|
|
|
|
|
( K3 /FPGA_Spartan6/M0_A5 )
|
|
|
|
|
( J3 /DDR_Banks/M0_DQ4 )
|
|
|
|
|
( H3 /DDR_Banks/M0_CLK# )
|
|
|
|
|
( G3 /DDR_Banks/M0_BA0 )
|
|
|
|
|
( F3 /FPGA_Spartan6/M0_A4 )
|
|
|
|
|
( E3 /FPGA_Spartan6/M0_A8 )
|
|
|
|
|
( D3 ? )
|
|
|
|
|
( C3 ? )
|
|
|
|
|
( B3 ? )
|
|
|
|
|
( G10 +3.3V )
|
|
|
|
|
( D10 /Ethernet_Phy/ETH_MDC )
|
|
|
|
|
( C10 /FPGA_Spartan6/ETH_CRS )
|
|
|
|
|
( B10 /Ethernet_Phy/ETH_COL )
|
|
|
|
|
( A10 /FPGA_Spartan6/ETH_INT )
|
|
|
|
|
( E9 +3.3V )
|
|
|
|
|
( D9 /Ethernet_Phy/ETH_TXD0 )
|
|
|
|
|
( C9 /FPGA_Spartan6/ETH_TXD2 )
|
|
|
|
|
( A9 /Ethernet_Phy/ETH_TXD3 )
|
|
|
|
|
( D8 /Ethernet_Phy/ETH_RXC )
|
|
|
|
|
( C8 /Ethernet_Phy/ETH_TXD1 )
|
|
|
|
|
( B8 /FPGA_Spartan6/ETH_TXER )
|
|
|
|
|
( A8 /FPGA_Spartan6/ETH_TXEN )
|
|
|
|
|
( D7 /FPGA_Spartan6/ETH_TXC )
|
|
|
|
|
( C7 /FPGA_Spartan6/ETH_RXDV )
|
|
|
|
|
( B7 +3.3V )
|
|
|
|
|
( A7 /Ethernet_Phy/ETH_RXER )
|
|
|
|
|
( D6 /FPGA_Spartan6/ETH_RXD3 )
|
|
|
|
|
( C6 /Ethernet_Phy/ETH_RXD2 )
|
|
|
|
|
( B6 /Ethernet_Phy/ETH_RXD1 )
|
|
|
|
|
( A6 /Ethernet_Phy/ETH_RXD0 )
|
|
|
|
|
( C5 /Ethernet_Phy/ETH_MDIO )
|
|
|
|
|
( A5 /FPGA_Spartan6/ETH_RESET_N )
|
|
|
|
|
( B4 +3.3V )
|
|
|
|
|
( A4 /Ethernet_Phy/ETH_CLK )
|
|
|
|
|
( A3 ? )
|
|
|
|
|
( U19 ? )
|
|
|
|
|
( T19 ? )
|
|
|
|
|
( R19 /USB/USBA_SPD )
|
|
|
|
|
( P19 ? )
|
|
|
|
|
( B19 +3.3V )
|
|
|
|
|
( B18 /FPGA_Spartan6/SD_DAT1 )
|
|
|
|
|
( A18 /Non_volatile_memories/SD_DAT0 )
|
|
|
|
|
( E17 +3.3V )
|
|
|
|
|
( D17 /FPGA_Spartan6/SD_CMD )
|
|
|
|
|
( C17 /FPGA_Spartan6/SD_DAT3 )
|
|
|
|
|
( A17 /Non_volatile_memories/SD_DAT2 )
|
|
|
|
|
( E16 /FPGA_Spartan6/SD_CLK )
|
|
|
|
|
( C16 /FPGA_Spartan6/NF_CS1_N )
|
|
|
|
|
( B16 /FPGA_Spartan6/NF_RE_N )
|
|
|
|
|
( A16 /FPGA_Spartan6/NF_RNB )
|
|
|
|
|
( D15 /FPGA_Spartan6/NF_CLE )
|
|
|
|
|
( C15 /Non_volatile_memories/NF_WE_N )
|
|
|
|
|
( B15 +3.3V )
|
|
|
|
|
( A15 /FPGA_Spartan6/NF_ALE )
|
|
|
|
|
( G14 +3.3V )
|
|
|
|
|
( D14 /FPGA_Spartan6/NF_D0 )
|
|
|
|
|
( C14 ? )
|
|
|
|
|
( B14 ? )
|
|
|
|
|
( A14 ? )
|
|
|
|
|
( E13 +3.3V )
|
|
|
|
|
( C13 /Non_volatile_memories/NF_D2 )
|
|
|
|
|
( A13 /Non_volatile_memories/NF_D1 )
|
|
|
|
|
( C12 /Non_volatile_memories/NF_D5 )
|
|
|
|
|
( B12 /Non_volatile_memories/NF_D4 )
|
|
|
|
|
( A12 /Non_volatile_memories/NF_D3 )
|
|
|
|
|
( D11 /FPGA_Spartan6/NF_D6 )
|
|
|
|
|
( C11 ? )
|
|
|
|
|
( B11 +3.3V )
|
|
|
|
|
( A11 /FPGA_Spartan6/NF_D7 )
|
|
|
|
|
( J16 ? )
|
|
|
|
|
( H16 ? )
|
|
|
|
|
( G16 ? )
|
|
|
|
|
( F16 ? )
|
|
|
|
|
( L15 ? )
|
|
|
|
|
( W22 ? )
|
|
|
|
|
( V22 /FPGA_Spartan6/M1_DQ15 )
|
|
|
|
|
( U22 /DDR_Banks/M1_DQ13 )
|
|
|
|
|
( T22 ? )
|
|
|
|
|
( R22 /DDR_Banks/M1_DQ11 )
|
|
|
|
|
( P22 /FPGA_Spartan6/M1_DQ9 )
|
|
|
|
|
( N22 /FPGA_Spartan6/M1_DQ1 )
|
|
|
|
|
( M22 /FPGA_Spartan6/M1_DQ3 )
|
|
|
|
|
( L22 ? )
|
|
|
|
|
( K22 /FPGA_Spartan6/M1_DQ7 )
|
|
|
|
|
( J22 /DDR_Banks/M1_DQ5 )
|
|
|
|
|
( H22 /FPGA_Spartan6/M1_CAS# )
|
|
|
|
|
( G22 ? )
|
|
|
|
|
( F22 /FPGA_Spartan6/M1_A1 )
|
|
|
|
|
( E22 /FPGA_Spartan6/M1_A2 )
|
|
|
|
|
( D22 /FPGA_Spartan6/M1_A12 )
|
|
|
|
|
( C22 /DDR_Banks/M1_A9 )
|
|
|
|
|
( B22 ? )
|
|
|
|
|
( W21 +2.5V )
|
|
|
|
|
( V21 /FPGA_Spartan6/M1_DQ14 )
|
|
|
|
|
( T21 /DDR_Banks/M1_UDQS )
|
|
|
|
|
( R21 +2.5V )
|
|
|
|
|
( P21 /FPGA_Spartan6/M1_DQ8 )
|
|
|
|
|
( M21 /FPGA_Spartan6/M1_DQ2 )
|
|
|
|
|
( L21 +2.5V )
|
|
|
|
|
( N19 ? )
|
|
|
|
|
( M19 ? )
|
|
|
|
|
( L19 /FPGA_Spartan6/M1_LDM )
|
|
|
|
|
( K19 /FPGA_Spartan6/M1_A6 )
|
|
|
|
|
( J19 /FPGA_Spartan6/M1_CLK# )
|
|
|
|
|
( H19 /DDR_Banks/M1_WE# )
|
|
|
|
|
( G19 /DDR_Banks/M1_A10 )
|
|
|
|
|
( F19 /FPGA_Spartan6/M1_A11 )
|
|
|
|
|
( E19 +2.5V )
|
|
|
|
|
( D19 ? )
|
|
|
|
|
( C19 ? )
|
|
|
|
|
( U18 +2.5V )
|
|
|
|
|
( P18 /FPGA_Spartan6/USBA_OE_N )
|
|
|
|
|
( N18 +2.5V )
|
|
|
|
|
( M18 /USB/USBA_VM )
|
|
|
|
|
( K18 ? )
|
|
|
|
|
( J18 +2.5V )
|
|
|
|
|
( H18 ? )
|
|
|
|
|
( F18 ? )
|
|
|
|
|
( P17 /USB/USBA_VP )
|
|
|
|
|
( M17 ? )
|
|
|
|
|
( L17 ? )
|
|
|
|
|
( K17 /DDR_Banks/M1_BA1 )
|
|
|
|
|
( J17 /DDR_Banks/M1_BA0 )
|
|
|
|
|
( H17 ? )
|
|
|
|
|
( G17 ? )
|
|
|
|
|
( F17 ? )
|
|
|
|
|
( N16 /FPGA_Spartan6/USBA_RCV )
|
|
|
|
|
( M16 ? )
|
|
|
|
|
( L16 +2.5V )
|
|
|
|
|
( K16 ? )
|
|
|
|
|
( J14 +1.2V )
|
|
|
|
|
( H14 ? )
|
|
|
|
|
( F14 ? )
|
|
|
|
|
( E14 ? )
|
|
|
|
|
( P13 +1.2V )
|
|
|
|
|
( N13 GND )
|
|
|
|
|
( M13 +1.2V )
|
|
|
|
|
( L13 GND )
|
|
|
|
|
( K13 +1.2V )
|
|
|
|
|
( J13 GND )
|
|
|
|
|
( H13 ? )
|
|
|
|
|
( G13 ? )
|
|
|
|
|
( F13 ? )
|
|
|
|
|
( D13 ? )
|
|
|
|
|
( B13 GND )
|
|
|
|
|
( Y22 ? )
|
|
|
|
|
( A22 GND )
|
|
|
|
|
( R12 +2.5V )
|
|
|
|
|
( P12 GND )
|
|
|
|
|
( N12 +1.2V )
|
|
|
|
|
( M12 GND )
|
|
|
|
|
( L12 +1.2V )
|
|
|
|
|
( K12 GND )
|
|
|
|
|
( J12 +1.2V )
|
|
|
|
|
( H12 ? )
|
|
|
|
|
( G12 +2.5V )
|
|
|
|
|
( F12 ? )
|
|
|
|
|
( E12 ? )
|
|
|
|
|
( D12 ? )
|
|
|
|
|
( AB1 GND )
|
|
|
|
|
( A19 ? )
|
|
|
|
|
( R18 GND )
|
|
|
|
|
( L18 GND )
|
|
|
|
|
( G18 GND )
|
|
|
|
|
( E18 ? )
|
|
|
|
|
( D18 GND )
|
|
|
|
|
( C18 ? )
|
|
|
|
|
( R17 ? )
|
|
|
|
|
( N17 GND )
|
|
|
|
|
( B17 GND )
|
|
|
|
|
( W16 GND )
|
|
|
|
|
( P16 ? )
|
|
|
|
|
( D16 +2.5V )
|
|
|
|
|
( AA5 GND )
|
|
|
|
|
( P15 ? )
|
|
|
|
|
( N15 ? )
|
|
|
|
|
( M15 +2.5V )
|
|
|
|
|
( K15 +2.5V )
|
|
|
|
|
( J15 GND )
|
|
|
|
|
( H15 +2.5V )
|
|
|
|
|
( G15 ? )
|
|
|
|
|
( F15 ? )
|
|
|
|
|
( E15 GND )
|
|
|
|
|
( V14 GND )
|
|
|
|
|
( R14 +1.2V )
|
|
|
|
|
( P14 GND )
|
|
|
|
|
( N14 +1.2V )
|
|
|
|
|
( M14 GND )
|
|
|
|
|
( L14 +1.2V )
|
|
|
|
|
( K14 GND )
|
|
|
|
|
( L9 GND )
|
|
|
|
|
( K9 +1.2V )
|
|
|
|
|
( J9 GND )
|
|
|
|
|
( H9 +2.5V )
|
|
|
|
|
( G9 ? )
|
|
|
|
|
( F9 ? )
|
|
|
|
|
( B9 GND )
|
|
|
|
|
( N8 +2.5V )
|
|
|
|
|
( L8 +2.5V )
|
|
|
|
|
( J8 +1.2V )
|
|
|
|
|
( G8 ? )
|
|
|
|
|
( F8 ? )
|
|
|
|
|
( E8 ? )
|
|
|
|
|
( W7 GND )
|
|
|
|
|
( U7 GND )
|
|
|
|
|
( H7 GND )
|
|
|
|
|
( E7 GND )
|
|
|
|
|
( V6 +2.5V )
|
|
|
|
|
( R6 +2.5V )
|
|
|
|
|
( R5 GND )
|
|
|
|
|
( L5 GND )
|
|
|
|
|
( G5 GND )
|
|
|
|
|
( B5 GND )
|
|
|
|
|
( V4 GND )
|
|
|
|
|
( D4 GND )
|
|
|
|
|
( U2 GND )
|
|
|
|
|
( N2 GND )
|
|
|
|
|
( J2 GND )
|
|
|
|
|
( E2 GND )
|
|
|
|
|
( A1 GND )
|
|
|
|
|
( AA1 ? )
|
|
|
|
|
( U21 GND )
|
|
|
|
|
( N21 GND )
|
|
|
|
|
( J21 GND )
|
|
|
|
|
( E21 GND )
|
|
|
|
|
( U11 +2.5V )
|
|
|
|
|
( P11 +1.2V )
|
|
|
|
|
( N11 GND )
|
|
|
|
|
( M11 +1.2V )
|
|
|
|
|
( L11 GND )
|
|
|
|
|
( K11 +1.2V )
|
|
|
|
|
( J11 GND )
|
|
|
|
|
( H11 ? )
|
|
|
|
|
( G11 ? )
|
|
|
|
|
( F11 +2.5V )
|
|
|
|
|
( E11 GND )
|
|
|
|
|
( Y20 ? )
|
|
|
|
|
( V10 GND )
|
|
|
|
|
( R10 +2.5V )
|
|
|
|
|
( P10 GND )
|
|
|
|
|
( N10 +1.2V )
|
|
|
|
|
( M10 GND )
|
|
|
|
|
( L10 +1.2V )
|
|
|
|
|
( K10 GND )
|
|
|
|
|
( J10 +1.2V )
|
|
|
|
|
( H10 ? )
|
|
|
|
|
( F10 ? )
|
|
|
|
|
( E10 ? )
|
|
|
|
|
( P9 +1.2V )
|
|
|
|
|
( N9 GND )
|
|
|
|
|
( M9 +1.2V )
|
|
|
|
|
( V19 ? )
|
|
|
|
|
( AB8 ? )
|
|
|
|
|
( AA8 ? )
|
|
|
|
|
( Y18 ? )
|
|
|
|
|
( W18 ? )
|
|
|
|
|
( V18 ? )
|
|
|
|
|
( T18 ? )
|
|
|
|
|
( AB7 ? )
|
|
|
|
|
( AA7 N-000149 )
|
|
|
|
|
( Y17 ? )
|
|
|
|
|
( W17 ? )
|
|
|
|
|
( V17 ? )
|
|
|
|
|
( U17 ? )
|
|
|
|
|
( T17 ? )
|
|
|
|
|
( AB6 ? )
|
|
|
|
|
( AA6 ? )
|
|
|
|
|
( Y16 ? )
|
|
|
|
|
( V16 N-000149 )
|
|
|
|
|
( U16 ? )
|
|
|
|
|
( T16 ? )
|
|
|
|
|
( R16 ? )
|
|
|
|
|
( AB5 ? )
|
|
|
|
|
( Y15 ? )
|
|
|
|
|
( W15 ? )
|
|
|
|
|
( V15 ? )
|
|
|
|
|
( U15 ? )
|
|
|
|
|
( T15 ? )
|
|
|
|
|
( R15 ? )
|
|
|
|
|
( AB4 ? )
|
|
|
|
|
( AA4 ? )
|
|
|
|
|
( F1 ? )
|
|
|
|
|
( E1 /FPGA_Spartan6/M0_A9 )
|
|
|
|
|
( D1 /FPGA_Spartan6/M0_A12 )
|
|
|
|
|
( C1 /FPGA_Spartan6/M0_A11 )
|
|
|
|
|
( B1 ? )
|
|
|
|
|
( AB19 ? )
|
|
|
|
|
( AA19 N-000149 )
|
|
|
|
|
( AB18 ? )
|
2010-08-14 15:42:37 +03:00
|
|
|
( AA18 ? )
|
2010-08-14 16:23:56 +03:00
|
|
|
( AB17 ? )
|
|
|
|
|
( AB16 ? )
|
|
|
|
|
( AA16 ? )
|
|
|
|
|
( AB15 ? )
|
|
|
|
|
( AA15 N-000149 )
|
|
|
|
|
( AB14 ? )
|
|
|
|
|
( AA14 ? )
|
|
|
|
|
( AB13 ? )
|
2010-08-13 17:27:10 +03:00
|
|
|
( AA22 ? )
|
|
|
|
|
( AB12 ? )
|
2010-08-14 16:23:56 +03:00
|
|
|
( AA12 ? )
|
2010-08-13 17:27:10 +03:00
|
|
|
( AB21 ? )
|
2010-08-14 16:23:56 +03:00
|
|
|
( AA21 /FPGA_Spartan6/PROG_CCLK )
|
|
|
|
|
( AB11 ? )
|
|
|
|
|
( AA11 N-000149 )
|
|
|
|
|
( AB20 /FPGA_Spartan6/PROG_MISO0 )
|
|
|
|
|
( AA20 /FPGA_Spartan6/PROG_MISO1 )
|
|
|
|
|
( AB10 ? )
|
|
|
|
|
( AA10 ? )
|
|
|
|
|
( AB9 ? )
|
|
|
|
|
( Y19 ? )
|
|
|
|
|
( V9 ? )
|
|
|
|
|
( U9 ? )
|
|
|
|
|
( T9 N-000149 )
|
|
|
|
|
( R9 ? )
|
|
|
|
|
( Y8 ? )
|
|
|
|
|
( W8 ? )
|
|
|
|
|
( V8 N-000149 )
|
|
|
|
|
( U8 ? )
|
|
|
|
|
( T8 ? )
|
|
|
|
|
( R8 ? )
|
|
|
|
|
( Y7 ? )
|
|
|
|
|
( V7 ? )
|
|
|
|
|
( T7 ? )
|
|
|
|
|
( R7 ? )
|
|
|
|
|
( Y6 ? )
|
|
|
|
|
( W6 ? )
|
|
|
|
|
( U6 ? )
|
|
|
|
|
( T6 ? )
|
|
|
|
|
( Y5 ? )
|
|
|
|
|
( W5 N-000149 )
|
|
|
|
|
( V5 ? )
|
|
|
|
|
( T5 /FPGA_Spartan6/PROG_CSO )
|
|
|
|
|
( Y4 ? )
|
|
|
|
|
( W4 ? )
|
|
|
|
|
( Y3 ? )
|
|
|
|
|
( AA17 GND )
|
|
|
|
|
( AA13 GND )
|
2010-08-13 00:12:57 +03:00
|
|
|
( AB22 GND )
|
2010-08-14 16:23:56 +03:00
|
|
|
( AA9 GND )
|
|
|
|
|
( W19 GND )
|
|
|
|
|
( Y14 ? )
|
|
|
|
|
( W14 ? )
|
|
|
|
|
( U14 /FPGA_Spartan6/PROG_MISO2 )
|
|
|
|
|
( T14 ? )
|
|
|
|
|
( AB3 ? )
|
|
|
|
|
( AA3 N-000149 )
|
|
|
|
|
( Y13 ? )
|
|
|
|
|
( W13 ? )
|
|
|
|
|
( V13 ? )
|
|
|
|
|
( U13 /FPGA_Spartan6/PROG_MISO3 )
|
|
|
|
|
( T13 N-000149 )
|
|
|
|
|
( R13 ? )
|
|
|
|
|
( AB2 ? )
|
|
|
|
|
( AA2 ? )
|
|
|
|
|
( Y12 ? )
|
|
|
|
|
( W12 ? )
|
|
|
|
|
( V12 N-000149 )
|
|
|
|
|
( U12 ? )
|
|
|
|
|
( T12 ? )
|
|
|
|
|
( Y21 ? )
|
|
|
|
|
( Y11 ? )
|
|
|
|
|
( W11 ? )
|
|
|
|
|
( V11 ? )
|
|
|
|
|
( T11 ? )
|
|
|
|
|
( R11 ? )
|
|
|
|
|
( Y10 ? )
|
|
|
|
|
( W10 ? )
|
|
|
|
|
( U10 ? )
|
|
|
|
|
( T10 ? )
|
|
|
|
|
( Y9 ? )
|
|
|
|
|
( W9 ? )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D8114 $noname C9 C {Lib=C}
|
|
|
|
|
( 1 /Ethernet_Phy/ETH_PLL1.8V )
|
|
|
|
|
( 2 N-000334 )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D810A 0402 L3 INDUCTOR {Lib=INDUCTOR}
|
|
|
|
|
( 1 /Ethernet_Phy/ETH_A1.8V )
|
|
|
|
|
( 2 /Ethernet_Phy/ETH_PLL1.8V )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D8104 $noname C6 C {Lib=C}
|
|
|
|
|
( 1 /Ethernet_Phy/ETH_A1.8V )
|
|
|
|
|
( 2 N-000334 )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D80F3 0402 L1 INDUCTOR {Lib=INDUCTOR}
|
|
|
|
|
( 1 N-000326 )
|
|
|
|
|
( 2 /Ethernet_Phy/ETH_A1.8V )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D80F0 $noname C4 C {Lib=C}
|
|
|
|
|
( 1 N-000326 )
|
|
|
|
|
( 2 N-000334 )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D80ED $noname C2 C {Lib=C}
|
|
|
|
|
( 1 /Ethernet_Phy/ETH_1.8V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7FB7 0402 L2 FB {Lib=INDUCTOR}
|
|
|
|
|
( 1 3.3V )
|
|
|
|
|
( 2 /Ethernet_Phy/ETH_A3.3V )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7FA7 $noname C8 100nF {Lib=C}
|
|
|
|
|
( 1 /Ethernet_Phy/ETH_A3.3V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7FA5 $noname C7 1uF {Lib=C}
|
|
|
|
|
( 1 /Ethernet_Phy/ETH_A3.3V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7FA3 $noname C5 100nF {Lib=C}
|
|
|
|
|
( 1 3.3V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7FA1 $noname C3 100nF {Lib=C}
|
|
|
|
|
( 1 3.3V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7F9F $noname C1 1uF {Lib=C}
|
|
|
|
|
( 1 3.3V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7F39 $noname R1 4.7K {Lib=R}
|
|
|
|
|
( 1 /Ethernet_Phy/ETH_MDIO )
|
|
|
|
|
( 2 3.3V )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7ECF $noname R2 6.65K {Lib=R}
|
|
|
|
|
( 1 N-000331 )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7E43 $noname C11 100nF {Lib=C}
|
|
|
|
|
( 1 3.3V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7E41 $noname C10 100nF {Lib=C}
|
|
|
|
|
( 1 3.3V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7DCB $noname C12 47nF {Lib=C}
|
|
|
|
|
( 1 N-000319 )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7DC4 $noname R9 1M {Lib=R}
|
|
|
|
|
( 1 N-000319 )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C432132 $noname U4 K8001 {Lib=K8001}
|
|
|
|
|
( 1 /Ethernet_Phy/ETH_MDIO )
|
|
|
|
|
( 2 /Ethernet_Phy/ETH_MDC )
|
|
|
|
|
( 3 /FPGA_Spartan6/ETH_RXD3 )
|
|
|
|
|
( 4 /Ethernet_Phy/ETH_RXD2 )
|
|
|
|
|
( 5 /Ethernet_Phy/ETH_RXD1 )
|
|
|
|
|
( 6 /Ethernet_Phy/ETH_RXD0 )
|
|
|
|
|
( 7 3.3V )
|
|
|
|
|
( 8 GND )
|
|
|
|
|
( 9 /FPGA_Spartan6/ETH_RXDV )
|
|
|
|
|
( 10 /Ethernet_Phy/ETH_RXC )
|
|
|
|
|
( 11 /Ethernet_Phy/ETH_RXER )
|
|
|
|
|
( 12 GND )
|
|
|
|
|
( 13 /Ethernet_Phy/ETH_1.8V )
|
|
|
|
|
( 14 /FPGA_Spartan6/ETH_TXER )
|
|
|
|
|
( 15 /FPGA_Spartan6/ETH_TXC )
|
|
|
|
|
( 16 /FPGA_Spartan6/ETH_TXEN )
|
|
|
|
|
( 17 /Ethernet_Phy/ETH_TXD0 )
|
|
|
|
|
( 18 /Ethernet_Phy/ETH_TXD1 )
|
|
|
|
|
( 19 /FPGA_Spartan6/ETH_TXD2 )
|
|
|
|
|
( 20 /Ethernet_Phy/ETH_TXD3 )
|
|
|
|
|
( 21 /Ethernet_Phy/ETH_COL )
|
|
|
|
|
( 22 /FPGA_Spartan6/ETH_CRS )
|
|
|
|
|
( 23 GND )
|
|
|
|
|
( 24 3.3V )
|
|
|
|
|
( 25 /FPGA_Spartan6/ETH_INT )
|
|
|
|
|
( 26 /Ethernet_Phy/ETH_LED0 )
|
|
|
|
|
( 27 /Ethernet_Phy/ETH_LED1 )
|
|
|
|
|
( 28 ? )
|
|
|
|
|
( 29 ? )
|
|
|
|
|
( 30 ? )
|
|
|
|
|
( 31 /Ethernet_Phy/ETH_A1.8V )
|
|
|
|
|
( 32 N-000332 )
|
|
|
|
|
( 33 N-000323 )
|
|
|
|
|
( 34 ? )
|
|
|
|
|
( 35 GND )
|
|
|
|
|
( 36 GND )
|
|
|
|
|
( 37 N-000331 )
|
|
|
|
|
( 38 /Ethernet_Phy/ETH_A3.3V )
|
|
|
|
|
( 39 GND )
|
|
|
|
|
( 40 N-000333 )
|
|
|
|
|
( 41 N-000322 )
|
|
|
|
|
( 42 ? )
|
|
|
|
|
( 43 ? )
|
|
|
|
|
( 44 GND )
|
|
|
|
|
( 45 ? )
|
|
|
|
|
( 46 /Ethernet_Phy/ETH_CLK )
|
|
|
|
|
( 47 /Ethernet_Phy/ETH_PLL1.8V )
|
|
|
|
|
( 48 /FPGA_Spartan6/ETH_RESET_N )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7AFE $noname R3 49.9 {Lib=R}
|
|
|
|
|
( 1 3.3V )
|
|
|
|
|
( 2 N-000322 )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7AFC $noname R4 49.9 {Lib=R}
|
|
|
|
|
( 1 3.3V )
|
|
|
|
|
( 2 N-000333 )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7AF9 $noname R6 49.9 {Lib=R}
|
|
|
|
|
( 1 3.3V )
|
|
|
|
|
( 2 N-000332 )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D7AF7 $noname R5 49.9 {Lib=R}
|
|
|
|
|
( 1 3.3V )
|
|
|
|
|
( 2 N-000323 )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D71DB $noname R8 220 {Lib=R}
|
|
|
|
|
( 1 N-000336 )
|
|
|
|
|
( 2 /Ethernet_Phy/ETH_LED1 )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D719D $noname R7 220 {Lib=R}
|
|
|
|
|
( 1 N-000320 )
|
|
|
|
|
( 2 /Ethernet_Phy/ETH_LED0 )
|
|
|
|
|
)
|
|
|
|
|
( /4C4320F3/4C5D6F5A $noname J4 RJ45-48025 {Lib=RJ45-48025}
|
|
|
|
|
( 1 N-000322 )
|
|
|
|
|
( 2 N-000333 )
|
|
|
|
|
( 3 3.3V )
|
|
|
|
|
( 4 GND )
|
|
|
|
|
( 5 GND )
|
|
|
|
|
( 6 3.3V )
|
|
|
|
|
( 7 N-000323 )
|
|
|
|
|
( 8 N-000332 )
|
|
|
|
|
( 9 3.3V )
|
|
|
|
|
( 10 N-000320 )
|
|
|
|
|
( 11 3.3V )
|
|
|
|
|
( 12 N-000336 )
|
|
|
|
|
( 13 N-000319 )
|
|
|
|
|
( 14 N-000319 )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C65D2A9 0402 C70 10nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C65D28E 0402 C71 10nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61D1D4 1206 C34 10uF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61D151 1206 C33 10uF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CFA5 0402 C28 100nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CFA4 0402 C29 10nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CFA3 0402 C31 10nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CFA2 0402 C30 10nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CFA1 0402 C32 10nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CFA0 0603 C27 1uF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CF2F 0603 C21 1uF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CF27 0402 C26 10nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CF17 0402 C24 10nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CF16 0402 C25 10nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CEF7 0402 C23 10nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CEB9 0402 C22 100nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CE31 0402 R13 1K_1% {Lib=R}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 N-000051 )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CE30 0402 R14 1K_1% {Lib=R}
|
|
|
|
|
( 1 N-000051 )
|
|
|
|
|
( 2 N-000050 )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CDB5 0402 R12 1K_1% {Lib=R}
|
|
|
|
|
( 1 N-000052 )
|
|
|
|
|
( 2 N-000054 )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CD4A 0402 R11 1K_1% {Lib=R}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 N-000052 )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CCE3 0402 C19 100nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 N-000051 )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CCE2 0402 C20 100nF {Lib=CAP}
|
|
|
|
|
( 1 N-000051 )
|
|
|
|
|
( 2 N-000050 )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CC96 0402 C18 100nF {Lib=CAP}
|
|
|
|
|
( 1 N-000052 )
|
|
|
|
|
( 2 N-000054 )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C61CC73 0402 C17 100nF {Lib=CAP}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 N-000052 )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C609C8E $noname U3 MT46V32M16TG {Lib=MT46V32M16TG}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 /FPGA_Spartan6/M1_DQ0 )
|
|
|
|
|
( 3 +2.5V )
|
|
|
|
|
( 4 /FPGA_Spartan6/M1_DQ1 )
|
|
|
|
|
( 5 /FPGA_Spartan6/M1_DQ2 )
|
|
|
|
|
( 6 GND )
|
|
|
|
|
( 7 /FPGA_Spartan6/M1_DQ3 )
|
|
|
|
|
( 8 /DDR_Banks/M1_DQ4 )
|
|
|
|
|
( 9 +2.5V )
|
|
|
|
|
( 10 /DDR_Banks/M1_DQ5 )
|
|
|
|
|
( 11 /FPGA_Spartan6/M1_DQ6 )
|
|
|
|
|
( 12 GND )
|
|
|
|
|
( 13 /FPGA_Spartan6/M1_DQ7 )
|
|
|
|
|
( 14 ? )
|
|
|
|
|
( 15 +2.5V )
|
|
|
|
|
( 16 /FPGA_Spartan6/M1_LDQS )
|
|
|
|
|
( 17 ? )
|
|
|
|
|
( 18 +2.5V )
|
|
|
|
|
( 19 ? )
|
|
|
|
|
( 20 /FPGA_Spartan6/M1_LDM )
|
|
|
|
|
( 21 /DDR_Banks/M1_WE# )
|
|
|
|
|
( 22 /FPGA_Spartan6/M1_CAS# )
|
|
|
|
|
( 23 /DDR_Banks/M1_RAS# )
|
|
|
|
|
( 24 GND )
|
|
|
|
|
( 25 ? )
|
|
|
|
|
( 26 /DDR_Banks/M1_BA0 )
|
|
|
|
|
( 27 /DDR_Banks/M1_BA1 )
|
|
|
|
|
( 28 /DDR_Banks/M1_A10 )
|
|
|
|
|
( 29 /DDR_Banks/M1_A0 )
|
|
|
|
|
( 30 /FPGA_Spartan6/M1_A1 )
|
|
|
|
|
( 31 /FPGA_Spartan6/M1_A2 )
|
|
|
|
|
( 32 /FPGA_Spartan6/M1_A3 )
|
|
|
|
|
( 33 +2.5V )
|
|
|
|
|
( 34 GND )
|
|
|
|
|
( 35 /FPGA_Spartan6/M1_A4 )
|
|
|
|
|
( 36 /DDR_Banks/M1_A5 )
|
|
|
|
|
( 37 /FPGA_Spartan6/M1_A6 )
|
|
|
|
|
( 38 /FPGA_Spartan6/M1_A7 )
|
|
|
|
|
( 39 /FPGA_Spartan6/M1_A8 )
|
|
|
|
|
( 40 /DDR_Banks/M1_A9 )
|
|
|
|
|
( 41 /FPGA_Spartan6/M1_A11 )
|
|
|
|
|
( 42 /FPGA_Spartan6/M1_A12 )
|
|
|
|
|
( 43 ? )
|
|
|
|
|
( 44 /FPGA_Spartan6/M1_CLK# )
|
|
|
|
|
( 45 /DDR_Banks/M1_CKE )
|
|
|
|
|
( 46 /FPGA_Spartan6/M1_CLK )
|
|
|
|
|
( 47 /DDR_Banks/M1_UDM )
|
|
|
|
|
( 48 GND )
|
|
|
|
|
( 49 N-000051 )
|
|
|
|
|
( 50 ? )
|
|
|
|
|
( 51 /DDR_Banks/M1_UDQS )
|
|
|
|
|
( 52 GND )
|
|
|
|
|
( 53 ? )
|
|
|
|
|
( 54 /FPGA_Spartan6/M1_DQ8 )
|
|
|
|
|
( 55 +2.5V )
|
|
|
|
|
( 56 /FPGA_Spartan6/M1_DQ9 )
|
|
|
|
|
( 57 /DDR_Banks/M1_DQ10 )
|
|
|
|
|
( 58 GND )
|
|
|
|
|
( 59 /DDR_Banks/M1_DQ11 )
|
|
|
|
|
( 60 /FPGA_Spartan6/M1_DQ12 )
|
|
|
|
|
( 61 +2.5V )
|
|
|
|
|
( 62 /DDR_Banks/M1_DQ13 )
|
|
|
|
|
( 63 /FPGA_Spartan6/M1_DQ14 )
|
|
|
|
|
( 64 GND )
|
|
|
|
|
( 65 /FPGA_Spartan6/M1_DQ15 )
|
|
|
|
|
( 66 GND )
|
|
|
|
|
)
|
|
|
|
|
( /4C421DD3/4C609B99 $noname U2 MT46V32M16TG {Lib=MT46V32M16TG}
|
|
|
|
|
( 1 +2.5V )
|
|
|
|
|
( 2 /DDR_Banks/M0_DQ0 )
|
|
|
|
|
( 3 +2.5V )
|
|
|
|
|
( 4 /FPGA_Spartan6/M0_DQ1 )
|
|
|
|
|
( 5 /FPGA_Spartan6/M0_DQ2 )
|
|
|
|
|
( 6 GND )
|
|
|
|
|
( 7 /DDR_Banks/M0_DQ3 )
|
|
|
|
|
( 8 /DDR_Banks/M0_DQ4 )
|
|
|
|
|
( 9 +2.5V )
|
|
|
|
|
( 10 /FPGA_Spartan6/M0_DQ5 )
|
|
|
|
|
( 11 /FPGA_Spartan6/M0_DQ6 )
|
|
|
|
|
( 12 GND )
|
|
|
|
|
( 13 /DDR_Banks/M0_DQ7 )
|
|
|
|
|
( 14 ? )
|
|
|
|
|
( 15 +2.5V )
|
|
|
|
|
( 16 /FPGA_Spartan6/M0_LDQS )
|
|
|
|
|
( 17 ? )
|
|
|
|
|
( 18 +2.5V )
|
|
|
|
|
( 19 ? )
|
|
|
|
|
( 20 /FPGA_Spartan6/M0_LDM )
|
|
|
|
|
( 21 /DDR_Banks/M0_WE# )
|
|
|
|
|
( 22 /FPGA_Spartan6/M0_CAS# )
|
|
|
|
|
( 23 /FPGA_Spartan6/M0_RAS# )
|
|
|
|
|
( 24 GND )
|
|
|
|
|
( 25 ? )
|
|
|
|
|
( 26 /DDR_Banks/M0_BA0 )
|
|
|
|
|
( 27 /FPGA_Spartan6/M0_BA1 )
|
|
|
|
|
( 28 /FPGA_Spartan6/M0_A10 )
|
|
|
|
|
( 29 /FPGA_Spartan6/M0_A0 )
|
|
|
|
|
( 30 /DDR_Banks/M0_A1 )
|
|
|
|
|
( 31 /DDR_Banks/M0_A2 )
|
|
|
|
|
( 32 /FPGA_Spartan6/M0_A3 )
|
|
|
|
|
( 33 +2.5V )
|
|
|
|
|
( 34 GND )
|
|
|
|
|
( 35 /FPGA_Spartan6/M0_A4 )
|
|
|
|
|
( 36 /FPGA_Spartan6/M0_A5 )
|
|
|
|
|
( 37 /FPGA_Spartan6/M0_A6 )
|
|
|
|
|
( 38 /FPGA_Spartan6/M0_A7 )
|
|
|
|
|
( 39 /FPGA_Spartan6/M0_A8 )
|
|
|
|
|
( 40 /FPGA_Spartan6/M0_A9 )
|
|
|
|
|
( 41 /FPGA_Spartan6/M0_A11 )
|
|
|
|
|
( 42 /FPGA_Spartan6/M0_A12 )
|
|
|
|
|
( 43 ? )
|
|
|
|
|
( 44 /DDR_Banks/M0_CLK# )
|
|
|
|
|
( 45 /DDR_Banks/M0_CKE )
|
|
|
|
|
( 46 /DDR_Banks/M0_CLK )
|
|
|
|
|
( 47 /DDR_Banks/M0_UDM )
|
|
|
|
|
( 48 GND )
|
|
|
|
|
( 49 N-000052 )
|
|
|
|
|
( 50 ? )
|
|
|
|
|
( 51 /DDR_Banks/M0_UDQS )
|
|
|
|
|
( 52 GND )
|
|
|
|
|
( 53 ? )
|
|
|
|
|
( 54 /FPGA_Spartan6/M0_DQ8 )
|
|
|
|
|
( 55 +2.5V )
|
|
|
|
|
( 56 /FPGA_Spartan6/M0_DQ9 )
|
|
|
|
|
( 57 /DDR_Banks/M0_DQ10 )
|
|
|
|
|
( 58 GND )
|
|
|
|
|
( 59 /DDR_Banks/M0_DQ11 )
|
|
|
|
|
( 60 /FPGA_Spartan6/M0_DQ12 )
|
|
|
|
|
( 61 +2.5V )
|
|
|
|
|
( 62 /DDR_Banks/M0_DQ13 )
|
|
|
|
|
( 63 /FPGA_Spartan6/M0_DQ14 )
|
|
|
|
|
( 64 GND )
|
|
|
|
|
( 65 /DDR_Banks/M0_DQ15 )
|
|
|
|
|
( 66 GND )
|
2010-07-24 14:58:53 +03:00
|
|
|
)
|
|
|
|
|
)
|
|
|
|
|
*
|
2010-08-08 20:15:44 +03:00
|
|
|
{ Allowed footprints by component:
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C74
|
2010-08-14 02:38:38 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C73
|
2010-08-14 02:38:38 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C72
|
2010-08-14 02:38:38 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C35
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C36
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C37
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C38
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component R15
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
2010-08-14 01:34:12 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component R10
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
2010-08-14 01:34:12 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C16
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C15
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C14
|
2010-08-09 23:37:18 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 01:34:12 +03:00
|
|
|
$component C13
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C66
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C63
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C60
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C57
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C54
|
2010-08-08 20:15:44 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C69
|
2010-08-13 17:27:10 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-10 06:25:05 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C67
|
2010-08-09 23:37:18 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C64
|
2010-08-09 23:37:18 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C61
|
2010-08-09 23:37:18 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C58
|
2010-08-13 17:27:10 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C55
|
2010-08-13 17:27:10 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C68
|
2010-08-13 17:27:10 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C65
|
2010-08-13 17:27:10 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C62
|
2010-08-13 17:27:10 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-09 23:37:18 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C59
|
2010-08-13 17:27:10 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-10 05:29:52 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C56
|
2010-08-13 17:27:10 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-08 20:15:44 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C50
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C47
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C44
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C41
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C53
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C51
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C49
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C46
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C52
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C43
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 01:34:12 +03:00
|
|
|
$component C40
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C48
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C45
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C42
|
2010-08-11 01:38:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C39
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C9
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C6
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C4
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C2
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C8
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C7
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C5
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C3
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C1
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component R1
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
2010-08-13 19:24:39 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component R2
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
2010-08-13 19:24:39 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C11
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C10
|
2010-08-14 15:42:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-14 01:34:12 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C12
|
2010-08-14 15:42:37 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-14 01:34:12 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component R9
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
|
|
|
|
$endlist
|
|
|
|
|
$component R3
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
|
|
|
|
$endlist
|
|
|
|
|
$component R4
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
|
|
|
|
$endlist
|
|
|
|
|
$component R6
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
|
|
|
|
$endlist
|
|
|
|
|
$component R5
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
|
|
|
|
$endlist
|
|
|
|
|
$component R8
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
|
|
|
|
$endlist
|
|
|
|
|
$component R7
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
|
|
|
|
$endlist
|
|
|
|
|
$component C70
|
2010-08-14 02:20:50 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C71
|
2010-08-14 02:20:50 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C34
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C33
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C28
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C29
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C31
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C30
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C32
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C27
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C21
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C26
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C24
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C25
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C23
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C22
|
2010-08-13 19:24:39 +03:00
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component R13
|
2010-08-14 15:42:37 +03:00
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component R14
|
2010-08-14 15:42:37 +03:00
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
|
|
|
|
R?-*
|
|
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component R12
|
2010-08-11 01:38:37 +03:00
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
2010-08-13 23:42:35 +03:00
|
|
|
R?-*
|
2010-08-11 01:38:37 +03:00
|
|
|
$endlist
|
|
|
|
|
$component R11
|
|
|
|
|
R?
|
|
|
|
|
SM0603
|
|
|
|
|
SM0805
|
2010-08-13 23:42:35 +03:00
|
|
|
R?-*
|
2010-08-11 01:38:37 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C19
|
|
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-11 01:38:37 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C20
|
|
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-11 01:38:37 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C18
|
|
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-11 01:38:37 +03:00
|
|
|
$endlist
|
2010-08-14 16:23:56 +03:00
|
|
|
$component C17
|
|
|
|
|
SM*
|
|
|
|
|
C?
|
|
|
|
|
C1-1
|
2010-08-11 01:38:37 +03:00
|
|
|
$endlist
|
2010-08-08 20:15:44 +03:00
|
|
|
$endfootprintlist
|
2010-07-24 14:58:53 +03:00
|
|
|
}
|
2010-08-14 16:23:56 +03:00
|
|
|
{ Pin List by Nets
|
|
|
|
|
Net 1 "/FPGA Spartan6/PROG_CSO" "PROG_CSO"
|
|
|
|
|
U8 1
|
|
|
|
|
U1 T5
|
|
|
|
|
Net 2 "/FPGA Spartan6/NF_RE_N" "NF_RE_N"
|
|
|
|
|
U5 8
|
|
|
|
|
U1 B16
|
|
|
|
|
Net 3 "/FPGA Spartan6/NF_CS1_N" "NF_CS1_N"
|
|
|
|
|
U1 C16
|
|
|
|
|
U5 9
|
|
|
|
|
Net 4 "/FPGA Spartan6/NF_ALE" "NF_ALE"
|
|
|
|
|
U5 17
|
|
|
|
|
U1 A15
|
|
|
|
|
Net 5 "/FPGA Spartan6/ETH_TXC" "ETH_TXC"
|
|
|
|
|
U1 D7
|
|
|
|
|
U4 15
|
|
|
|
|
Net 6 "/Ethernet Phy/ETH_RXC" "ETH_RXC"
|
|
|
|
|
U4 10
|
|
|
|
|
U1 D8
|
|
|
|
|
Net 7 "/Ethernet Phy/ETH_CLK" "ETH_CLK"
|
|
|
|
|
U4 46
|
|
|
|
|
U1 A4
|
|
|
|
|
Net 8 "/USB/USBA_SPD" "USBA_SPD"
|
|
|
|
|
U6 2
|
|
|
|
|
U1 R19
|
|
|
|
|
Net 9 "/FPGA Spartan6/USBA_OE_N" "USBA_OE_N"
|
|
|
|
|
U6 9
|
|
|
|
|
U1 P18
|
|
|
|
|
Net 10 "/FPGA Spartan6/USBA_RCV" "USBA_RCV"
|
|
|
|
|
U6 3
|
|
|
|
|
U1 N16
|
|
|
|
|
Net 11 "/USB/USBA_VP" "USBA_VP"
|
|
|
|
|
U1 P17
|
|
|
|
|
U6 4
|
|
|
|
|
Net 12 "/USB/USBA_VM" "USBA_VM"
|
|
|
|
|
U1 M18
|
|
|
|
|
U6 5
|
|
|
|
|
Net 13 "/Ethernet Phy/ETH_COL" "ETH_COL"
|
|
|
|
|
U4 21
|
|
|
|
|
U1 B10
|
|
|
|
|
Net 14 "/FPGA Spartan6/ETH_CRS" "ETH_CRS"
|
|
|
|
|
U4 22
|
|
|
|
|
U1 C10
|
|
|
|
|
Net 15 "/FPGA Spartan6/SD_CLK" "SD_CLK"
|
|
|
|
|
J1 5
|
|
|
|
|
U1 E16
|
|
|
|
|
Net 16 "/FPGA Spartan6/ETH_INT" "ETH_INT"
|
|
|
|
|
U4 25
|
|
|
|
|
U1 A10
|
|
|
|
|
Net 17 "/Ethernet Phy/ETH_MDC" "ETH_MDC"
|
|
|
|
|
U4 2
|
|
|
|
|
U1 D10
|
|
|
|
|
Net 18 "/Ethernet Phy/ETH_MDIO" "ETH_MDIO"
|
|
|
|
|
U4 1
|
|
|
|
|
R1 1
|
|
|
|
|
U1 C5
|
|
|
|
|
Net 19 "/FPGA Spartan6/ETH_RESET_N" "ETH_RESET_N"
|
|
|
|
|
U1 A5
|
|
|
|
|
U4 48
|
|
|
|
|
Net 20 "/FPGA Spartan6/ETH_RXDV" "ETH_RXDV"
|
|
|
|
|
U1 C7
|
|
|
|
|
U4 9
|
|
|
|
|
Net 21 "/Ethernet Phy/ETH_RXER" "ETH_RXER"
|
|
|
|
|
U1 A7
|
|
|
|
|
U4 11
|
|
|
|
|
Net 22 "/FPGA Spartan6/ETH_TXER" "ETH_TXER"
|
|
|
|
|
U4 14
|
|
|
|
|
U1 B8
|
|
|
|
|
Net 23 "/FPGA Spartan6/ETH_TXEN" "ETH_TXEN"
|
|
|
|
|
U1 A8
|
|
|
|
|
U4 16
|
|
|
|
|
Net 24 "/DDR Banks/M1_UDM" "M1_UDM"
|
|
|
|
|
U3 47
|
|
|
|
|
U1 M20
|
|
|
|
|
Net 25 "/FPGA Spartan6/M1_LDQS" "M1_LDQS"
|
|
|
|
|
U1 L20
|
|
|
|
|
U3 16
|
|
|
|
|
Net 26 "/FPGA Spartan6/M1_LDM" "M1_LDM"
|
|
|
|
|
U3 20
|
|
|
|
|
U1 L19
|
|
|
|
|
Net 27 "/DDR Banks/M1_UDQS" "M1_UDQS"
|
|
|
|
|
U3 51
|
|
|
|
|
U1 T21
|
|
|
|
|
Net 28 "/DDR Banks/M0_UDQS" "M0_UDQS"
|
|
|
|
|
U1 T2
|
|
|
|
|
U2 51
|
|
|
|
|
Net 29 "/FPGA Spartan6/M0_LDM" "M0_LDM"
|
|
|
|
|
U2 20
|
|
|
|
|
U1 L4
|
|
|
|
|
Net 30 "/FPGA Spartan6/M1_CAS#" "M1_CAS#"
|
|
|
|
|
U3 22
|
|
|
|
|
U1 H22
|
|
|
|
|
Net 31 "/DDR Banks/M1_CKE" "M1_CKE"
|
|
|
|
|
U3 45
|
|
|
|
|
U1 D21
|
|
|
|
|
Net 32 "/FPGA Spartan6/M1_CLK" "M1_CLK"
|
|
|
|
|
U3 46
|
|
|
|
|
U1 H20
|
|
|
|
|
Net 33 "/FPGA Spartan6/M1_CLK#" "M1_CLK#"
|
|
|
|
|
U1 J19
|
|
|
|
|
U3 44
|
|
|
|
|
Net 34 "GND" "GND"
|
|
|
|
|
U1 B13
|
|
|
|
|
U1 A22
|
|
|
|
|
U2 24
|
|
|
|
|
U2 64
|
|
|
|
|
U2 34
|
|
|
|
|
C46 2
|
|
|
|
|
C44 2
|
|
|
|
|
C41 2
|
|
|
|
|
C49 2
|
|
|
|
|
U3 64
|
|
|
|
|
C51 2
|
|
|
|
|
U3 6
|
|
|
|
|
C53 2
|
|
|
|
|
C2 2
|
|
|
|
|
C55 2
|
|
|
|
|
C58 2
|
|
|
|
|
U3 52
|
|
|
|
|
U3 12
|
|
|
|
|
C40 2
|
|
|
|
|
U3 66
|
|
|
|
|
C43 2
|
|
|
|
|
C52 2
|
|
|
|
|
C47 2
|
|
|
|
|
C50 2
|
|
|
|
|
C56 2
|
|
|
|
|
C59 2
|
|
|
|
|
C62 2
|
|
|
|
|
C65 2
|
|
|
|
|
C68 2
|
|
|
|
|
U3 34
|
|
|
|
|
U3 24
|
|
|
|
|
U1 AB22
|
|
|
|
|
U1 AA13
|
|
|
|
|
U1 AA17
|
|
|
|
|
U1 M14
|
|
|
|
|
U1 P14
|
|
|
|
|
U1 V14
|
|
|
|
|
U1 E15
|
|
|
|
|
U1 J15
|
|
|
|
|
C72 2
|
|
|
|
|
C73 2
|
|
|
|
|
C74 2
|
|
|
|
|
U8 4
|
|
|
|
|
U2 12
|
|
|
|
|
U1 J13
|
|
|
|
|
U1 L13
|
|
|
|
|
J1 6
|
|
|
|
|
J1 COM
|
|
|
|
|
J1 CASE
|
|
|
|
|
J1 CASE
|
|
|
|
|
J1 CASE
|
|
|
|
|
U1 N13
|
|
|
|
|
U1 K14
|
|
|
|
|
C39 2
|
|
|
|
|
C61 2
|
|
|
|
|
U2 58
|
|
|
|
|
U2 48
|
|
|
|
|
C64 2
|
|
|
|
|
C67 2
|
|
|
|
|
C69 2
|
|
|
|
|
U2 66
|
|
|
|
|
C54 2
|
|
|
|
|
C57 2
|
|
|
|
|
C60 2
|
|
|
|
|
U2 6
|
|
|
|
|
C63 2
|
|
|
|
|
C66 2
|
|
|
|
|
U3 58
|
|
|
|
|
U3 48
|
|
|
|
|
U2 52
|
|
|
|
|
U1 AB1
|
|
|
|
|
U1 K12
|
|
|
|
|
U1 M12
|
|
|
|
|
U5 36
|
|
|
|
|
U1 P12
|
|
|
|
|
U1 B17
|
|
|
|
|
U1 N17
|
|
|
|
|
U1 D18
|
|
|
|
|
U1 G18
|
|
|
|
|
U1 L18
|
|
|
|
|
U1 R18
|
|
|
|
|
U1 W19
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U1 AA9
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C42 2
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C45 2
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C48 2
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U1 E21
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U5 13
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U1 J21
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U1 N21
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U1 U21
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C16 2
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U4 23
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V2 2
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C33 2
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C1 2
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C3 2
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C5 2
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C7 2
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C8 2
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R9 2
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C12 2
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U1 B9
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U4 44
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U1 J11
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U1 L11
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U1 N11
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U1 W7
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V3 2
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C38 2
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R15 2
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L5 2
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V1 2
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R2 2
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C34 2
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C71 2
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C70 2
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U1 J9
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C10 2
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U1 L9
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U1 W16
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C11 2
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U4 35
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U4 36
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U4 8
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U4 12
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C15 2
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U1 G5
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C13 2
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C14 2
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U6 7
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U1 E7
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U1 H7
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U1 R5
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U1 U7
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C22 2
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C23 2
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U1 K10
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R10 2
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C25 2
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C24 2
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U1 M10
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C26 2
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C21 2
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U1 P10
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U1 B5
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U1 V10
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U1 E11
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U6 8
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C27 2
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C32 2
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C30 2
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C31 2
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U1 L5
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C29 2
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C28 2
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L7 2
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U4 39
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U1 N2
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U1 J2
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U1 E2
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U1 A1
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U1 N9
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U1 D4
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U7 7
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U7 8
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U1 AA5
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J4 5
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C35 2
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C36 2
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C37 2
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V4 2
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U1 U2
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U1 V4
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J4 4
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Net 35 "/DDR Banks/M0_CLK#" "M0_CLK#"
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U1 H3
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U2 44
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Net 36 "/DDR Banks/M0_CLK" "M0_CLK"
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U1 H4
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U2 46
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Net 37 "/DDR Banks/M0_CKE" "M0_CKE"
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U1 D2
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U2 45
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Net 38 "/FPGA Spartan6/M0_CAS#" "M0_CAS#"
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U1 K4
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U2 22
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Net 39 "/DDR Banks/M1_WE#" "M1_WE#"
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U1 H19
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U3 21
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Net 40 "/DDR Banks/M1_RAS#" "M1_RAS#"
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U3 23
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U1 H21
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Net 41 "/FPGA Spartan6/M0_RAS#" "M0_RAS#"
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U2 23
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U1 K5
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Net 42 "/DDR Banks/M0_WE#" "M0_WE#"
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U2 21
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U1 F2
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Net 43 "/FPGA Spartan6/M0_LDQS" "M0_LDQS"
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U2 16
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U1 L3
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Net 44 "/DDR Banks/M0_UDM" "M0_UDM"
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U1 M3
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U2 47
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Net 45 "/FPGA Spartan6/PROG_CCLK" "PROG_CCLK"
|
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U8 6
|
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U1 AA21
|
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Net 46 "/FPGA Spartan6/NF_RNB" "NF_RNB"
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U1 A16
|
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U5 6
|
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U5 7
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Net 47 "/Non volatile memories/NF_WE_N" "NF_WE_N"
|
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U1 C15
|
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U5 18
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Net 48 "/FPGA Spartan6/NF_CLE" "NF_CLE"
|
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U1 D15
|
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U5 16
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Net 49 "/FPGA Spartan6/SD_CMD" "SD_CMD"
|
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J1 3
|
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U1 D17
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Net 50 "" ""
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R14 2
|
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C20 2
|
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Net 51 "" ""
|
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U3 49
|
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R13 2
|
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R14 1
|
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C19 2
|
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C20 1
|
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Net 52 "" ""
|
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C18 1
|
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C17 2
|
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R11 2
|
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R12 1
|
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U2 49
|
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Net 53 "+2.5V" "+2.5V"
|
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U1 M15
|
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U1 N5
|
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U1 J5
|
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U1 D16
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U1 C2
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U1 W2
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U1 R2
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U1 L2
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U1 R6
|
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U1 V6
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U1 U18
|
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U1 N18
|
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U1 J18
|
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U1 E19
|
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U1 W21
|
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U1 R21
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U1 R10
|
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U1 L21
|
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U1 F11
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U1 G21
|
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U1 L16
|
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U1 L8
|
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U1 N8
|
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U1 H9
|
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U1 G2
|
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C70 1
|
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C71 1
|
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C34 1
|
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C33 1
|
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U6 1
|
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U7 1
|
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C21 1
|
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C26 1
|
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C24 1
|
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C25 1
|
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C23 1
|
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C22 1
|
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R13 1
|
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C28 1
|
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C29 1
|
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C31 1
|
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C30 1
|
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C32 1
|
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C27 1
|
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U1 U5
|
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U1 F6
|
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U1 F4
|
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U1 C21
|
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U1 L7
|
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U1 G12
|
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U1 U11
|
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U2 61
|
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C66 1
|
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U2 1
|
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C63 1
|
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U2 3
|
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C60 1
|
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C57 1
|
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U2 9
|
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C54 1
|
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U2 18
|
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U2 33
|
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U1 K15
|
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U1 H15
|
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U3 18
|
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U3 61
|
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U3 33
|
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C68 1
|
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C65 1
|
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C62 1
|
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C59 1
|
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C56 1
|
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U2 15
|
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U2 55
|
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U3 3
|
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C53 1
|
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U3 9
|
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C51 1
|
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U1 R12
|
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C49 1
|
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C46 1
|
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C40 1
|
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C43 1
|
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U3 55
|
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C52 1
|
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U3 15
|
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U3 1
|
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C17 1
|
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C19 1
|
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R11 1
|
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Net 54 "" ""
|
|
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C18 2
|
|
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R12 2
|
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|
Net 99 "3.3V" "3.3V"
|
|
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|
|
C10 1
|
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C11 1
|
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J4 3
|
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|
J4 6
|
|
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J4 9
|
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J4 11
|
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R5 1
|
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C5 1
|
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C3 1
|
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C1 1
|
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R1 2
|
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U4 24
|
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U4 7
|
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U7 14
|
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U7 12
|
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U6 12
|
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U6 14
|
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R3 1
|
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R4 1
|
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R6 1
|
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L2 1
|
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U5 19
|
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U5 12
|
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|
Net 100 "VCCO2" "VCCO2"
|
|
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|
|
C64 1
|
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C61 1
|
|
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|
C55 1
|
|
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|
C58 1
|
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|
U8 8
|
|
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|
C69 1
|
|
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C67 1
|
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|
Net 101 "+3.3V" "+3.3V"
|
|
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|
|
C73 1
|
|
|
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|
C74 1
|
|
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|
C72 1
|
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|
U1 B4
|
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C44 1
|
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|
C47 1
|
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C50 1
|
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U1 B7
|
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U1 B15
|
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U1 G14
|
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U1 E13
|
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U1 B11
|
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U1 G10
|
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U1 B19
|
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U5 37
|
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U1 E9
|
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C41 1
|
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U1 E17
|
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Net 149 "" ""
|
|
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U1 AA19
|
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U1 AA15
|
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U1 T9
|
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U1 V8
|
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U1 AA11
|
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U1 W5
|
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U1 T13
|
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U1 AA7
|
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U1 AA3
|
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U1 V12
|
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U1 V16
|
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|
|
Net 237 "+1.2V" "+1.2V"
|
|
|
|
|
C48 1
|
|
|
|
|
C45 1
|
|
|
|
|
C42 1
|
|
|
|
|
C39 1
|
|
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|
|
U1 R14
|
|
|
|
|
U1 J10
|
|
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|
U1 L10
|
|
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|
|
U1 N10
|
|
|
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|
U1 K11
|
|
|
|
|
U1 M11
|
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|
U1 J8
|
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|
U1 K9
|
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|
|
U1 M9
|
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|
|
U1 P9
|
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U1 J12
|
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U1 L12
|
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|
U1 N12
|
|
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|
|
U1 P11
|
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U1 J14
|
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|
U1 K13
|
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|
U1 N14
|
|
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|
|
U1 M13
|
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U1 L14
|
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U1 P13
|
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|
Net 319 "" ""
|
|
|
|
|
J4 14
|
|
|
|
|
J4 13
|
|
|
|
|
C12 1
|
|
|
|
|
R9 1
|
|
|
|
|
Net 320 "" ""
|
|
|
|
|
R7 1
|
|
|
|
|
J4 10
|
|
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|
|
Net 321 "/Ethernet Phy/ETH_LED0" "ETH_LED0"
|
|
|
|
|
R7 2
|
|
|
|
|
U4 26
|
|
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|
|
Net 322 "" ""
|
|
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|
|
J4 1
|
|
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|
|
U4 41
|
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|
R3 2
|
|
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|
|
Net 323 "" ""
|
|
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|
|
U4 33
|
|
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|
|
R5 2
|
|
|
|
|
J4 7
|
|
|
|
|
Net 324 "/Ethernet Phy/ETH_A1.8V" "ETH_A1.8V"
|
|
|
|
|
L3 1
|
|
|
|
|
C6 1
|
|
|
|
|
L1 2
|
|
|
|
|
U4 31
|
|
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|
|
Net 325 "/Ethernet Phy/ETH_1.8V" "ETH_1.8V"
|
|
|
|
|
U4 13
|
|
|
|
|
C2 1
|
|
|
|
|
Net 326 "" ""
|
|
|
|
|
C4 1
|
|
|
|
|
L1 1
|
|
|
|
|
Net 327 "/Ethernet Phy/ETH_A3.3V" "ETH_A3.3V"
|
|
|
|
|
U4 38
|
|
|
|
|
C8 1
|
|
|
|
|
L2 2
|
|
|
|
|
C7 1
|
|
|
|
|
Net 328 "/Ethernet Phy/ETH_PLL1.8V" "ETH_PLL1.8V"
|
|
|
|
|
U4 47
|
|
|
|
|
L3 2
|
|
|
|
|
C9 1
|
|
|
|
|
Net 331 "" ""
|
|
|
|
|
R2 1
|
|
|
|
|
U4 37
|
|
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|
|
Net 332 "" ""
|
|
|
|
|
U4 32
|
|
|
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J4 8
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R6 2
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Net 333 "" ""
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U4 40
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J4 2
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R4 2
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Net 334 "" ""
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C4 2
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C6 2
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C9 2
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Net 335 "/Ethernet Phy/ETH_LED1" "ETH_LED1"
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R8 2
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U4 27
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Net 336 "" ""
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J4 12
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R8 1
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Net 342 "" ""
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V2 1
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J5 2
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U6 10
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V2 1
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Net 343 "" ""
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C16 1
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R10 1
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J5 S4
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J5 S3
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J5 S1
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J5 S2
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Net 345 "+5V" "+5V"
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F1 2
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F2 2
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Net 346 "" ""
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L6 1
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F2 1
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Net 350 "" ""
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V3 1
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V3 1
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U7 11
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Net 354 "" ""
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J5 4
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L5 1
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Net 355 "" ""
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V4 1
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U7 10
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V4 1
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Net 356 "" ""
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C36 1
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C35 1
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C37 1
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Net 357 "" ""
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C38 1
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R15 1
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Net 358 "" ""
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L4 2
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J5 1
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Net 359 "" ""
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F1 1
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L4 1
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Net 360 "" ""
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C15 1
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C14 1
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C13 1
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Net 361 "" ""
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V1 1
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J5 3
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V1 1
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U6 11
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Net 362 "/FPGA Spartan6/PROG_MISO3" "PROG_MISO3"
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U8 7
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U1 U13
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Net 363 "/FPGA Spartan6/PROG_MISO2" "PROG_MISO2"
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U8 3
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U1 U14
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Net 364 "/FPGA Spartan6/PROG_MISO1" "PROG_MISO1"
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U8 2
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U1 AA20
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Net 365 "/FPGA Spartan6/PROG_MISO0" "PROG_MISO0"
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U8 5
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U1 AB20
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Net 366 "/FPGA Spartan6/NF_D7" "NF_D7"
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U5 44
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U1 A11
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Net 367 "/FPGA Spartan6/NF_D6" "NF_D6"
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U5 43
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U1 D11
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Net 368 "/Non volatile memories/NF_D5" "NF_D5"
|
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U5 42
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U1 C12
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Net 369 "/Non volatile memories/NF_D4" "NF_D4"
|
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U5 41
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U1 B12
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Net 370 "/Non volatile memories/NF_D3" "NF_D3"
|
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U5 32
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U1 A12
|
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Net 371 "/Non volatile memories/NF_D2" "NF_D2"
|
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|
U5 31
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U1 C13
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Net 372 "/Non volatile memories/NF_D1" "NF_D1"
|
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U1 A13
|
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U5 30
|
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Net 373 "/FPGA Spartan6/NF_D0" "NF_D0"
|
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U5 29
|
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U1 D14
|
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Net 374 "/Ethernet Phy/ETH_TXD3" "ETH_TXD3"
|
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|
U1 A9
|
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U4 20
|
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Net 375 "/FPGA Spartan6/ETH_TXD2" "ETH_TXD2"
|
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|
U4 19
|
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U1 C9
|
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Net 376 "/Ethernet Phy/ETH_TXD1" "ETH_TXD1"
|
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|
U4 18
|
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U1 C8
|
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Net 377 "/Ethernet Phy/ETH_TXD0" "ETH_TXD0"
|
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U1 D9
|
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U4 17
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Net 378 "/FPGA Spartan6/ETH_RXD3" "ETH_RXD3"
|
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U1 D6
|
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U4 3
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Net 379 "/Ethernet Phy/ETH_RXD2" "ETH_RXD2"
|
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U1 C6
|
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U4 4
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Net 380 "/Ethernet Phy/ETH_RXD1" "ETH_RXD1"
|
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|
U4 5
|
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|
U1 B6
|
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Net 381 "/Ethernet Phy/ETH_RXD0" "ETH_RXD0"
|
|
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|
U4 6
|
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|
U1 A6
|
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Net 382 "/FPGA Spartan6/M0_BA1" "M0_BA1"
|
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|
U2 27
|
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U1 G1
|
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Net 383 "/DDR Banks/M0_BA0" "M0_BA0"
|
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|
U2 26
|
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|
U1 G3
|
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Net 384 "/DDR Banks/M1_BA1" "M1_BA1"
|
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|
U3 27
|
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U1 K17
|
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Net 385 "/DDR Banks/M1_BA0" "M1_BA0"
|
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|
U1 J17
|
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|
U3 26
|
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|
Net 386 "/FPGA Spartan6/M1_DQ15" "M1_DQ15"
|
|
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|
|
U1 V22
|
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|
U3 65
|
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Net 387 "/FPGA Spartan6/M1_DQ14" "M1_DQ14"
|
|
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|
|
U1 V21
|
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|
U3 63
|
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Net 388 "/DDR Banks/M1_DQ13" "M1_DQ13"
|
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|
|
U1 U22
|
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|
U3 62
|
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Net 389 "/FPGA Spartan6/M1_DQ12" "M1_DQ12"
|
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|
|
U1 U20
|
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|
U3 60
|
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Net 390 "/DDR Banks/M1_DQ11" "M1_DQ11"
|
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|
|
U1 R22
|
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|
|
U3 59
|
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|
Net 391 "/DDR Banks/M1_DQ10" "M1_DQ10"
|
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|
|
U1 R20
|
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|
|
U3 57
|
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|
|
Net 392 "/FPGA Spartan6/SD_DAT3" "SD_DAT3"
|
|
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|
|
U1 C17
|
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|
|
J1 2
|
|
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|
|
Net 393 "/Non volatile memories/SD_DAT2" "SD_DAT2"
|
|
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|
|
U1 A17
|
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|
J1 1
|
|
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|
|
Net 394 "/FPGA Spartan6/SD_DAT1" "SD_DAT1"
|
|
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|
|
U1 B18
|
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|
J1 8
|
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|
|
Net 395 "/Non volatile memories/SD_DAT0" "SD_DAT0"
|
|
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|
|
J1 7
|
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|
U1 A18
|
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Net 396 "/FPGA Spartan6/M1_A7" "M1_A7"
|
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|
|
U3 38
|
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|
U1 E20
|
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Net 397 "/FPGA Spartan6/M1_A6" "M1_A6"
|
|
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|
|
U3 37
|
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|
U1 K19
|
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|
|
Net 398 "/DDR Banks/M1_A5" "M1_A5"
|
|
|
|
|
U3 36
|
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|
|
U1 K20
|
|
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|
|
Net 399 "/FPGA Spartan6/M1_A4" "M1_A4"
|
|
|
|
|
U1 F20
|
|
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|
|
U3 35
|
|
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|
|
Net 400 "/FPGA Spartan6/M1_A3" "M1_A3"
|
|
|
|
|
U1 G20
|
|
|
|
|
U3 32
|
|
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|
|
Net 401 "/FPGA Spartan6/M1_A2" "M1_A2"
|
|
|
|
|
U3 31
|
|
|
|
|
U1 E22
|
|
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|
|
Net 402 "/FPGA Spartan6/M1_A1" "M1_A1"
|
|
|
|
|
U1 F22
|
|
|
|
|
U3 30
|
|
|
|
|
Net 403 "/DDR Banks/M1_A0" "M1_A0"
|
|
|
|
|
U1 F21
|
|
|
|
|
U3 29
|
|
|
|
|
Net 404 "/FPGA Spartan6/M0_A12" "M0_A12"
|
|
|
|
|
U2 42
|
|
|
|
|
U1 D1
|
|
|
|
|
Net 405 "/FPGA Spartan6/M0_A11" "M0_A11"
|
|
|
|
|
U2 41
|
|
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|
|
U1 C1
|
|
|
|
|
Net 406 "/FPGA Spartan6/M0_A10" "M0_A10"
|
|
|
|
|
U1 G4
|
|
|
|
|
U2 28
|
|
|
|
|
Net 407 "/FPGA Spartan6/M0_A9" "M0_A9"
|
|
|
|
|
U1 E1
|
|
|
|
|
U2 40
|
|
|
|
|
Net 408 "/FPGA Spartan6/M0_A8" "M0_A8"
|
|
|
|
|
U1 E3
|
|
|
|
|
U2 39
|
|
|
|
|
Net 409 "/FPGA Spartan6/M0_A7" "M0_A7"
|
|
|
|
|
U2 38
|
|
|
|
|
U1 H6
|
|
|
|
|
Net 410 "/FPGA Spartan6/M1_DQ9" "M1_DQ9"
|
|
|
|
|
U3 56
|
|
|
|
|
U1 P22
|
|
|
|
|
Net 411 "/FPGA Spartan6/M1_DQ8" "M1_DQ8"
|
|
|
|
|
U3 54
|
|
|
|
|
U1 P21
|
|
|
|
|
Net 412 "/FPGA Spartan6/M1_DQ7" "M1_DQ7"
|
|
|
|
|
U3 13
|
|
|
|
|
U1 K22
|
|
|
|
|
Net 413 "/FPGA Spartan6/M1_DQ6" "M1_DQ6"
|
|
|
|
|
U1 K21
|
|
|
|
|
U3 11
|
|
|
|
|
Net 414 "/DDR Banks/M1_DQ5" "M1_DQ5"
|
|
|
|
|
U3 10
|
|
|
|
|
U1 J22
|
|
|
|
|
Net 415 "/DDR Banks/M1_DQ4" "M1_DQ4"
|
|
|
|
|
U1 J20
|
|
|
|
|
U3 8
|
|
|
|
|
Net 416 "/FPGA Spartan6/M1_DQ3" "M1_DQ3"
|
|
|
|
|
U3 7
|
|
|
|
|
U1 M22
|
|
|
|
|
Net 417 "/FPGA Spartan6/M1_DQ2" "M1_DQ2"
|
|
|
|
|
U3 5
|
|
|
|
|
U1 M21
|
|
|
|
|
Net 418 "/FPGA Spartan6/M1_DQ1" "M1_DQ1"
|
|
|
|
|
U1 N22
|
|
|
|
|
U3 4
|
|
|
|
|
Net 419 "/FPGA Spartan6/M1_DQ0" "M1_DQ0"
|
|
|
|
|
U3 2
|
|
|
|
|
U1 N20
|
|
|
|
|
Net 420 "/FPGA Spartan6/M1_A12" "M1_A12"
|
|
|
|
|
U3 42
|
|
|
|
|
U1 D22
|
|
|
|
|
Net 421 "/FPGA Spartan6/M1_A11" "M1_A11"
|
|
|
|
|
U3 41
|
|
|
|
|
U1 F19
|
|
|
|
|
Net 422 "/DDR Banks/M1_A10" "M1_A10"
|
|
|
|
|
U3 28
|
|
|
|
|
U1 G19
|
|
|
|
|
Net 423 "/DDR Banks/M1_A9" "M1_A9"
|
|
|
|
|
U3 40
|
|
|
|
|
U1 C22
|
|
|
|
|
Net 424 "/FPGA Spartan6/M1_A8" "M1_A8"
|
|
|
|
|
U1 C20
|
|
|
|
|
U3 39
|
|
|
|
|
Net 425 "/DDR Banks/M0_DQ3" "M0_DQ3"
|
|
|
|
|
U2 7
|
|
|
|
|
U1 M1
|
|
|
|
|
Net 426 "/FPGA Spartan6/M0_DQ2" "M0_DQ2"
|
|
|
|
|
U1 M2
|
|
|
|
|
U2 5
|
|
|
|
|
Net 427 "/FPGA Spartan6/M0_DQ1" "M0_DQ1"
|
|
|
|
|
U2 4
|
|
|
|
|
U1 N1
|
|
|
|
|
Net 428 "/DDR Banks/M0_DQ0" "M0_DQ0"
|
|
|
|
|
U2 2
|
|
|
|
|
U1 N3
|
|
|
|
|
Net 429 "/FPGA Spartan6/M0_A6" "M0_A6"
|
|
|
|
|
U1 J4
|
|
|
|
|
U2 37
|
|
|
|
|
Net 430 "/FPGA Spartan6/M0_A5" "M0_A5"
|
|
|
|
|
U1 K3
|
|
|
|
|
U2 36
|
|
|
|
|
Net 431 "/FPGA Spartan6/M0_A4" "M0_A4"
|
|
|
|
|
U1 F3
|
|
|
|
|
U2 35
|
|
|
|
|
Net 432 "/FPGA Spartan6/M0_A3" "M0_A3"
|
|
|
|
|
U2 32
|
|
|
|
|
U1 K6
|
|
|
|
|
Net 433 "/DDR Banks/M0_A2" "M0_A2"
|
|
|
|
|
U2 31
|
|
|
|
|
U1 H5
|
|
|
|
|
Net 434 "/DDR Banks/M0_A1" "M0_A1"
|
|
|
|
|
U1 H1
|
|
|
|
|
U2 30
|
|
|
|
|
Net 435 "/FPGA Spartan6/M0_A0" "M0_A0"
|
|
|
|
|
U2 29
|
|
|
|
|
U1 H2
|
|
|
|
|
Net 436 "/DDR Banks/M0_DQ15" "M0_DQ15"
|
|
|
|
|
U2 65
|
|
|
|
|
U1 V1
|
|
|
|
|
Net 437 "/FPGA Spartan6/M0_DQ14" "M0_DQ14"
|
|
|
|
|
U2 63
|
|
|
|
|
U1 V2
|
|
|
|
|
Net 438 "/DDR Banks/M0_DQ13" "M0_DQ13"
|
|
|
|
|
U2 62
|
|
|
|
|
U1 U1
|
|
|
|
|
Net 439 "/FPGA Spartan6/M0_DQ12" "M0_DQ12"
|
|
|
|
|
U1 U3
|
|
|
|
|
U2 60
|
|
|
|
|
Net 440 "/DDR Banks/M0_DQ11" "M0_DQ11"
|
|
|
|
|
U2 59
|
|
|
|
|
U1 R1
|
|
|
|
|
Net 441 "/DDR Banks/M0_DQ10" "M0_DQ10"
|
|
|
|
|
U2 57
|
|
|
|
|
U1 R3
|
|
|
|
|
Net 442 "/FPGA Spartan6/M0_DQ9" "M0_DQ9"
|
|
|
|
|
U1 P1
|
|
|
|
|
U2 56
|
|
|
|
|
Net 443 "/FPGA Spartan6/M0_DQ8" "M0_DQ8"
|
|
|
|
|
U1 P2
|
|
|
|
|
U2 54
|
|
|
|
|
Net 444 "/DDR Banks/M0_DQ7" "M0_DQ7"
|
|
|
|
|
U2 13
|
|
|
|
|
U1 K1
|
|
|
|
|
Net 445 "/FPGA Spartan6/M0_DQ6" "M0_DQ6"
|
|
|
|
|
U2 11
|
|
|
|
|
U1 K2
|
|
|
|
|
Net 446 "/FPGA Spartan6/M0_DQ5" "M0_DQ5"
|
|
|
|
|
U1 J1
|
|
|
|
|
U2 10
|
|
|
|
|
Net 447 "/DDR Banks/M0_DQ4" "M0_DQ4"
|
|
|
|
|
U1 J3
|
|
|
|
|
U2 8
|
|
|
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}
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#End
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