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fab/m1/prettygerbv: feeble attempt at showing at least some layer connectivity

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This commit is contained in:
Werner Almesberger 2011-06-10 10:55:39 -03:00
parent 2a6496d3ed
commit 4e4849154a
1 changed files with 10 additions and 7 deletions
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17
fab/m1/prettygerbv
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@ -106,14 +106,17 @@ back()
conn()
{
layers_begin 6
layer art06.pho $BACK
layer art05.pho $L5
layer art04.pho $L4
layer art03.pho $L3
layer art02.pho $L2
layer art01.pho $FRONT
layers_begin 3
# layer art06.pho $BACK
# layer art05.pho $L5
# layer art04.pho $L4
# layer art03.pho $L3
# layer art02.pho $L2
# layer art01.pho $FRONT
# layer $NAME-PCB_Edges.gbr $EDGE2
layer art02.pho $BACK
layer art01.pho $FRONT
[ "$drill" ] && layer $drill $DRILL
layers_end
run_gerbv "$1"