sie-ceimtun/Examples/Beta1/logic/build/project_r.unroutes

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Release 12.2 - par M.63c (lin64)
Copyright (c) 1995-2010 Xilinx, Inc.  All rights reserved.

Sun Oct 31 14:11:59 2010

All signals are completely routed.
Uploaded the first Beta to test in the development group 2010-10-31 02:34:22 +03:00			`Release 12.2 - par M.63c (lin64)`
			`Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.`

Pins corrected again 2010-10-31 21:13:54 +02:00			`Sun Oct 31 14:11:59 2010`
Uploaded the first Beta to test in the development group 2010-10-31 02:34:22 +03:00
			`All signals are completely routed.`