mirror of
git://projects.qi-hardware.com/xburst-tools.git
synced 2024-12-23 13:30:48 +02:00
add neo_gta02.h lowlevel_init.S kboot-stage1.lds
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parent
d076efdbe7
commit
02fe96ba6f
@ -14,18 +14,16 @@
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# MA 02111-1307 USA
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#
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TEXT_BASE =0x0000000
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LDS =kboot-stage1.lds
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INCLUDE =../include
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IMAGE =../image
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CFLAGS =-I $(INCLUDE) -g -c -o
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CFLAGS =-Wall -I $(INCLUDE) -g -c -o
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all:led.S led.c
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all:led.S led.c lowlevel_init.S
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$(CC) $(CFLAGS) led_S.o led.S
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$(CC) $(CFLAGS) led_C.o led.c
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$(LD) -Ttext $(TEXT_BASE) -g led_S.o led_C.o -o led.o
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$(CC) $(CFLAGS) lowlevel_init.o lowlevel_init.S
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$(LD) -T$(LDS) -g led_S.o led_C.o lowlevel_init.o -o led.o
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$(OBJCOPY) -O binary -S led.o $(IMAGE)/led_on
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clean:
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@ -1,53 +0,0 @@
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/*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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. = 0x00000000;
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. = ALIGN(4);
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.text :
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{
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led_S.o (.text)
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led_C.o (.text)
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*(.text)
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}
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. = ALIGN(4);
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.rodata : { *(.rodata) }
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. = ALIGN(4);
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.data : { *(.data) }
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. = ALIGN(4);
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.got : { *(.got) }
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. = ALIGN(4);
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__bss_start = .;
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.bss (NOLOAD) : { *(.bss) }
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_end = .;
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}
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118
qiboot/src/led.S
118
qiboot/src/led.S
@ -1,5 +1,57 @@
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#include <neo_gta02.h>
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.globl _start
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_start: b start_code
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/* ldr pc, _undefined_instruction
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ldr pc, _software_interrupt
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ldr pc, _prefetch_abort
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ldr pc, _data_abort
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ldr pc, _not_used
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ldr pc, _irq
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ldr pc, _fiq
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_undefined_instruction: .word undefined_instruction
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_software_interrupt: .word software_interrupt
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_prefetch_abort: .word prefetch_abort
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_data_abort: .word data_abort
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_not_used: .word not_used
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_irq: .word irq
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_fiq: .word fiq
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.balignl 16,0xdeadbeef
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*/
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_TEXT_BASE:
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.word TEXT_BASE
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.globl _armboot_start
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_armboot_start:
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.word _start
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/*
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* These are defined in the board-specific linker script.
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*/
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.globl _bss_start
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_bss_start:
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.word __bss_start
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.globl _bss_end
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_bss_end:
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.word _end
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#ifdef CONFIG_USE_IRQ
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/* IRQ stack memory (calculated at run-time) */
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.globl IRQ_STACK_START
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IRQ_STACK_START:
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.word 0x0badc0de
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/* IRQ stack memory (calculated at run-time) */
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.globl FIQ_STACK_START
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FIQ_STACK_START:
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.word 0x0badc0de
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#endif
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start_code:
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@ -65,8 +117,28 @@ start_code:
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mov r1, #0x1a
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str r1, [r0, #0x28]
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bl cpu_init_crit
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stack_setup:
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ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
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sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
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sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
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#ifdef CONFIG_USE_IRQ
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sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
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#endif
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sub sp, r0, #12 /* leave 3 words for abort-stack */
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clear_bss:
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ldr r0, _bss_start /* find start of bss segment */
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ldr r1, _bss_end /* stop here */
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mov r2, #0x00000000 /* clear */
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clbss_l:str r2, [r0] /* clear loop... */
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add r0, r0, #4
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cmp r0, r1
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ble clbss_l
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/* blink led */
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ldr sp,=1024*4
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.extern blink_led
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bl blink_led
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@ -76,3 +148,47 @@ delay:
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bne delay
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mov pc,lr
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/*
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*************************************************************************
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*
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* CPU_init_critical registers
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*
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* setup important registers
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* setup memory timing
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*
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*************************************************************************
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*/
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cpu_init_crit:
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/*
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* flush v4 I/D caches
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*/
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mov r0, #0
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mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
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mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
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/*
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* disable MMU stuff and caches
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*/
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mrc p15, 0, r0, c1, c0, 0
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bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
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bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
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orr r0, r0, #0x00000002 @ set bit 2 (A) Align
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orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
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mcr p15, 0, r0, c1, c0, 0
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/*
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* before relocating, we have to setup RAM timing
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* because memory timing is board-dependend, you will
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* find a lowlevel_init.S in your board directory.
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*/
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mov ip, lr
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/* bl lowlevel_init*/
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mov lr, ip
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mov pc, lr
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