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qi-clean-s3c6410-hs_mmc.patch

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Signed-off-by: Andy Green <andy@openmoko.com>
This commit is contained in:
Andy Green 2008-10-22 01:41:59 +01:00 committed by Andy Green
parent d83ef548d3
commit 38ccc50783
4 changed files with 10 additions and 37 deletions
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5
qiboot/build
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@ -4,3 +4,8 @@ make clean && \
make CPU=s3c6410 && \
make CPU=s3c2442
# as root then...
#
# ./6410-partition-sd.sh sde sdhc image/qi-s3c6410-andy_???????????????? x
# mount /dev/sde2 /mnt ; cp ../kernel/linux-2.6/uImage.bin /mnt/boot ; umount /dev/sde2

1
qiboot/src/cpu/s3c2442/start_qi.c
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@ -113,6 +113,7 @@ void start_qi(void)
puts(this_board->name);
puts(", ");
puts((this_board->get_board_variant)()->name);
puts("\n");
/*
* jump to bootloader_second_phase() running from DRAM copy

39
qiboot/src/cpu/s3c6410/hs_mmc.c
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@ -31,27 +31,10 @@
/* Global variables */
static u32 rd_cnt_HSMMC;
//static u32 wt_cnt_HSMMC;
static u32 BlockNum_HSMMC = 0;
//static u32 WriteBlockCnt_INT = 0;
static u32 ReadBlockCnt_INT = 0;
//static u32 WRITEINT_DONE = 0;
//static u32 READINT_DONE = 0;
//static u32 COMPARE_INT_DONE = 0;
//static u32 CompareCnt_INT = 0;
//static u32 BufferBoundary_INT_Cnt = 0;
static u32 HS_DMA_END = 0;
//static u32 HS_CARD_DETECT = 0;
//static u32 ocr_check = 0;
//static u32 mmc_card = 0;
static u32 rca = 0;
static ulong HCLK;
//static u32 card_mid = 0;
int movi_hc = 1; /* sdhc style block indexing */
enum card_type card_type;
@ -392,7 +375,7 @@ static void check_dma_int (void)
{
u32 i;
for (i = 0; i < 0x1000000; i++) {
for (i = 0; i < 0x10000000; i++) {
if (s3c_hsmmc_readw(HM_NORINTSTS) & 0x0002) {
HS_DMA_END = 1;
s3c_hsmmc_writew(s3c_hsmmc_readw(HM_NORINTSTS) | 0x0002, HM_NORINTSTS);
@ -404,6 +387,7 @@ static void check_dma_int (void)
break;
}
}
puts("check_dma_int: timeout\n");
}
@ -623,23 +607,10 @@ unsigned long s3c6410_mmc_bread(int dev_num, unsigned long start_blk, unsigned l
u32 blksize; //j, , Addr_temp = start_blk;
u32 dma = 0, cmd, multi; //, TotalReadByte, read_blk_cnt = 0;
rd_cnt_HSMMC = 0;
HS_DMA_END = 0;
BlockNum_HSMMC = 0;
rd_cnt_HSMMC = 0;
ReadBlockCnt_INT = 0;
// printf("\nHS-MMC block Read test: %d, 0x%x 0x%x\n", test, start_blk, blknum);
BlockNum_HSMMC = blknum;
blksize = Card_OneBlockSize_ver1;
#if 0
Rx_buffer_HSMMC = (u32 *) SDI_Rx_buffer_HSMMC;
for (i = 0; i < (blksize * BlockNum_HSMMC) / 4; i++)
*(Rx_buffer_HSMMC + i) = 0x0;
#endif
while (!check_card_status());
s3c_hsmmc_writew(s3c_hsmmc_readw(HM_NORINTSTSEN) & ~(DMA_STS_INT_EN | BLOCKGAP_EVENT_STS_INT_EN), HM_NORINTSTSEN);
@ -649,7 +620,7 @@ unsigned long s3c6410_mmc_bread(int dev_num, unsigned long start_blk, unsigned l
dma = 1;
set_blksize_register(7, 512); // Maximum DMA Buffer Size, Block Size
set_blkcnt_register(BlockNum_HSMMC); // Block Numbers to Write
set_blkcnt_register(blknum); // Block Numbers to Write
if (movi_hc)
set_arg_register(start_blk); // Card Start Block Address to Write
@ -671,12 +642,8 @@ unsigned long s3c6410_mmc_bread(int dev_num, unsigned long start_blk, unsigned l
check_dma_int();
while (!HS_DMA_END);
// puts("\nDMA Read End\n");
HS_DMA_END = 0;
BlockNum_HSMMC = 0;
rd_cnt_HSMMC = 0;
ReadBlockCnt_INT = 0;
return 0;
}

2
qiboot/src/phase2.c
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@ -66,7 +66,7 @@ void bootloader_second_phase(void)
/* eat leading white space */
for (p = this_kernel->commandline; *p == ' '; p++);
puts("\n\nTrying kernel: ");
puts("\nTrying kernel: ");
puts(this_kernel->name);
puts("\n");