qi-hardware/xburst-tools
1
0
Fork 0
mirror of git://projects.qi-hardware.com/xburst-tools.git synced 2024-11-01 16:25:20 +02:00
Code

add read configure file code

Browse Source
This commit is contained in:
xiangfu 2009-04-27 08:54:10 +00:00
parent 4f47892d13
commit 60cb0eb193
6 changed files with 117 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
flash-tool/Makefile
View File

@ -31,11 +31,11 @@ endif
CC = gcc
CFLAGS += -pedantic -Wall -W -O1 -g3 -std=gnu99
LDFLAGS += -lusb
LDFLAGS += -lusb -lconfuse
BINARY_NAME = inflash
SRC_C= main.c usb.c
SRC_H= main.h usb.h
SRC_H= main.h usb.h usb_boot_defines.h
SRC_O= $(SRC_C:.c=.o)
$(BINARY_NAME): $(SRC_O) $(SRC_H) Makefile

59
flash-tool/main.c
View File

@ -23,6 +23,7 @@
#include "main.h"
#include "usb.h"
#include "usb_boot_defines.h"
#include <stdio.h>
#include <string.h>
@ -32,9 +33,48 @@
#include <fcntl.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <confuse.h>
fw_args_t fw_args;
int load_file(struct ingenic_dev *ingenic_dev, const char *file_path)
static int parse_configure(char * file_path)
{
cfg_opt_t opts[] = {
CFG_SIMPLE_INT("EXTCLK", &fw_args.ext_clk),
CFG_SIMPLE_INT("CPUSPEED", &fw_args.cpu_speed),
CFG_SIMPLE_INT("PHMDIV", &fw_args.phm_div),
CFG_SIMPLE_INT("BOUDRATE", &fw_args.boudrate),
CFG_SIMPLE_INT("USEUART", &fw_args.use_uart),
CFG_SIMPLE_INT("BUSWIDTH", &fw_args.bus_width),
CFG_SIMPLE_INT("BANKS", &fw_args.bank_num),
CFG_SIMPLE_INT("ROWADDR", &fw_args.row_addr),
CFG_SIMPLE_INT("COLADDR", &fw_args.col_addr),
CFG_SIMPLE_INT("ISMOBILE", &fw_args.is_mobile),
CFG_SIMPLE_INT("ISBUSSHARE", &fw_args.is_busshare),
CFG_SIMPLE_INT("DEBUGOPS", &fw_args.debug_ops),
CFG_SIMPLE_INT("PINNUM", &fw_args.pin_num),
CFG_SIMPLE_INT("START", &fw_args.start),
CFG_SIMPLE_INT("SIZE", &fw_args.size),
CFG_END()
};
cfg_t *cfg;
cfg = cfg_init(opts, 0);
if (cfg_parse(cfg, file_path) == CFG_PARSE_ERROR)
return -1;
cfg_free(cfg);
total_size = (unsigned int)(2 << (fw_args.row_addr + fw_args.col_addr - 1)) * 2
* (fw_args.bank_num + 1) * 2
* (2 - fw_args.bus_width);
return 1;
}
static int load_file(struct ingenic_dev *ingenic_dev, const char *file_path)
{
struct stat fstat;
int fd, status, res = -1;
@ -73,6 +113,8 @@ int load_file(struct ingenic_dev *ingenic_dev, const char *file_path)
goto close;
}
memcpy(ingenic_dev->file_buff + 8, &fw_args, sizeof(fw_args_t));
res = 1;
close:
@ -84,6 +126,7 @@ out:
int main(int argc, char **argv)
{
struct ingenic_dev ingenic_dev;
int res = EXIT_FAILURE;
if ((getuid()) || (getgid())) {
@ -92,6 +135,10 @@ int main(int argc, char **argv)
}
memset(&ingenic_dev, 0, sizeof(struct ingenic_dev));
memset(&fw_args, 0, sizeof(fw_args_t));
if (parse_configure(CONFIG_FILE_PATH) < 1)
goto out;
if (usb_ingenic_init(&ingenic_dev) < 1)
goto out;
@ -99,12 +146,22 @@ int main(int argc, char **argv)
if (usb_get_ingenic_cpu(&ingenic_dev) < 1)
goto out;
/* now we upload the usb boot stage1 */
if (load_file(&ingenic_dev, STAGE1_FILE_PATH) < 1)
goto out;
if (usb_ingenic_upload(&ingenic_dev, 1) < 1)
goto cleanup;
#if 0
/* now we upload the usb boot stage2 */
sleep(1);
if (load_file(&ingenic_dev, STAGE2_FILE_PATH) < 1)
goto cleanup;
if (usb_ingenic_upload(&ingenic_dev, 2) < 1)
goto cleanup;
#endif
res = EXIT_SUCCESS;
cleanup:

6
flash-tool/main.h
View File

@ -23,11 +23,12 @@
#include <stdint.h>
#define VENDOR_ID 0x601a
#define PRODUCT_ID 0x4740
#define STAGE1_FILE_PATH "fw.bin"
#define STAGE2_FILE_PATH "usb_boot.bin"
#define CONFIG_FILE_PATH "usb_boot.cfg"
struct ingenic_dev {
@ -38,3 +39,6 @@ struct ingenic_dev {
char *file_buff;
int file_len;
};
unsigned total_size;

43
flash-tool/usb.c
View File

@ -23,6 +23,7 @@
#include "main.h"
#include "usb.h"
#include "usb_boot_defines.h"
#include <usb.h>
#include <stdio.h>
@ -150,7 +151,7 @@ int usb_get_ingenic_cpu(struct ingenic_dev *ingenic_dev)
if (status != sizeof(ingenic_dev->cpu_info_buff)) {
fprintf(stderr, "Error - can't retrieve Ingenic CPU information: %i\n", status);
goto out;
return status;
}
printf("CPU data: %02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x : %s\n",
@ -160,22 +161,44 @@ int usb_get_ingenic_cpu(struct ingenic_dev *ingenic_dev)
ingenic_dev->cpu_info_buff[6], ingenic_dev->cpu_info_buff[7],
ingenic_dev->cpu_info_buff);
status = 1;
return 1;
}
out:
int usb_ingenic_flush_cache(struct ingenic_dev *ingenic_dev)
{
int status;
status = usb_control_msg(ingenic_dev->usb_handle,
/* bmRequestType */ USB_ENDPOINT_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
/* bRequest */ VR_FLUSH_CACHES,
/* wValue */ 0,
/* wIndex */ 0,
/* Data */ 0,
/* wLength */ 0,
USB_TIMEOUT);
if (status != sizeof(ingenic_dev->cpu_info_buff)) {
fprintf(stderr, "Error - can't flush cache: %i\n", status);
return status;
}
return 1;
}
int usb_ingenic_upload(struct ingenic_dev *ingenic_dev, int stage)
{
int status;
unsigned int stage2_addr;
stage2_addr = total_size + 0x80000000;
stage2_addr -= CODE_SIZE;
/* tell the device the RAM address to store the file */
status = usb_control_msg(ingenic_dev->usb_handle,
/* bmRequestType */ USB_ENDPOINT_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
/* bRequest */ VR_SET_DATA_ADDRESS,
/* wValue */ (stage == 1 ? STAGE1_ADDR_MSB : STAGE2_ADDR_MSB),
/* wIndex */ (stage == 1 ? STAGE1_ADDR_LSB : STAGE2_ADDR_LSB),
/* wValue */ STAGE_ADDR_MSB(stage == 1 ? 0x80002000 : stage2_addr),
/* wIndex */ STAGE_ADDR_LSB(stage == 1 ? 0x80002000 : stage2_addr),
/* Data */ 0,
/* wLength */ 0,
USB_TIMEOUT);
@ -212,12 +235,17 @@ int usb_ingenic_upload(struct ingenic_dev *ingenic_dev, int stage)
return -1;
}
if (stage != 1) {
usb_get_ingenic_cpu(ingenic_dev);
usb_ingenic_flush_cache(ingenic_dev);
}
/* tell the device to start the uploaded device */
status = usb_control_msg(ingenic_dev->usb_handle,
/* bmRequestType */ USB_ENDPOINT_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
/* bRequest */ (stage == 1 ? VR_PROGRAM_START1 : VR_PROGRAM_START2),
/* wValue */ (stage == 1 ? STAGE1_ADDR_MSB : STAGE2_ADDR_MSB),
/* wIndex */ (stage == 1 ? STAGE1_ADDR_LSB : STAGE2_ADDR_LSB),
/* wValue */ STAGE_ADDR_MSB(stage == 1 ? 0x80002000 : stage2_addr),
/* wIndex */ STAGE_ADDR_LSB(stage == 1 ? 0x80002000 : stage2_addr),
/* Data */ 0,
/* wLength */ 0,
USB_TIMEOUT);
@ -227,6 +255,7 @@ int usb_ingenic_upload(struct ingenic_dev *ingenic_dev, int stage)
goto out;
}
usb_get_ingenic_cpu(ingenic_dev);
status = 1;
out:

6
flash-tool/usb.h
View File

@ -35,10 +35,8 @@
#define VR_CONFIGRATION 0x09
#define VR_GET_NUM 0x0a
#define STAGE1_ADDR_MSB (0x80002000 >> 16)
#define STAGE1_ADDR_LSB (0x80002000 & 0xffff)
#define STAGE2_ADDR_MSB 0x8000
#define STAGE2_ADDR_LSB 0x0000
#define STAGE_ADDR_MSB(addr) ((addr) >> 16)
#define STAGE_ADDR_LSB(addr) ((addr) & 0xffff)
#define USB_PACKET_SIZE 512
#define USB_TIMEOUT 5000

26
flash-tool/usb_boot.cfg
View File

@ -35,19 +35,19 @@ ISMOBILE = 0 #Define whether SDRAM is mobile SDRAM, this only valid for Jz4750 ,
ISBUSSHARE = 1 #Define whether SDRAM bus share with NAND 1:shared 0:unshared
# [NAND]
BUSWIDTH = 8 #The width of the NAND flash chip in bits (8|16|32)
ROWCYCLES = 3 #The row address cycles (2|3)
PAGESIZE = 2048 #The page size of the NAND chip in bytes(512|2048|4096)
PAGEPERBLOCK = 128 #The page number per block
FORCEERASE = 1 #The force to erase flag (0|1)
OOBSIZE = 64 #oob size in byte
ECCPOS = 6 #Specify the ECC offset inside the oob data (0-[oobsize-1])
BADBLACKPOS = 0 #Specify the badblock flag offset inside the oob (0-[oobsize-1])
BADBLACKPAGE = 127 #Specify the page number of badblock flag inside a block(0-[PAGEPERBLOCK-1])
PLANENUM = 1 #The planes number of target nand flash
BCHBIT = 4 #Specify the hardware BCH algorithm for 4750 (4|8)
WPPIN = 0 #Specify the write protect pin number
BLOCKPERCHIP = 0 #Specify the block number per chip,0 means ignore
# BUSWIDTH = 8 #The width of the NAND flash chip in bits (8|16|32)
# ROWCYCLES = 3 #The row address cycles (2|3)
# PAGESIZE = 2048 #The page size of the NAND chip in bytes(512|2048|4096)
# PAGEPERBLOCK = 128 #The page number per block
# FORCEERASE = 1 #The force to erase flag (0|1)
# OOBSIZE = 64 #oob size in byte
# ECCPOS = 6 #Specify the ECC offset inside the oob data (0-[oobsize-1])
# BADBLACKPOS = 0 #Specify the badblock flag offset inside the oob (0-[oobsize-1])
# BADBLACKPAGE = 127 #Specify the page number of badblock flag inside a block(0-[PAGEPERBLOCK-1])
# PLANENUM = 1 #The planes number of target nand flash
# BCHBIT = 4 #Specify the hardware BCH algorithm for 4750 (4|8)
# WPPIN = 0 #Specify the write protect pin number
# BLOCKPERCHIP = 0 #Specify the block number per chip,0 means ignore
# [END]