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git://projects.qi-hardware.com/xburst-tools.git
synced 2024-11-22 07:13:10 +02:00
code style cleanup
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@ -22,13 +22,13 @@
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#include "usb_boot.h"
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#include "usb_boot_defines.h"
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#define __nand_enable() (REG_EMC_NFCSR |= EMC_NFCSR_NFE1 | EMC_NFCSR_NFCE1)
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#define __nand_enable() (REG_EMC_NFCSR |= EMC_NFCSR_NFE1 | EMC_NFCSR_NFCE1)
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#define __nand_disable() (REG_EMC_NFCSR &= ~(EMC_NFCSR_NFCE1))
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#define __nand_ecc_rs_encoding() (REG_EMC_NFECR = EMC_NFECR_ECCE | EMC_NFECR_ERST | EMC_NFECR_RS | EMC_NFECR_RS_ENCODING)
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#define __nand_ecc_rs_decoding() (REG_EMC_NFECR = EMC_NFECR_ECCE | EMC_NFECR_ERST | EMC_NFECR_RS | EMC_NFECR_RS_DECODING)
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#define __nand_ecc_disable() (REG_EMC_NFECR &= ~EMC_NFECR_ECCE)
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#define __nand_ecc_encode_sync() while (!(REG_EMC_NFINTS & EMC_NFINTS_ENCF))
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#define __nand_ecc_decode_sync() while (!(REG_EMC_NFINTS & EMC_NFINTS_DECF))
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#define __nand_ecc_disable() (REG_EMC_NFECR &= ~EMC_NFECR_ECCE)
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#define __nand_ecc_encode_sync() while (!(REG_EMC_NFINTS & EMC_NFINTS_ENCF))
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#define __nand_ecc_decode_sync() while (!(REG_EMC_NFINTS & EMC_NFINTS_DECF))
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#define __nand_ready() ((REG_GPIO_PXPIN(2) & 0x40000000) ? 1 : 0)
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#define __nand_ecc() (REG_EMC_NFECC & 0x00ffffff)
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@ -42,7 +42,7 @@
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#define CMD_READC 0x50
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#define CMD_ERASE_SETUP 0x60
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#define CMD_ERASE 0xD0
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#define CMD_READ_STATUS 0x70
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#define CMD_READ_STATUS 0x70
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#define CMD_CONFIRM 0x30
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#define CMD_SEQIN 0x80
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#define CMD_PGPROG 0x10
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@ -53,12 +53,12 @@
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#define OP_ERASE 0
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#define OP_WRITE 1
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#define OP_READ 2
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#define OP_READ 2
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#define ECC_BLOCK 512
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#define ECC_POS 6
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#define PAR_SIZE 9
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#define ECC_SIZE 36
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#define ECC_POS 6
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#define PAR_SIZE 9
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#define ECC_SIZE 36
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static volatile unsigned char *gpio_base = (volatile unsigned char *)0xb0010000;
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static volatile unsigned char *emc_base = (volatile unsigned char *)0xb3010000;
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@ -68,14 +68,11 @@ static volatile unsigned char *cmdport = (volatile unsigned char *)0xb8008000;
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static int bus = 8, row = 2, pagesize = 2048, oobsize = 64, ppb = 128;
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static int bad_block_pos,bad_block_page,force_erase,ecc_pos,wp_pin;
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extern struct hand Hand;
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static u8 oob_buf[256] = {0};
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extern struct hand Hand;
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extern u16 handshake_PKT[4];
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#define dprintf(x) serial_puts(x)
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static unsigned int EMC_CSN[4]=
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{
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static unsigned int EMC_CSN[4] = {
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0xb8000000,
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0xb4000000,
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0xa8000000,
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@ -165,8 +162,7 @@ int nand_init_4740(int bus_width, int row_cycle, int page_size, int page_per_blo
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wp_pin = Hand.nand_wppin;
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/* Initialize NAND Flash Pins */
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if (wp_pin)
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{
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if (wp_pin) {
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__gpio_as_output(wp_pin);
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__gpio_disable_pull(wp_pin);
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}
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@ -299,8 +295,7 @@ u32 nand_read_raw_4740(void *buf, u32 startpage, u32 pagecount, int option)
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read_proc(tmpbuf, pagesize);
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tmpbuf += pagesize;
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if (option != NO_OOB)
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{
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if (option != NO_OOB) {
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read_oob(tmpbuf, oobsize, cur_page);
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tmpbuf += oobsize;
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}
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@ -319,11 +314,12 @@ u32 nand_erase_4740(int blk_num, int sblk, int force)
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if (wp_pin)
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__gpio_set_pin(wp_pin);
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cur = sblk * ppb;
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for (i = 0; i < blk_num; ) {
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rowaddr = cur;
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select_chip(cur / ppb);
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if ( !force ) {
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if (!force) {
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if (nand_check_block(cur/ppb)) {
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cur += ppb;
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blk_num += Hand.nand_plane;
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