mirror of
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0ca1d89412
Qi fails to boot from NAND. Qi booting from SD goes fine. Booting NAND from NOR works as well. I have found the problem. The error was because we check if the current block is bad or the next one is bad. And skip the current block even if only the next one is bad. This way we skip good block before a bad one. This patch fixes the bug. Signed-off-by: Dmitry Kurochkin <dmitry.kurochkin@gmail.com>
157 lines
3.6 KiB
C
157 lines
3.6 KiB
C
/*
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* nand_read.c: Simple NAND read functions for booting from NAND
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*
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* This is used by cpu/arm920/start.S assembler code,
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* and the board-specific linker script must make sure this
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* file is linked within the first 4kB of NAND flash.
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*
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* Taken from GPLv2 licensed vivi bootloader,
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* Copyright (C) 2002 MIZI Research, Inc.
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*
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* Author: Hwang, Chideok <hwang@mizi.com>
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* Date : $Date: 2004/02/04 10:37:37 $
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*
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* u-boot integration and bad-block skipping (C) 2006 by OpenMoko, Inc.
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* Author: Harald Welte <laforge@openmoko.org>
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*/
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/* NOTE this stuff runs in steppingstone context! */
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/* the API refers to 512-byte blocks */
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#include <qi.h>
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#include "nand_read.h"
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#define NAND_CMD_READ0 0
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#define NAND_CMD_READSTART 0x30
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#define __REGb(x) (*(volatile unsigned char *)(x))
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#define __REGw(x) (*(volatile unsigned short *)(x))
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#define __REGi(x) (*(volatile unsigned int *)(x))
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#define NF_BASE 0x4e000000
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#define NFCONF __REGi(NF_BASE + 0x0)
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#define NFCONT __REGi(NF_BASE + 0x4)
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#define NFCMD __REGb(NF_BASE + 0x8)
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#define NFADDR __REGb(NF_BASE + 0xc)
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#define NFDATA __REGb(NF_BASE + 0x10)
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#define NFDATA16 __REGw(NF_BASE + 0x10)
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#define NFSTAT __REGb(NF_BASE + 0x20)
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#define NFSTAT_BUSY 1
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#define nand_select() (NFCONT &= ~(1 << 1))
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#define nand_deselect() (NFCONT |= (1 << 1))
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#define nand_clear_RnB() (NFSTAT |= (1 << 2))
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static inline void nand_wait(void)
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{
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int i;
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while (!(NFSTAT & NFSTAT_BUSY))
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for (i=0; i<10; i++);
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}
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/* configuration for 2440 with 2048byte sized flash */
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#define NAND_5_ADDR_CYCLE
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#define NAND_PAGE_SIZE 2048
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#define BAD_BLOCK_OFFSET NAND_PAGE_SIZE
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#define NAND_BLOCK_MASK (NAND_PAGE_SIZE - 1)
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#define NAND_BLOCK_SIZE (NAND_PAGE_SIZE * 64)
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int s3c2442_nand_is_bad_block(unsigned long block_index)
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{
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unsigned char data;
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unsigned long page_num;
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nand_select();
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nand_clear_RnB();
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page_num = block_index >> 2; /* addr / 2048 */
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NFCMD = NAND_CMD_READ0;
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NFADDR = BAD_BLOCK_OFFSET & 0xff;
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NFADDR = (BAD_BLOCK_OFFSET >> 8) & 0xff;
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NFADDR = page_num & 0xff;
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NFADDR = (page_num >> 8) & 0xff;
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NFADDR = (page_num >> 16) & 0xff;
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NFCMD = NAND_CMD_READSTART;
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nand_wait();
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data = (NFDATA & 0xff);
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if (data != 0xff)
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return 1;
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return 0;
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}
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static int nand_read_page_ll(unsigned char *buf, unsigned long block512, int blocks512)
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{
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unsigned short *ptr16 = (unsigned short *)buf;
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unsigned int i, page_num;
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unsigned int block_amount;
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int blocks_possible = (3 - (block512 & 3)) + 1;
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if (blocks512 > blocks_possible)
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blocks512 = blocks_possible;
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block_amount = (NAND_PAGE_SIZE / 4 / 2) * blocks512;
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nand_clear_RnB();
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NFCMD = NAND_CMD_READ0;
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page_num = block512 >> 2; /* 512 block -> 2048 block */
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/* Write Address */
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NFADDR = 0;
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NFADDR = (block512 & 3) << 1; /* which 512 block in 2048 */
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NFADDR = page_num & 0xff;
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NFADDR = (page_num >> 8) & 0xff;
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NFADDR = (page_num >> 16) & 0xff;
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NFCMD = NAND_CMD_READSTART;
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nand_wait();
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for (i = 0; i < block_amount; i++)
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*ptr16++ = NFDATA16;
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return blocks512;
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}
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/* low level nand read function */
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int nand_read_ll(unsigned char *buf, unsigned long start_block512,
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int blocks512)
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{
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int i, j;
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/* chip Enable */
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nand_select();
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nand_clear_RnB();
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for (i = 0; i < 10; i++)
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;
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while (blocks512 > 0) {
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if (s3c2442_nand_is_bad_block(start_block512)) {
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start_block512 += 4;
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if (start_block512 >> 2 > BAD_BLOCK_OFFSET)
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/* end of NAND */
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return -1;
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continue;
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}
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j = nand_read_page_ll(buf, start_block512, blocks512);
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start_block512 += j;
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buf += j << 9;
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blocks512 -= j;
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if (this_board->get_ui_keys)
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if ((this_board->get_ui_keys)() & UI_ACTION_SKIPKERNEL) {
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puts(" ** skipping \n");
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return -3;
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}
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}
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/* chip Disable */
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nand_deselect();
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return 0;
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}
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