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mirror of git://projects.qi-hardware.com/xue.git synced 2024-11-07 09:39:41 +02:00

USB A Phy has been routed

This commit is contained in:
Andres Calderon 2010-08-24 06:59:29 -05:00
parent bbf8fde734
commit 3eea348bed
15 changed files with 36233 additions and 35459 deletions

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 23 Aug 2010 10:36:19 PM COT
EESchema Schematic File Version 2 date Tue 24 Aug 2010 06:53:07 AM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 23 Aug 2010 10:36:19 PM COT
EESchema Schematic File Version 2 date Tue 24 Aug 2010 06:53:07 AM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 23 Aug 2010 10:36:19 PM COT
EESchema Schematic File Version 2 date Tue 24 Aug 2010 06:53:07 AM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -59,26 +59,26 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text HLabel 17150 700 0 60 BiDi ~ 0
Text HLabel 17500 1800 0 60 BiDi ~ 0
USBD_VP
Wire Wire Line
17250 700 17150 700
Text HLabel 17150 800 0 60 BiDi ~ 0
17600 2700 17500 2700
Text HLabel 17500 1300 0 60 BiDi ~ 0
USBD_SPD
Text HLabel 17150 600 0 60 BiDi ~ 0
Text HLabel 17500 2100 0 60 BiDi ~ 0
USBD_OE_N
Text HLabel 17150 900 0 60 BiDi ~ 0
Text HLabel 17500 2000 0 60 BiDi ~ 0
USBD_RCV
Text HLabel 17150 500 0 60 BiDi ~ 0
Text HLabel 17500 1900 0 60 BiDi ~ 0
USBD_VM
Wire Wire Line
17250 600 17150 600
17600 2100 17500 2100
Wire Wire Line
17150 500 17250 500
17500 1800 17600 1800
Wire Wire Line
17250 900 17150 900
17600 2000 17500 2000
Wire Wire Line
17250 800 17150 800
17600 1900 17500 1900
Wire Wire Line
17800 7450 17650 7450
Wire Wire Line
@ -465,9 +465,9 @@ Connection ~ 5300 14350
Wire Wire Line
5300 14350 5300 14400
Wire Wire Line
5650 14350 5650 14400
5650 14400 5650 14350
Wire Wire Line
4950 14400 4950 14350
4950 14350 4950 14400
Connection ~ 4950 14350
Wire Wire Line
5650 14850 5650 14800
@ -1159,9 +1159,9 @@ Wire Wire Line
2000 12450 2000 12400
Connection ~ 2000 12400
Wire Wire Line
2700 12900 2700 12850
2700 12850 2700 12900
Wire Wire Line
2000 12850 2000 12900
2000 12900 2000 12850
Connection ~ 2000 12900
Connection ~ 1650 13450
Wire Wire Line
@ -2888,13 +2888,13 @@ F 1 "GND" H 1600 5880 30 0001 C CNN
1 1600 5950
-1 0 0 -1
$EndComp
Text HLabel 17500 1200 0 60 BiDi ~ 0
Text HLabel 17500 2700 0 60 BiDi ~ 0
USBA_VM
Text HLabel 17500 2600 0 60 BiDi ~ 0
USBA_VP
Text HLabel 17500 1700 0 60 BiDi ~ 0
USBA_RCV
Text HLabel 17500 1300 0 60 BiDi ~ 0
Text HLabel 17500 1200 0 60 BiDi ~ 0
USBA_OE_N
Text HLabel 17500 1600 0 60 BiDi ~ 0
USBA_SPD

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 23 Aug 2010 10:36:19 PM COT
EESchema Schematic File Version 2 date Tue 24 Aug 2010 06:53:07 AM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 23 Aug 2010 10:36:19 PM COT
EESchema Schematic File Version 2 date Tue 24 Aug 2010 06:53:07 AM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 23 Aug 2010 10:36:19 PM COT
EESchema Schematic File Version 2 date Tue 24 Aug 2010 06:53:07 AM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -59,6 +59,14 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text Label 3950 6550 0 40 ~ 0
USBD_D+
Text Label 3950 6450 0 40 ~ 0
USBD_D-
Text Label 4100 2850 0 40 ~ 0
USBA_D+
Text Label 4100 2750 0 40 ~ 0
USBA_D-
$Comp
L C C86
U 1 1 4C71C9C5
@ -74,8 +82,8 @@ L C C87
U 1 1 4C71C9C4
P 7850 1500
F 0 "C87" H 7900 1600 50 0000 L CNN
F 1 "1uF" H 7900 1400 50 0000 L CNN
F 2 "0603" H 7850 1500 60 0001 C CNN
F 1 "100nF" H 7900 1400 50 0000 L CNN
F 2 "0402" H 7850 1500 60 0001 C CNN
1 7850 1500
1 0 0 -1
$EndComp
@ -84,7 +92,7 @@ L C C88
U 1 1 4C71C9C3
P 8200 1500
F 0 "C88" H 8250 1600 50 0000 L CNN
F 1 "470nF" H 8250 1400 50 0000 L CNN
F 1 "100nF" H 8250 1400 50 0000 L CNN
F 2 "0402" H 8200 1500 60 0001 C CNN
1 8200 1500
1 0 0 -1
@ -734,7 +742,8 @@ L C C36
U 1 1 4C6552BD
P 2850 5200
F 0 "C36" H 2900 5300 50 0000 L CNN
F 1 "1uF" H 2900 5100 50 0000 L CNN
F 1 "100nF" H 2900 5100 50 0000 L CNN
F 2 "0402" H 2850 5200 60 0001 C CNN
1 2850 5200
1 0 0 -1
$EndComp
@ -743,7 +752,8 @@ L C C37
U 1 1 4C6552BC
P 3200 5200
F 0 "C37" H 3250 5300 50 0000 L CNN
F 1 "470nF" H 3250 5100 50 0000 L CNN
F 1 "100nF" H 3250 5100 50 0000 L CNN
F 2 "0402" H 3200 5200 60 0001 C CNN
1 3200 5200
1 0 0 -1
$EndComp
@ -977,7 +987,7 @@ L C C15
U 1 1 4C5F2039
P 3150 1500
F 0 "C15" H 3200 1600 50 0000 L CNN
F 1 "470nF" H 3200 1400 50 0000 L CNN
F 1 "100nF" H 3200 1400 50 0000 L CNN
1 3150 1500
1 0 0 -1
$EndComp
@ -986,7 +996,8 @@ L C C14
U 1 1 4C5F2037
P 2800 1500
F 0 "C14" H 2850 1600 50 0000 L CNN
F 1 "1uF" H 2850 1400 50 0000 L CNN
F 1 "100nF" H 2850 1400 50 0000 L CNN
F 2 "0402" H 2800 1500 60 0001 C CNN
1 2800 1500
1 0 0 -1
$EndComp

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 23 Aug 2010 10:36:19 PM COT
EESchema Schematic File Version 2 date Tue 24 Aug 2010 06:53:07 AM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03

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EESchema-LIBRARY Version 2.3 Date: Mon 23 Aug 2010 10:36:19 PM COT
EESchema-LIBRARY Version 2.3 Date: Tue 24 Aug 2010 06:53:07 AM COT
#
# +1.2V
#

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@ -1,4 +1,4 @@
Cmp-Mod V01 Created by CvPCB (2010-07-15 BZR 2414)-unstable date = Sun 22 Aug 2010 07:04:19 PM COT
Cmp-Mod V01 Genere par PcbNew le Tue 24 Aug 2010 06:53:45 AM COT
BeginCmp
TimeStamp = /4C4320F3/4C5D7F9F;
@ -94,15 +94,15 @@ EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C5F2037;
Reference = C14;
ValeurCmp = 1uF;
IdModule = 0603;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C5F2039;
Reference = C15;
ValeurCmp = 470nF;
IdModule = 0603;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
@ -242,20 +242,20 @@ BeginCmp
TimeStamp = /4C5F1EDC/4C6552BE;
Reference = C35;
ValeurCmp = 1uF;
IdModule = 0805;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552BD;
Reference = C36;
ValeurCmp = 1uF;
IdModule = 0805;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552BC;
Reference = C37;
ValeurCmp = 470nF;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
@ -595,6 +595,34 @@ ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C71C9C5;
Reference = C86;
ValeurCmp = 1uF;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C71C9C4;
Reference = C87;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C71C9C3;
Reference = C88;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C71C9BE;
Reference = C89;
ValeurCmp = 4.7nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C5F2B55;
Reference = F1;
@ -603,7 +631,7 @@ IdModule = 1210;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552BA;
TimeStamp = /4C5F1EDC/4C71C9C1;
Reference = F2;
ValeurCmp = MICROSMD075F;
IdModule = 1210;
@ -672,13 +700,6 @@ ValeurCmp = FB;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552B0;
Reference = L6;
ValeurCmp = FB;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552B1;
Reference = L7;
@ -700,6 +721,20 @@ ValeurCmp = 2.2uH;
IdModule = 1210;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C71C9B8;
Reference = L10;
ValeurCmp = FB;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C71C9B9;
Reference = L11;
ValeurCmp = FB;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C4320F3/4C5D7F39;
Reference = R1;
@ -910,6 +945,13 @@ ValeurCmp = 330;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C71C9BD;
Reference = R31;
ValeurCmp = 1M;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C431A63/4C69C6B2;
Reference = RP1;
@ -1120,6 +1162,13 @@ ValeurCmp = A7108;
IdModule = SOT23-5;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C71C9B0;
Reference = U13;
ValeurCmp = MIC2550-MLF;
IdModule = MLF16;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C5F2CA7;
Reference = V1;
@ -1148,4 +1197,18 @@ ValeurCmp = V0402MHS03;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C71C9BF;
Reference = V5;
ValeurCmp = V0402MHS03;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C71C9C0;
Reference = V6;
ValeurCmp = V0402MHS03;
IdModule = 0603;
EndCmp
EndListe

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update=Mon 23 Aug 2010 11:08:04 PM COT
update=Tue 24 Aug 2010 06:57:27 AM COT
version=1
last_client=pcbnew
[common]

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 23 Aug 2010 10:36:19 PM COT
EESchema Schematic File Version 2 date Tue 24 Aug 2010 06:53:07 AM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03