18 Commits

Author	SHA1	Message	Date
Andres Calderon	2e8564b64c	USB Phy re-routed	2010-08-24 18:44:21 -05:00
Andres Calderon	3eea348bed	USB A Phy has been routed	2010-08-24 06:59:29 -05:00
Andres Calderon	fca9926a97	USB phy component has been changed	2010-08-22 19:06:02 -05:00
Andres Calderon	980b853454	debug+prog connector added	2010-08-22 13:35:28 -05:00
Andres Calderon	f4bebe5f62	eth-phy routing startted	2010-08-19 05:40:42 -05:00
Andres Calderon	cf1645bb44	DDR0 termaintor placement	2010-08-16 22:48:30 -05:00
Andres Calderon	2df63e4aea	ddr termination placement	2010-08-16 20:56:08 -05:00
Juan64Bits	16026245e7	Series resistors (DDR) added	2010-08-16 16:32:29 -05:00
Andres Calderon	ef72b751a5	eth-phy placement	2010-08-14 07:42:37 -05:00
Andres Calderon	ef75347b57	spi memory added	2010-08-13 15:42:35 -05:00
Juan64Bits	37912ec628	FPGA decoupling capacitors	2010-08-13 11:24:39 -05:00
Andres Calderon	35a1b35c7f	usb added	2010-08-13 09:27:10 -05:00
Andres Calderon	171e409036	annotate	2010-08-09 21:55:50 -05:00
Andres Calderon	11ade0f1e8	ddr footprint changed	2010-08-09 21:29:52 -05:00
Juan64Bits	b22aa62b24	Ethernet-phy and USB connected to FPGA	2010-08-09 15:37:18 -05:00
Juan64Bits	5ce4404765	Phy	2010-08-08 12:15:44 -05:00
Andres Calderon	3e25e8dec9	ddr mobile replaced by ddr	2010-08-03 21:23:17 -05:00
Andres Calderon	a8cbac05c9	chie renamed to xue	2010-07-24 14:02:57 -05:00