36 Commits

Author	SHA1	Message	Date
Andres Calderon	e2867d726e	3.3v dc-dc added	2010-08-18 22:09:52 -05:00
Andres Calderon	7be9df3fef	fpga decoupling cap. placement improved	2010-08-17 19:36:33 -05:00
Andres Calderon	00a88f8396	ddr terminators placment	2010-08-17 19:04:05 -05:00
Andres Calderon	5c25d1c015	DDR0 termaintor placement	2010-08-16 23:30:34 -05:00
Andres Calderon	cf1645bb44	DDR0 termaintor placement	2010-08-16 22:48:30 -05:00
Andres Calderon	8cf60ceb3c	PSU controller added	2010-08-16 21:49:00 -05:00
Andres Calderon	a1ba8c9c6e	PSU sheet added	2010-08-16 21:09:50 -05:00
Andres Calderon	2df63e4aea	ddr termination placement	2010-08-16 20:56:08 -05:00
Andres Calderon	f1c6506b1e	terminal resistors placement	2010-08-16 19:36:21 -05:00
Andres Calderon	ba734f70bf	terminal resistors placement	2010-08-16 19:06:33 -05:00
Andres Calderon	4110ee21c8	fixed FPGA component bug	2010-08-14 08:23:56 -05:00
Andres Calderon	ef72b751a5	eth-phy placement	2010-08-14 07:42:37 -05:00
Andres Calderon	fae8765d04	improved placement	2010-08-13 22:09:52 -05:00
Andres Calderon	e07bc340e0	decoupling nand flash added	2010-08-13 18:38:38 -05:00
Andres Calderon	8f8f332469	decoupling DDR cap. placement	2010-08-13 18:20:50 -05:00
Andres Calderon	333097ec1d	VCC fixed	2010-08-13 17:34:12 -05:00
Andres Calderon	ef75347b57	spi memory added	2010-08-13 15:42:35 -05:00
Andres Calderon	35a1b35c7f	usb added	2010-08-13 09:27:10 -05:00
Andres Calderon	e1ce2a9e8f	fix	2010-08-12 21:12:14 -05:00
Andres Calderon	ada00cd738	fix	2010-08-12 17:18:08 -05:00
Andres Calderon	e678c0e51a	fixed placement	2010-08-12 16:12:57 -05:00
Andres Calderon	7a9ae94ba6	FB added to USB host	2010-08-12 08:12:03 -05:00
Andres Calderon	a0ee3f9555	VCCs connected	2010-08-10 18:51:35 -05:00
Andres Calderon	ef20287ec3	only a test	2010-08-10 18:27:44 -05:00
Andres Calderon	57948cfc83	SD connector attached to th S6	2010-08-10 18:09:38 -05:00
Andres Calderon	cac88e3756	DDR de-coupling caps. added	2010-08-10 17:38:37 -05:00
Andres Calderon	a8fcbf091c	early placement	2010-08-09 22:25:05 -05:00
Andres Calderon	171e409036	annotate	2010-08-09 21:55:50 -05:00
Andres Calderon	11ade0f1e8	ddr footprint changed	2010-08-09 21:29:52 -05:00
Andres Calderon	134f841bb6	annotate	2010-08-09 20:21:14 -05:00
Andres Calderon	bd2d314d9c	cleanup	2010-08-08 21:31:12 -05:00
Andres Calderon	5197a47953	ddr address and data has been conected to the FPGA	2010-08-04 20:50:31 -05:00
Andres Calderon	3e25e8dec9	ddr mobile replaced by ddr	2010-08-03 21:23:17 -05:00
Andres Calderon	1580e66a1e	only one wire connected	2010-07-28 06:48:02 -05:00
Andres Calderon	d79faef060	some ethernet phy conections	2010-07-27 20:09:20 -05:00
Andres Calderon	a8cbac05c9	chie renamed to xue	2010-07-24 14:02:57 -05:00