mirror of
git://projects.qi-hardware.com/nn-usb-fpga.git
synced 2025-04-21 12:27:27 +03:00
Adding PS2, capacitive keyboard examples
This commit is contained in:
carlos
88
UART/logic/Makefile
Normal file
88
UART/logic/Makefile
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@@ -0,0 +1,88 @@
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DESIGN = uart_peripheral
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PINS = $(DESIGN).ucf
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DEVICE = xc3s500e-VQ100-4
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BGFLAGS = -g TdoPin:PULLNONE -g DonePin:PULLUP \
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-g CRC:enable -g StartUpClk:CCLK
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SIM_CMD = vsim
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SIM_COMP_SCRIPT = simulation/$(DESIGN)_TB.do
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SIMGEN_OPTIONS = -p $(FPGA_ARCH) -lang $(LANGUAGE)
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IVERILOG = iverilog
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SAKC_IP = 192.168.254.101
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SRC = uart_peripheral.v \
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uart.v
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SIM_SRC =uart_peripheral.v\
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all: bits
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remake: clean-build all
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clean:
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rm -f *~ */*~ a.out *.log *.key *.edf *.ps trace.dat
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rm -f *.bit
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cleanall: clean
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rm -rf build simulation/work simulation/transcript simulation/vsim.wlf simulation/blink_TB.vvp simulation/blink_TB.vcd
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bits: $(DESIGN).bit
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#
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# Synthesis
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#
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build/project.src:
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@[ -d build ] || mkdir build
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@rm -f $@
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for i in $(SRC); do echo verilog work ../$$i >> $@; done
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for i in $(SRC_HDL); do echo VHDL work ../$$i >> $@; done
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build/project.xst: build/project.src
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echo "run" > $@
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echo "-top $(DESIGN) " >> $@
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echo "-p $(DEVICE)" >> $@
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echo "-opt_mode Area" >> $@
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echo "-opt_level 1" >> $@
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echo "-ifn project.src" >> $@
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echo "-ifmt mixed" >> $@
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echo "-ofn project.ngc" >> $@
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echo "-ofmt NGC" >> $@
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echo "-rtlview yes" >> $@
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build/project.ngc: build/project.xst $(SRC)
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cd build && xst -ifn project.xst -ofn project.log
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build/project.ngd: build/project.ngc $(PINS)
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cd build && ngdbuild -p $(DEVICE) project.ngc -uc ../$(PINS)
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build/project.ncd: build/project.ngd
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cd build && map -pr b -p $(DEVICE) project
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build/project_r.ncd: build/project.ncd
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cd build && par -w project project_r.ncd
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build/project_r.twr: build/project_r.ncd
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cd build && trce -v 25 project_r.ncd project.pcf
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$(DESIGN).bit: build/project_r.ncd build/project_r.twr
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cd build && bitgen project_r.ncd -l -w $(BGFLAGS)
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@mv -f build/project_r.bit $@
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build/project_r.v: build/project_r.ncd
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cd build && ngd2ver project.ngd -w project.v
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modelsim:
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cd simulation; $(SIM_CMD) -do $(DESIGN)_TB.do
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timesim: build/project_r.v
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cd simulation; $(SIM_CMD) -do $(DESIGN)_TIMING_TB.do
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iversim:
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$(IVERILOG) -o simulation/$(DESIGN)_TB.vvp $(VINCDIR) $(SRC) $(SIM_SRC) -s $(DESIGN)_TB
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vvp simulation/$(DESIGN)_TB.vvp; mv $(DESIGN)_TB.vcd simulation/
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gtkwave simulation/$(DESIGN)_TB.vcd&
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upload: $(DESIGN).bit
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scp $(DESIGN).bit root@$(SAKC_IP):binaries
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2
UART/logic/build/netlist.lst
Normal file
2
UART/logic/build/netlist.lst
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@@ -0,0 +1,2 @@
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/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/logic/build/project.ngc 1289504255
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OK
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35
UART/logic/build/project.bld
Normal file
35
UART/logic/build/project.bld
Normal file
@@ -0,0 +1,35 @@
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Release 10.1.03 ngdbuild K.39 (lin)
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Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
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Command Line: /opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/ngdbuild -p
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xc3s500e-VQ100-4 project.ngc -uc ../uart_peripheral.ucf
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Reading NGO file
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"/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/logic/build/project.ngc" ...
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Gathering constraint information from source properties...
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Done.
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Applying constraints in "../uart_peripheral.ucf" to the design...
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Resolving constraint associations...
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Checking Constraint Associations...
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Done...
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Checking Partitions ...
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Checking expanded design ...
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Partition Implementation Status
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-------------------------------
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No Partitions were found in this design.
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-------------------------------
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NGDBUILD Design Results Summary:
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Number of errors: 0
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Number of warnings: 0
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Total memory usage is 60312 kilobytes
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Writing NGD file "project.ngd" ...
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Writing NGDBUILD log file "project.bld"...
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690
UART/logic/build/project.log
Normal file
690
UART/logic/build/project.log
Normal file
@@ -0,0 +1,690 @@
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Release 10.1.03 - xst K.39 (lin)
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Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
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-->
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PMSPEC -- Overriding Xilinx file </opt/cad/Xilinx/10.1/ISE/spartan3/data/spartan3.acd> with local file </opt/cad/Xilinx/10.1/ISE/spartan3/data/spartan3.acd>
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TABLE OF CONTENTS
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1) Synthesis Options Summary
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2) HDL Compilation
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3) Design Hierarchy Analysis
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4) HDL Analysis
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5) HDL Synthesis
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5.1) HDL Synthesis Report
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6) Advanced HDL Synthesis
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6.1) Advanced HDL Synthesis Report
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7) Low Level Synthesis
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8) Partition Report
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9) Final Report
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9.1) Device utilization summary
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9.2) Partition Resource Summary
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9.3) TIMING REPORT
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=========================================================================
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* Synthesis Options Summary *
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=========================================================================
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---- Source Parameters
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Input File Name : "project.src"
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Input Format : mixed
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---- Target Parameters
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Target Device : xc3s500e-VQ100-4
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Output File Name : "project.ngc"
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Output Format : NGC
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---- Source Options
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Top Module Name : uart_peripheral
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---- General Options
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Optimization Goal : Area
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Optimization Effort : 1
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RTL Output : yes
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=========================================================================
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=========================================================================
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* HDL Compilation *
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=========================================================================
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Compiling verilog file "../uart_peripheral.v" in library work
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Compiling verilog file "../uart.v" in library work
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Module <uart_peripheral> compiled
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Module <UART> compiled
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Module <pc_buffrx_pc> compiled
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Module <pc_bufftx> compiled
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Module <pc_ctrl_rx> compiled
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Module <pc_ctrl_tx_pc> compiled
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Module <pc_dato_rdy> compiled
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Module <pc_div27> compiled
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Module <pc_div16> compiled
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Module <pc_div_ms> compiled
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Module <pc_ier> compiled
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Module <pc_if_arm_pc> compiled
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Module <pc_ifrxd> compiled
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Module <pc_isr> compiled
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Module <pc_lcr> compiled
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Module <pc_muestreo> compiled
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Module <pc_pulso> compiled
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No errors in compilation
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Analysis of file <"project.src"> succeeded.
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=========================================================================
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* Design Hierarchy Analysis *
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=========================================================================
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Analyzing hierarchy for module <uart_peripheral> in library <work> with parameters.
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B = "00000000000000000000000000000111"
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Analyzing hierarchy for module <UART> in library <work>.
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Analyzing hierarchy for module <pc_if_arm_pc> in library <work>.
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Analyzing hierarchy for module <pc_div27> in library <work>.
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Analyzing hierarchy for module <pc_div_ms> in library <work>.
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Analyzing hierarchy for module <pc_pulso> in library <work>.
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Analyzing hierarchy for module <pc_div16> in library <work>.
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Analyzing hierarchy for module <pc_ifrxd> in library <work>.
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Analyzing hierarchy for module <pc_muestreo> in library <work>.
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Analyzing hierarchy for module <pc_buffrx_pc> in library <work>.
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Analyzing hierarchy for module <pc_ctrl_rx> in library <work>.
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Analyzing hierarchy for module <pc_dato_rdy> in library <work>.
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Analyzing hierarchy for module <pc_bufftx> in library <work>.
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Analyzing hierarchy for module <pc_ctrl_tx_pc> in library <work>.
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Analyzing hierarchy for module <pc_ier> in library <work>.
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Analyzing hierarchy for module <pc_lcr> in library <work>.
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Analyzing hierarchy for module <pc_isr> in library <work>.
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=========================================================================
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* HDL Analysis *
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=========================================================================
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Analyzing top module <uart_peripheral>.
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B = 32'sb00000000000000000000000000000111
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WARNING:Xst:852 - "../uart_peripheral.v" line 63: Unconnected input port 'CD' of instance 'UART' is tied to GND.
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WARNING:Xst:852 - "../uart_peripheral.v" line 63: Unconnected input port 'RI' of instance 'UART' is tied to GND.
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WARNING:Xst:852 - "../uart_peripheral.v" line 63: Unconnected input port 'DSR' of instance 'UART' is tied to GND.
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WARNING:Xst:852 - "../uart_peripheral.v" line 63: Unconnected input port 'CTS' of instance 'UART' is tied to GND.
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Module <uart_peripheral> is correct for synthesis.
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Analyzing module <UART> in library <work>.
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Module <UART> is correct for synthesis.
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Analyzing module <pc_if_arm_pc> in library <work>.
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Module <pc_if_arm_pc> is correct for synthesis.
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Analyzing module <pc_div27> in library <work>.
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Module <pc_div27> is correct for synthesis.
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Analyzing module <pc_div_ms> in library <work>.
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Module <pc_div_ms> is correct for synthesis.
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Analyzing module <pc_pulso> in library <work>.
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Module <pc_pulso> is correct for synthesis.
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Analyzing module <pc_div16> in library <work>.
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Module <pc_div16> is correct for synthesis.
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Analyzing module <pc_ifrxd> in library <work>.
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Module <pc_ifrxd> is correct for synthesis.
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Analyzing module <pc_muestreo> in library <work>.
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Module <pc_muestreo> is correct for synthesis.
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Analyzing module <pc_buffrx_pc> in library <work>.
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Module <pc_buffrx_pc> is correct for synthesis.
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Analyzing module <pc_ctrl_rx> in library <work>.
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Module <pc_ctrl_rx> is correct for synthesis.
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Analyzing module <pc_dato_rdy> in library <work>.
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Module <pc_dato_rdy> is correct for synthesis.
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Analyzing module <pc_bufftx> in library <work>.
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Module <pc_bufftx> is correct for synthesis.
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Analyzing module <pc_ctrl_tx_pc> in library <work>.
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Module <pc_ctrl_tx_pc> is correct for synthesis.
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Analyzing module <pc_ier> in library <work>.
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Module <pc_ier> is correct for synthesis.
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Analyzing module <pc_lcr> in library <work>.
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Module <pc_lcr> is correct for synthesis.
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||||
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Analyzing module <pc_isr> in library <work>.
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Module <pc_isr> is correct for synthesis.
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||||
|
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=========================================================================
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* HDL Synthesis *
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||||
=========================================================================
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|
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Performing bidirectional port resolution...
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INFO:Xst:2679 - Register <buftx<10>> in unit <pc_bufftx> has a constant value of 1 during circuit operation. The register is replaced by logic.
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Synthesizing Unit <pc_if_arm_pc>.
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Related source file is "../uart.v".
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WARNING:Xst:647 - Input <CLK> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
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WARNING:Xst:647 - Input <reset> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
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WARNING:Xst:647 - Input <data_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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WARNING:Xst:1780 - Signal <dato_tx> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
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Unit <pc_if_arm_pc> synthesized.
|
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|
||||
|
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Synthesizing Unit <pc_div27>.
|
||||
Related source file is "../uart.v".
|
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Found 6-bit up counter for signal <div27>.
|
||||
Summary:
|
||||
inferred 1 Counter(s).
|
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Unit <pc_div27> synthesized.
|
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|
||||
|
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Synthesizing Unit <pc_div_ms>.
|
||||
Related source file is "../uart.v".
|
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Found 1-bit register for signal <clk_out>.
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Found 16-bit register for signal <div>.
|
||||
Found 16-bit adder for signal <div$addsub0000> created at line 581.
|
||||
Found 16-bit comparator equal for signal <div$cmp_eq0000> created at line 574.
|
||||
Found 16-bit register for signal <k_div>.
|
||||
Summary:
|
||||
inferred 33 D-type flip-flop(s).
|
||||
inferred 1 Adder/Subtractor(s).
|
||||
inferred 1 Comparator(s).
|
||||
Unit <pc_div_ms> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_pulso>.
|
||||
Related source file is "../uart.v".
|
||||
Found 1-bit register for signal <dff>.
|
||||
Summary:
|
||||
inferred 1 D-type flip-flop(s).
|
||||
Unit <pc_pulso> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_div16>.
|
||||
Related source file is "../uart.v".
|
||||
Found 4-bit up counter for signal <div16>.
|
||||
Summary:
|
||||
inferred 1 Counter(s).
|
||||
Unit <pc_div16> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_ifrxd>.
|
||||
Related source file is "../uart.v".
|
||||
Found 3-bit register for signal <ifrxd>.
|
||||
Found 1-bit xor2 for signal <ifrxd_2$xor0000> created at line 967.
|
||||
Found 1-bit xor2 for signal <ifrxd_2$xor0001> created at line 967.
|
||||
Summary:
|
||||
inferred 3 D-type flip-flop(s).
|
||||
Unit <pc_ifrxd> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_muestreo>.
|
||||
Related source file is "../uart.v".
|
||||
Found 1-bit register for signal <sample>.
|
||||
Found 4-bit up counter for signal <cont_m>.
|
||||
Found 1-bit register for signal <flag_rx>.
|
||||
Summary:
|
||||
inferred 1 Counter(s).
|
||||
inferred 2 D-type flip-flop(s).
|
||||
Unit <pc_muestreo> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_buffrx_pc>.
|
||||
Related source file is "../uart.v".
|
||||
Found 1-bit register for signal <err_paridad>.
|
||||
Found 8-bit register for signal <datorx>.
|
||||
Found 1-bit register for signal <err_frame>.
|
||||
Found 10-bit register for signal <bufrx>.
|
||||
Found 1-bit xor9 for signal <iparity>.
|
||||
Summary:
|
||||
inferred 20 D-type flip-flop(s).
|
||||
inferred 1 Xor(s).
|
||||
Unit <pc_buffrx_pc> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_ctrl_rx>.
|
||||
Related source file is "../uart.v".
|
||||
Found 1-bit register for signal <rx_lleno>.
|
||||
Found 4-bit up counter for signal <cont_rx>.
|
||||
Summary:
|
||||
inferred 1 Counter(s).
|
||||
inferred 1 D-type flip-flop(s).
|
||||
Unit <pc_ctrl_rx> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_dato_rdy>.
|
||||
Related source file is "../uart.v".
|
||||
Found 1-bit register for signal <dato_rdy>.
|
||||
Found 1-bit register for signal <err_overrun>.
|
||||
Summary:
|
||||
inferred 2 D-type flip-flop(s).
|
||||
Unit <pc_dato_rdy> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_bufftx>.
|
||||
Related source file is "../uart.v".
|
||||
Found 10-bit register for signal <buftx<9:0>>.
|
||||
Found 8-bit register for signal <dato_tx>.
|
||||
Found 1-bit xor8 for signal <iparity>.
|
||||
Summary:
|
||||
inferred 18 D-type flip-flop(s).
|
||||
inferred 1 Xor(s).
|
||||
Unit <pc_bufftx> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_ctrl_tx_pc>.
|
||||
Related source file is "../uart.v".
|
||||
Found 1-bit register for signal <tx_empty>.
|
||||
Found 4-bit up counter for signal <cont_tx>.
|
||||
Found 1-bit register for signal <tx_on>.
|
||||
Summary:
|
||||
inferred 1 Counter(s).
|
||||
inferred 2 D-type flip-flop(s).
|
||||
Unit <pc_ctrl_tx_pc> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_ier>.
|
||||
Related source file is "../uart.v".
|
||||
WARNING:Xst:647 - Input <data_in<7:4>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
||||
Found 4-bit register for signal <IER>.
|
||||
Summary:
|
||||
inferred 4 D-type flip-flop(s).
|
||||
Unit <pc_ier> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_lcr>.
|
||||
Related source file is "../uart.v".
|
||||
Found 8-bit register for signal <LCR>.
|
||||
Summary:
|
||||
inferred 8 D-type flip-flop(s).
|
||||
Unit <pc_lcr> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <pc_isr>.
|
||||
Related source file is "../uart.v".
|
||||
WARNING:Xst:647 - Input <IER<2>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
||||
WARNING:Xst:646 - Signal <err_overrunm> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
|
||||
Found 4-bit register for signal <ISR>.
|
||||
Found 1-bit register for signal <aux1>.
|
||||
Found 1-bit register for signal <carga_ISRd>.
|
||||
Found 1-bit register for signal <mask_dato_rdy>.
|
||||
Found 1-bit register for signal <mask_err_overrun>.
|
||||
Found 1-bit register for signal <mask_error>.
|
||||
Found 1-bit register for signal <mask_modem_int>.
|
||||
Found 1-bit register for signal <mask_tx_empty>.
|
||||
Summary:
|
||||
inferred 11 D-type flip-flop(s).
|
||||
Unit <pc_isr> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <UART>.
|
||||
Related source file is "../uart.v".
|
||||
WARNING:Xst:647 - Input <CD> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
||||
WARNING:Xst:1305 - Output <RTS> is never assigned. Tied to value 0.
|
||||
WARNING:Xst:647 - Input <CTS> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
||||
WARNING:Xst:647 - Input <DSR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
||||
WARNING:Xst:1305 - Output <DTR> is never assigned. Tied to value 0.
|
||||
WARNING:Xst:647 - Input <RI> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
||||
WARNING:Xst:653 - Signal <modem_int> is used but never assigned. This sourceless signal will be automatically connected to value 0.
|
||||
WARNING:Xst:653 - Signal <modem> is used but never assigned. This sourceless signal will be automatically connected to value 00000000.
|
||||
WARNING:Xst:1780 - Signal <error> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
|
||||
WARNING:Xst:1780 - Signal <dato_tx> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
|
||||
WARNING:Xst:1780 - Signal <carga_div> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
|
||||
WARNING:Xst:646 - Signal <carga_MSR> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
|
||||
WARNING:Xst:646 - Signal <carga_MCR> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
|
||||
WARNING:Xst:646 - Signal <WordLength> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
|
||||
WARNING:Xst:646 - Signal <Stop> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
|
||||
WARNING:Xst:646 - Signal <Break> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
|
||||
Unit <UART> synthesized.
|
||||
|
||||
|
||||
Synthesizing Unit <uart_peripheral>.
|
||||
Related source file is "../uart_peripheral.v".
|
||||
WARNING:Xst:647 - Input <RxD2> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
||||
WARNING:Xst:1306 - Output <TxD2> is never assigned.
|
||||
WARNING:Xst:646 - Signal <out> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
|
||||
WARNING:Xst:646 - Signal <buffer_addr<12:3>> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
|
||||
WARNING:Xst:1780 - Signal <RD> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
|
||||
WARNING:Xst:1780 - Signal <ISRC_LP> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
|
||||
Found 8-bit tristate buffer for signal <sram_data>.
|
||||
Found 13-bit register for signal <buffer_addr>.
|
||||
Found 8-bit register for signal <buffer_data>.
|
||||
Found 24-bit up counter for signal <counter>.
|
||||
Found 1-bit register for signal <sncs>.
|
||||
Found 1-bit register for signal <snwe>.
|
||||
Found 1-bit register for signal <w_st>.
|
||||
Found 8-bit register for signal <wdBus>.
|
||||
Found 1-bit register for signal <we>.
|
||||
Summary:
|
||||
inferred 1 Counter(s).
|
||||
inferred 33 D-type flip-flop(s).
|
||||
inferred 8 Tristate(s).
|
||||
Unit <uart_peripheral> synthesized.
|
||||
|
||||
|
||||
=========================================================================
|
||||
HDL Synthesis Report
|
||||
|
||||
Macro Statistics
|
||||
# Adders/Subtractors : 1
|
||||
16-bit adder : 1
|
||||
# Counters : 6
|
||||
24-bit up counter : 1
|
||||
4-bit up counter : 4
|
||||
6-bit up counter : 1
|
||||
# Registers : 71
|
||||
1-bit register : 62
|
||||
13-bit register : 1
|
||||
16-bit register : 1
|
||||
4-bit register : 2
|
||||
8-bit register : 5
|
||||
# Comparators : 1
|
||||
16-bit comparator equal : 1
|
||||
# Tristates : 1
|
||||
8-bit tristate buffer : 1
|
||||
# Xors : 4
|
||||
1-bit xor2 : 2
|
||||
1-bit xor8 : 1
|
||||
1-bit xor9 : 1
|
||||
|
||||
=========================================================================
|
||||
|
||||
=========================================================================
|
||||
* Advanced HDL Synthesis *
|
||||
=========================================================================
|
||||
|
||||
Loading device for application Rf_Device from file '3s500e.nph' in environment /opt/cad/Xilinx/10.1/ISE:/opt/cad/Xilinx/10.1/ISE/.
|
||||
WARNING:Xst:1710 - FF/Latch <ISR_3> (without init value) has a constant value of 0 in block <pc_isr>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:2677 - Node <buffer_addr_3> of sequential type is unconnected in block <uart_peripheral>.
|
||||
WARNING:Xst:2677 - Node <buffer_addr_4> of sequential type is unconnected in block <uart_peripheral>.
|
||||
WARNING:Xst:2677 - Node <buffer_addr_5> of sequential type is unconnected in block <uart_peripheral>.
|
||||
WARNING:Xst:2677 - Node <buffer_addr_6> of sequential type is unconnected in block <uart_peripheral>.
|
||||
WARNING:Xst:2677 - Node <buffer_addr_7> of sequential type is unconnected in block <uart_peripheral>.
|
||||
WARNING:Xst:2677 - Node <buffer_addr_8> of sequential type is unconnected in block <uart_peripheral>.
|
||||
WARNING:Xst:2677 - Node <buffer_addr_9> of sequential type is unconnected in block <uart_peripheral>.
|
||||
WARNING:Xst:2677 - Node <buffer_addr_10> of sequential type is unconnected in block <uart_peripheral>.
|
||||
WARNING:Xst:2677 - Node <buffer_addr_11> of sequential type is unconnected in block <uart_peripheral>.
|
||||
WARNING:Xst:2677 - Node <buffer_addr_12> of sequential type is unconnected in block <uart_peripheral>.
|
||||
WARNING:Xst:2677 - Node <IER_3> of sequential type is unconnected in block <ier1>.
|
||||
WARNING:Xst:2677 - Node <mask_modem_int> of sequential type is unconnected in block <isr1>.
|
||||
|
||||
=========================================================================
|
||||
Advanced HDL Synthesis Report
|
||||
|
||||
Macro Statistics
|
||||
# Adders/Subtractors : 1
|
||||
16-bit adder : 1
|
||||
# Counters : 6
|
||||
24-bit up counter : 1
|
||||
4-bit up counter : 4
|
||||
6-bit up counter : 1
|
||||
# Registers : 128
|
||||
Flip-Flops : 128
|
||||
# Comparators : 1
|
||||
16-bit comparator equal : 1
|
||||
# Xors : 4
|
||||
1-bit xor2 : 2
|
||||
1-bit xor8 : 1
|
||||
1-bit xor9 : 1
|
||||
|
||||
=========================================================================
|
||||
|
||||
=========================================================================
|
||||
* Low Level Synthesis *
|
||||
=========================================================================
|
||||
WARNING:Xst:2677 - Node <mask_modem_int> of sequential type is unconnected in block <pc_isr>.
|
||||
|
||||
Optimizing unit <uart_peripheral> ...
|
||||
|
||||
Optimizing unit <pc_div_ms> ...
|
||||
|
||||
Optimizing unit <pc_buffrx_pc> ...
|
||||
|
||||
Optimizing unit <pc_bufftx> ...
|
||||
|
||||
Optimizing unit <pc_isr> ...
|
||||
WARNING:Xst:2677 - Node <UART/ier1/IER_3> of sequential type is unconnected in block <uart_peripheral>.
|
||||
|
||||
Mapping all equations...
|
||||
Building and optimizing final netlist ...
|
||||
FlipFlop counter_23 has been replicated 1 time(s) to handle iob=true attribute.
|
||||
|
||||
Final Macro Processing ...
|
||||
|
||||
=========================================================================
|
||||
Final Register Report
|
||||
|
||||
Macro Statistics
|
||||
# Registers : 173
|
||||
Flip-Flops : 173
|
||||
|
||||
=========================================================================
|
||||
|
||||
=========================================================================
|
||||
* Partition Report *
|
||||
=========================================================================
|
||||
|
||||
Partition Implementation Status
|
||||
-------------------------------
|
||||
|
||||
No Partitions were found in this design.
|
||||
|
||||
-------------------------------
|
||||
|
||||
=========================================================================
|
||||
* Final Report *
|
||||
=========================================================================
|
||||
Final Results
|
||||
RTL Top Level Output File Name : project.ngr
|
||||
Top Level Output File Name : project.ngc
|
||||
Output Format : NGC
|
||||
Optimization Goal : Area
|
||||
Keep Hierarchy : no
|
||||
|
||||
Design Statistics
|
||||
# IOs : 22
|
||||
|
||||
Cell Usage :
|
||||
# BELS : 278
|
||||
# GND : 1
|
||||
# INV : 9
|
||||
# LUT1 : 38
|
||||
# LUT2 : 10
|
||||
# LUT3 : 48
|
||||
# LUT4 : 78
|
||||
# MUXCY : 46
|
||||
# MUXF5 : 7
|
||||
# VCC : 1
|
||||
# XORCY : 40
|
||||
# FlipFlops/Latches : 173
|
||||
# FD : 3
|
||||
# FD_1 : 13
|
||||
# FDC : 10
|
||||
# FDCE : 80
|
||||
# FDE : 1
|
||||
# FDP : 1
|
||||
# FDPE : 14
|
||||
# FDR : 36
|
||||
# FDRE : 12
|
||||
# FDSE : 3
|
||||
# Clock Buffers : 1
|
||||
# BUFGP : 1
|
||||
# IO Buffers : 19
|
||||
# IBUF : 8
|
||||
# IOBUF : 8
|
||||
# OBUF : 3
|
||||
=========================================================================
|
||||
|
||||
Device utilization summary:
|
||||
---------------------------
|
||||
|
||||
Selected Device : 3s500evq100-4
|
||||
|
||||
Number of Slices: 114 out of 4656 2%
|
||||
Number of Slice Flip Flops: 158 out of 9312 1%
|
||||
Number of 4 input LUTs: 183 out of 9312 1%
|
||||
Number of IOs: 22
|
||||
Number of bonded IOBs: 20 out of 66 30%
|
||||
IOB Flip Flops: 15
|
||||
Number of GCLKs: 1 out of 24 4%
|
||||
|
||||
---------------------------
|
||||
Partition Resource Summary:
|
||||
---------------------------
|
||||
|
||||
No Partitions were found in this design.
|
||||
|
||||
---------------------------
|
||||
|
||||
|
||||
=========================================================================
|
||||
TIMING REPORT
|
||||
|
||||
NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
|
||||
FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
|
||||
GENERATED AFTER PLACE-and-ROUTE.
|
||||
|
||||
Clock Information:
|
||||
------------------
|
||||
-----------------------------------+------------------------+-------+
|
||||
Clock Signal | Clock buffer(FF name) | Load |
|
||||
-----------------------------------+------------------------+-------+
|
||||
clk | BUFGP | 173 |
|
||||
-----------------------------------+------------------------+-------+
|
||||
|
||||
Asynchronous Control Signals Information:
|
||||
----------------------------------------
|
||||
-----------------------------------+---------------------------+-------+
|
||||
Control Signal | Buffer(FF name) | Load |
|
||||
-----------------------------------+---------------------------+-------+
|
||||
reset_inv(reset_inv1_INV_0:O) | NONE(UART/bufftx1/buftx_9)| 105 |
|
||||
-----------------------------------+---------------------------+-------+
|
||||
|
||||
Timing Summary:
|
||||
---------------
|
||||
Speed Grade: -4
|
||||
|
||||
Minimum period: 13.338ns (Maximum Frequency: 74.974MHz)
|
||||
Minimum input arrival time before clock: 4.803ns
|
||||
Maximum output required time after clock: 9.916ns
|
||||
Maximum combinational path delay: 6.573ns
|
||||
|
||||
Timing Detail:
|
||||
--------------
|
||||
All values displayed in nanoseconds (ns)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default period analysis for Clock 'clk'
|
||||
Clock period: 13.338ns (frequency: 74.974MHz)
|
||||
Total number of paths / destination ports: 2891 / 269
|
||||
-------------------------------------------------------------------------
|
||||
Delay: 6.669ns (Levels of Logic = 3)
|
||||
Source: buffer_addr_1 (FF)
|
||||
Destination: UART/div_ms1/div_15 (FF)
|
||||
Source Clock: clk falling
|
||||
Destination Clock: clk rising
|
||||
|
||||
Data Path: buffer_addr_1 to UART/div_ms1/div_15
|
||||
Gate Net
|
||||
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
||||
---------------------------------------- ------------
|
||||
FD_1:C->Q 13 0.591 0.987 buffer_addr_1 (buffer_addr_1)
|
||||
LUT4:I3->O 3 0.704 0.566 UART/if_arm1/data_out_cmp_eq00001 (UART/if_arm1/data_out_cmp_eq0000)
|
||||
LUT3:I2->O 9 0.704 0.824 UART/if_arm1/carga_div_low1 (UART/carga_div_low)
|
||||
LUT4:I3->O 16 0.704 1.034 UART/div_ms1/div_not00021 (UART/div_ms1/div_not0002)
|
||||
FDCE:CE 0.555 UART/div_ms1/div_0
|
||||
----------------------------------------
|
||||
Total 6.669ns (3.258ns logic, 3.411ns route)
|
||||
(48.9% logic, 51.1% route)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default OFFSET IN BEFORE for Clock 'clk'
|
||||
Total number of paths / destination ports: 69 / 69
|
||||
-------------------------------------------------------------------------
|
||||
Offset: 4.803ns (Levels of Logic = 2)
|
||||
Source: reset (PAD)
|
||||
Destination: w_st (FF)
|
||||
Destination Clock: clk rising
|
||||
|
||||
Data Path: reset to w_st
|
||||
Gate Net
|
||||
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
||||
---------------------------------------- ------------
|
||||
IBUF:I->O 6 1.218 0.669 reset_IBUF (reset_IBUF)
|
||||
INV:I->O 155 0.704 1.301 reset_inv1_INV_0 (reset_inv)
|
||||
FDR:R 0.911 w_st
|
||||
----------------------------------------
|
||||
Total 4.803ns (2.833ns logic, 1.970ns route)
|
||||
(59.0% logic, 41.0% route)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default OFFSET OUT AFTER for Clock 'clk'
|
||||
Total number of paths / destination ports: 169 / 11
|
||||
-------------------------------------------------------------------------
|
||||
Offset: 9.916ns (Levels of Logic = 5)
|
||||
Source: buffer_addr_0 (FF)
|
||||
Destination: sram_data<2> (PAD)
|
||||
Source Clock: clk falling
|
||||
|
||||
Data Path: buffer_addr_0 to sram_data<2>
|
||||
Gate Net
|
||||
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
||||
---------------------------------------- ------------
|
||||
FD_1:C->Q 5 0.591 0.808 buffer_addr_0 (buffer_addr_0)
|
||||
LUT2:I0->O 2 0.704 0.482 UART/if_arm1/data_out_or000111 (N6)
|
||||
LUT4:I2->O 8 0.704 0.932 UART/if_arm1/data_out<0>11 (N01)
|
||||
LUT4:I0->O 1 0.704 0.595 UART/if_arm1/data_out<2>4 (UART/if_arm1/data_out<2>4)
|
||||
LUT4:I0->O 1 0.704 0.420 UART/if_arm1/data_out<2>14 (rdBus<2>)
|
||||
IOBUF:I->IO 3.272 sram_data_2_IOBUF (sram_data<2>)
|
||||
----------------------------------------
|
||||
Total 9.916ns (6.679ns logic, 3.237ns route)
|
||||
(67.4% logic, 32.6% route)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default path analysis
|
||||
Total number of paths / destination ports: 16 / 8
|
||||
-------------------------------------------------------------------------
|
||||
Delay: 6.573ns (Levels of Logic = 3)
|
||||
Source: ncs (PAD)
|
||||
Destination: sram_data<7> (PAD)
|
||||
|
||||
Data Path: ncs to sram_data<7>
|
||||
Gate Net
|
||||
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
||||
---------------------------------------- ------------
|
||||
IBUF:I->O 2 1.218 0.622 ncs_IBUF (ncs_IBUF)
|
||||
LUT2:I0->O 8 0.704 0.757 T1 (T)
|
||||
IOBUF:T->IO 3.272 sram_data_7_IOBUF (sram_data<7>)
|
||||
----------------------------------------
|
||||
Total 6.573ns (5.194ns logic, 1.379ns route)
|
||||
(79.0% logic, 21.0% route)
|
||||
|
||||
=========================================================================
|
||||
|
||||
|
||||
Total REAL time to Xst completion: 28.00 secs
|
||||
Total CPU time to Xst completion: 24.17 secs
|
||||
|
||||
-->
|
||||
|
||||
|
||||
Total memory usage is 143224 kilobytes
|
||||
|
||||
Number of errors : 0 ( 0 filtered)
|
||||
Number of warnings : 49 ( 0 filtered)
|
||||
Number of infos : 1 ( 0 filtered)
|
||||
|
||||
64
UART/logic/build/project.map
Normal file
64
UART/logic/build/project.map
Normal file
@@ -0,0 +1,64 @@
|
||||
Release 10.1.03 Map K.39 (lin)
|
||||
Xilinx Map Application Log File for Design 'uart_peripheral'
|
||||
|
||||
Design Information
|
||||
------------------
|
||||
Command Line : map -pr b -p xc3s500e-VQ100-4 project.ngd
|
||||
Target Device : xc3s500e
|
||||
Target Package : vq100
|
||||
Target Speed : -4
|
||||
Mapper Version : spartan3e -- $Revision: 1.46.12.2 $
|
||||
Mapped Date : Thu Nov 11 14:37:58 2010
|
||||
|
||||
Mapping design into LUTs...
|
||||
Writing file project.ngm...
|
||||
Running directed packing...
|
||||
Running delay-based LUT packing...
|
||||
Running related packing...
|
||||
Writing design file "project.ncd"...
|
||||
|
||||
Design Summary
|
||||
--------------
|
||||
|
||||
Design Summary:
|
||||
Number of errors: 0
|
||||
Number of warnings: 2
|
||||
Logic Utilization:
|
||||
Number of Slice Flip Flops: 157 out of 9,312 1%
|
||||
Number of 4 input LUTs: 141 out of 9,312 1%
|
||||
Logic Distribution:
|
||||
Number of occupied Slices: 138 out of 4,656 2%
|
||||
Number of Slices containing only related logic: 138 out of 138 100%
|
||||
Number of Slices containing unrelated logic: 0 out of 138 0%
|
||||
*See NOTES below for an explanation of the effects of unrelated logic.
|
||||
Total Number of 4 input LUTs: 181 out of 9,312 1%
|
||||
Number used as logic: 141
|
||||
Number used as a route-thru: 40
|
||||
Number of bonded IOBs: 20 out of 66 30%
|
||||
IOB Flip Flops: 16
|
||||
Number of BUFGMUXs: 1 out of 24 4%
|
||||
|
||||
Peak Memory Usage: 152 MB
|
||||
Total REAL time to MAP completion: 10 secs
|
||||
Total CPU time to MAP completion: 8 secs
|
||||
|
||||
NOTES:
|
||||
|
||||
Related logic is defined as being logic that shares connectivity - e.g. two
|
||||
LUTs are "related" if they share common inputs. When assembling slices,
|
||||
Map gives priority to combine logic that is related. Doing so results in
|
||||
the best timing performance.
|
||||
|
||||
Unrelated logic shares no connectivity. Map will only begin packing
|
||||
unrelated logic into a slice once 99% of the slices are occupied through
|
||||
related logic packing.
|
||||
|
||||
Note that once logic distribution reaches the 99% level through related
|
||||
logic packing, this does not mean the device is completely utilized.
|
||||
Unrelated logic packing will then begin, continuing until all usable LUTs
|
||||
and FFs are occupied. Depending on your timing budget, increased levels of
|
||||
unrelated logic packing may adversely affect the overall timing performance
|
||||
of your design.
|
||||
|
||||
Mapping completed.
|
||||
See MAP report file "project.mrp" for details.
|
||||
207
UART/logic/build/project.mrp
Normal file
207
UART/logic/build/project.mrp
Normal file
@@ -0,0 +1,207 @@
|
||||
Release 10.1.03 Map K.39 (lin)
|
||||
Xilinx Mapping Report File for Design 'uart_peripheral'
|
||||
|
||||
Design Information
|
||||
------------------
|
||||
Command Line : map -pr b -p xc3s500e-VQ100-4 project.ngd
|
||||
Target Device : xc3s500e
|
||||
Target Package : vq100
|
||||
Target Speed : -4
|
||||
Mapper Version : spartan3e -- $Revision: 1.46.12.2 $
|
||||
Mapped Date : Thu Nov 11 14:37:58 2010
|
||||
|
||||
Design Summary
|
||||
--------------
|
||||
Number of errors: 0
|
||||
Number of warnings: 2
|
||||
Logic Utilization:
|
||||
Number of Slice Flip Flops: 157 out of 9,312 1%
|
||||
Number of 4 input LUTs: 141 out of 9,312 1%
|
||||
Logic Distribution:
|
||||
Number of occupied Slices: 138 out of 4,656 2%
|
||||
Number of Slices containing only related logic: 138 out of 138 100%
|
||||
Number of Slices containing unrelated logic: 0 out of 138 0%
|
||||
*See NOTES below for an explanation of the effects of unrelated logic.
|
||||
Total Number of 4 input LUTs: 181 out of 9,312 1%
|
||||
Number used as logic: 141
|
||||
Number used as a route-thru: 40
|
||||
Number of bonded IOBs: 20 out of 66 30%
|
||||
IOB Flip Flops: 16
|
||||
Number of BUFGMUXs: 1 out of 24 4%
|
||||
|
||||
Peak Memory Usage: 152 MB
|
||||
Total REAL time to MAP completion: 10 secs
|
||||
Total CPU time to MAP completion: 8 secs
|
||||
|
||||
NOTES:
|
||||
|
||||
Related logic is defined as being logic that shares connectivity - e.g. two
|
||||
LUTs are "related" if they share common inputs. When assembling slices,
|
||||
Map gives priority to combine logic that is related. Doing so results in
|
||||
the best timing performance.
|
||||
|
||||
Unrelated logic shares no connectivity. Map will only begin packing
|
||||
unrelated logic into a slice once 99% of the slices are occupied through
|
||||
related logic packing.
|
||||
|
||||
Note that once logic distribution reaches the 99% level through related
|
||||
logic packing, this does not mean the device is completely utilized.
|
||||
Unrelated logic packing will then begin, continuing until all usable LUTs
|
||||
and FFs are occupied. Depending on your timing budget, increased levels of
|
||||
unrelated logic packing may adversely affect the overall timing performance
|
||||
of your design.
|
||||
|
||||
Table of Contents
|
||||
-----------------
|
||||
Section 1 - Errors
|
||||
Section 2 - Warnings
|
||||
Section 3 - Informational
|
||||
Section 4 - Removed Logic Summary
|
||||
Section 5 - Removed Logic
|
||||
Section 6 - IOB Properties
|
||||
Section 7 - RPMs
|
||||
Section 8 - Guide Report
|
||||
Section 9 - Area Group and Partition Summary
|
||||
Section 10 - Modular Design Summary
|
||||
Section 11 - Timing Report
|
||||
Section 12 - Configuration String Information
|
||||
Section 13 - Control Set Information
|
||||
Section 14 - Utilization by Hierarchy
|
||||
|
||||
Section 1 - Errors
|
||||
------------------
|
||||
|
||||
Section 2 - Warnings
|
||||
--------------------
|
||||
WARNING:LIT:243 - Logical network RxD2 has no load.
|
||||
WARNING:LIT:395 - The above warning message base_net_load_rule is repeated 1
|
||||
more times for the following (max. 5 shown):
|
||||
TxD2
|
||||
To see the details of these warning messages, please use the -detail switch.
|
||||
|
||||
Section 3 - Informational
|
||||
-------------------------
|
||||
INFO:MapLib:564 - The following environment variables are currently set:
|
||||
INFO:MapLib:591 - XIL_MAP_LOCWARN Value: 1
|
||||
INFO:LIT:244 - All of the single ended outputs in this design are using slew
|
||||
rate limited output drivers. The delay on speed critical single ended outputs
|
||||
can be dramatically reduced by designating them as fast outputs.
|
||||
|
||||
Section 4 - Removed Logic Summary
|
||||
---------------------------------
|
||||
2 block(s) optimized away
|
||||
|
||||
Section 5 - Removed Logic
|
||||
-------------------------
|
||||
|
||||
Optimized Block(s):
|
||||
TYPE BLOCK
|
||||
GND XST_GND
|
||||
VCC XST_VCC
|
||||
|
||||
To enable printing of redundant blocks removed and signals merged, set the
|
||||
detailed map report option and rerun map.
|
||||
|
||||
Section 6 - IOB Properties
|
||||
--------------------------
|
||||
|
||||
+-------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
| IOB Name | Type | Direction | IO Standard | Drive | Slew | Reg (s) | Resistor | IOB |
|
||||
| | | | | Strength | Rate | | | Delay |
|
||||
+-------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
| RxD | IBUF | INPUT | LVCMOS25 | | | IFF1 | | 0 / 3 |
|
||||
| TxD | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | OFF1 | | 0 / 0 |
|
||||
| addr<0> | IBUF | INPUT | LVCMOS25 | | | IFF1 | | 0 / 3 |
|
||||
| addr<1> | IBUF | INPUT | LVCMOS25 | | | IFF1 | | 0 / 3 |
|
||||
| addr<2> | IBUF | INPUT | LVCMOS25 | | | IFF1 | | 0 / 3 |
|
||||
| clk | IBUF | INPUT | LVCMOS25 | | | | | 0 / 0 |
|
||||
| irq_pin | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | | | 0 / 0 |
|
||||
| led | IOB | OUTPUT | LVCMOS25 | 12 | SLOW | OFF1 | | 0 / 0 |
|
||||
| ncs | IBUF | INPUT | LVCMOS25 | | | IFF1 | | 0 / 3 |
|
||||
| noe | IBUF | INPUT | LVCMOS25 | | | | | 0 / 0 |
|
||||
| nwe | IBUF | INPUT | LVCMOS25 | | | IFF1 | | 0 / 3 |
|
||||
| reset | IBUF | INPUT | LVCMOS25 | | | | | 0 / 0 |
|
||||
| sram_data<0> | IOB | BIDIR | LVCMOS25 | 12 | SLOW | IFF1 | | 0 / 3 |
|
||||
| sram_data<1> | IOB | BIDIR | LVCMOS25 | 12 | SLOW | IFF1 | | 0 / 3 |
|
||||
| sram_data<2> | IOB | BIDIR | LVCMOS25 | 12 | SLOW | IFF1 | | 0 / 3 |
|
||||
| sram_data<3> | IOB | BIDIR | LVCMOS25 | 12 | SLOW | IFF1 | | 0 / 3 |
|
||||
| sram_data<4> | IOB | BIDIR | LVCMOS25 | 12 | SLOW | IFF1 | | 0 / 3 |
|
||||
| sram_data<5> | IOB | BIDIR | LVCMOS25 | 12 | SLOW | IFF1 | | 0 / 3 |
|
||||
| sram_data<6> | IOB | BIDIR | LVCMOS25 | 12 | SLOW | IFF1 | | 0 / 3 |
|
||||
| sram_data<7> | IOB | BIDIR | LVCMOS25 | 12 | SLOW | IFF1 | | 0 / 3 |
|
||||
+-------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
|
||||
Section 7 - RPMs
|
||||
----------------
|
||||
|
||||
Section 8 - Guide Report
|
||||
------------------------
|
||||
Guide not run on this design.
|
||||
|
||||
Section 9 - Area Group and Partition Summary
|
||||
--------------------------------------------
|
||||
|
||||
Partition Implementation Status
|
||||
-------------------------------
|
||||
|
||||
No Partitions were found in this design.
|
||||
|
||||
-------------------------------
|
||||
|
||||
Area Group Information
|
||||
----------------------
|
||||
|
||||
No area groups were found in this design.
|
||||
|
||||
----------------------
|
||||
|
||||
Section 10 - Modular Design Summary
|
||||
-----------------------------------
|
||||
Modular Design not used for this design.
|
||||
|
||||
Section 11 - Timing Report
|
||||
--------------------------
|
||||
This design was not run using timing mode.
|
||||
|
||||
Section 12 - Configuration String Details
|
||||
-----------------------------------------
|
||||
Use the "-detail" map option to print out Configuration Strings
|
||||
|
||||
Section 13 - Control Set Information
|
||||
------------------------------------
|
||||
No control set information for this architecture.
|
||||
|
||||
Section 14 - Utilization by Hierarchy
|
||||
-------------------------------------
|
||||
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
| Module | Partition | Slices | Slice Reg | LUTs | LUTRAM | BRAM | MULT18X18 | BUFG | DCM | Full Hierarchical Name |
|
||||
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
| uart_peripheral/ | | 35/165 | 34/157 | 47/181 | 0/0 | 0/0 | 0/0 | 1/1 | 0/0 | uart_peripheral |
|
||||
| +UART | | 0/130 | 0/123 | 0/134 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART |
|
||||
| ++buffrx1 | | 14/14 | 20/20 | 5/5 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/buffrx1 |
|
||||
| ++bufftx1 | | 12/12 | 17/17 | 14/14 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/bufftx1 |
|
||||
| ++ctrl_rx1 | | 3/3 | 5/5 | 6/6 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/ctrl_rx1 |
|
||||
| ++ctrl_tx1 | | 6/6 | 6/6 | 10/10 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/ctrl_tx1 |
|
||||
| ++dato_rdy1 | | 3/3 | 2/2 | 2/2 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/dato_rdy1 |
|
||||
| ++div161 | | 3/3 | 4/4 | 4/4 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/div161 |
|
||||
| ++div27 | | 5/5 | 6/6 | 9/9 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/div27 |
|
||||
| ++div_ms1 | | 31/31 | 33/33 | 27/27 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/div_ms1 |
|
||||
| ++ier1 | | 3/3 | 3/3 | 2/2 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/ier1 |
|
||||
| ++if_arm1 | | 18/18 | 0/0 | 30/30 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/if_arm1 |
|
||||
| ++ifrxd1 | | 1/1 | 2/2 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/ifrxd1 |
|
||||
| ++isr1 | | 14/14 | 8/8 | 13/13 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/isr1 |
|
||||
| ++lcr1 | | 4/4 | 8/8 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/lcr1 |
|
||||
| ++muestreo1 | | 7/7 | 6/6 | 8/8 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/muestreo1 |
|
||||
| ++pulso1 | | 2/2 | 1/1 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/pulso1 |
|
||||
| ++pulso2 | | 2/2 | 1/1 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/pulso2 |
|
||||
| ++pulso3 | | 2/2 | 1/1 | 1/1 | 0/0 | 0/0 | 0/0 | 0/0 | 0/0 | uart_peripheral/UART/pulso3 |
|
||||
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
|
||||
* Slices can be packed with basic elements from multiple hierarchies.
|
||||
Therefore, a slice will be counted in every hierarchical module
|
||||
that each of its packed basic elements belong to.
|
||||
** For each column, there are two numbers reported <A>/<B>.
|
||||
<A> is the number of elements that belong to that specific hierarchical module.
|
||||
<B> is the total number of elements from that hierarchical module and any lower level
|
||||
hierarchical modules below.
|
||||
*** The LUTRAM column counts all LUTs used as memory including RAM, ROM, and shift registers.
|
||||
3
UART/logic/build/project.ncd
Normal file
3
UART/logic/build/project.ncd
Normal file
File diff suppressed because one or more lines are too long
3
UART/logic/build/project.ngc
Normal file
3
UART/logic/build/project.ngc
Normal file
File diff suppressed because one or more lines are too long
119
UART/logic/build/project.ngc_xst.xrpt
Normal file
119
UART/logic/build/project.ngc_xst.xrpt
Normal file
@@ -0,0 +1,119 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
|
||||
<document OS="lin" product="ISE" version="10.1.03">
|
||||
|
||||
<!--The data in this file is primarily intended for consumption by Xilinx tools.
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="Xst" timeStamp="Thu Nov 11 14:37:08 2010">
|
||||
<section stringID="XST_HDL_SYNTHESIS_REPORT">
|
||||
<item dataType="int" stringID="XST_ADDERSSUBTRACTORS" value="1">
|
||||
<item dataType="int" stringID="XST_16BIT_ADDER" value="1"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_COUNTERS" value="6">
|
||||
<item dataType="int" stringID="XST_4BIT_UP_COUNTER" value="4"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="71">
|
||||
<item dataType="int" stringID="XST_1BIT_REGISTER" value="62"/>
|
||||
<item dataType="int" stringID="XST_16BIT_REGISTER" value="1"/>
|
||||
<item dataType="int" stringID="XST_4BIT_REGISTER" value="2"/>
|
||||
<item dataType="int" stringID="XST_8BIT_REGISTER" value="5"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_COMPARATORS" value="1"></item>
|
||||
<item dataType="int" stringID="XST_TRISTATES" value="1"></item>
|
||||
<item dataType="int" stringID="XST_XORS" value="4">
|
||||
<item dataType="int" stringID="XST_1BIT_XOR2" value="2"/>
|
||||
<item dataType="int" stringID="XST_1BIT_XOR9" value="1"/>
|
||||
</item>
|
||||
</section>
|
||||
<section stringID="XST_ADVANCED_HDL_SYNTHESIS_REPORT">
|
||||
<item dataType="int" stringID="XST_ADDERSSUBTRACTORS" value="1">
|
||||
<item dataType="int" stringID="XST_16BIT_ADDER" value="1"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_COUNTERS" value="6">
|
||||
<item dataType="int" stringID="XST_4BIT_UP_COUNTER" value="4"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="128">
|
||||
<item dataType="int" stringID="XST_FLIPFLOPS" value="128"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_COMPARATORS" value="1"></item>
|
||||
<item dataType="int" stringID="XST_XORS" value="4">
|
||||
<item dataType="int" stringID="XST_1BIT_XOR2" value="2"/>
|
||||
<item dataType="int" stringID="XST_1BIT_XOR9" value="1"/>
|
||||
</item>
|
||||
</section>
|
||||
<section stringID="XST_FINAL_REGISTER_REPORT">
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="173">
|
||||
<item dataType="int" stringID="XST_FLIPFLOPS" value="173"/>
|
||||
</item>
|
||||
</section>
|
||||
<section stringID="XST_PARTITION_REPORT">
|
||||
<section stringID="XST_PARTITION_IMPLEMENTATION_STATUS">
|
||||
<section stringID="XST_NO_PARTITIONS_WERE_FOUND_IN_THIS_DESIGN"/>
|
||||
</section>
|
||||
</section>
|
||||
<section stringID="XST_FINAL_REPORT">
|
||||
<section stringID="XST_FINAL_RESULTS">
|
||||
<item stringID="XST_RTL_TOP_LEVEL_OUTPUT_FILE_NAME" value="project.ngr"/>
|
||||
<item stringID="XST_TOP_LEVEL_OUTPUT_FILE_NAME" value="project.ngc"/>
|
||||
<item stringID="XST_OUTPUT_FORMAT" value="NGC"/>
|
||||
<item stringID="XST_OPTIMIZATION_GOAL" value="Area"/>
|
||||
<item stringID="XST_KEEP_HIERARCHY" value="no"/>
|
||||
</section>
|
||||
<section stringID="XST_DESIGN_STATISTICS">
|
||||
<item stringID="XST_IOS" value="22"/>
|
||||
</section>
|
||||
<section stringID="XST_CELL_USAGE">
|
||||
<item dataType="int" stringID="XST_BELS" value="278">
|
||||
<item dataType="int" stringID="XST_GND" value="1"/>
|
||||
<item dataType="int" stringID="XST_INV" value="9"/>
|
||||
<item dataType="int" stringID="XST_LUT1" value="38"/>
|
||||
<item dataType="int" stringID="XST_LUT2" value="10"/>
|
||||
<item dataType="int" stringID="XST_LUT3" value="48"/>
|
||||
<item dataType="int" stringID="XST_LUT4" value="78"/>
|
||||
<item dataType="int" stringID="XST_MUXCY" value="46"/>
|
||||
<item dataType="int" stringID="XST_MUXF5" value="7"/>
|
||||
<item dataType="int" stringID="XST_VCC" value="1"/>
|
||||
<item dataType="int" stringID="XST_XORCY" value="40"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="173">
|
||||
<item dataType="int" stringID="XST_FD" value="3"/>
|
||||
<item dataType="int" stringID="XST_FD1" value="13"/>
|
||||
<item dataType="int" stringID="XST_FDC" value="10"/>
|
||||
<item dataType="int" stringID="XST_FDCE" value="80"/>
|
||||
<item dataType="int" stringID="XST_FDE" value="1"/>
|
||||
<item dataType="int" stringID="XST_FDP" value="1"/>
|
||||
<item dataType="int" stringID="XST_FDPE" value="14"/>
|
||||
<item dataType="int" stringID="XST_FDR" value="36"/>
|
||||
<item dataType="int" stringID="XST_FDRE" value="12"/>
|
||||
<item dataType="int" stringID="XST_FDSE" value="3"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_CLOCK_BUFFERS" value="1">
|
||||
<item dataType="int" stringID="XST_BUFGP" value="1"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_IO_BUFFERS" value="19">
|
||||
<item dataType="int" stringID="XST_IBUF" value="8"/>
|
||||
<item dataType="int" stringID="XST_OBUF" value="3"/>
|
||||
</item>
|
||||
</section>
|
||||
</section>
|
||||
<section stringID="XST_DEVICE_UTILIZATION_SUMMARY">
|
||||
<item stringID="XST_SELECTED_DEVICE" value="3s500evq100-4"/>
|
||||
<item AVAILABLE="4656" dataType="int" stringID="XST_NUMBER_OF_SLICES" value="114"/>
|
||||
<item AVAILABLE="9312" dataType="int" stringID="XST_NUMBER_OF_SLICE_FLIP_FLOPS" value="158"/>
|
||||
<item AVAILABLE="9312" dataType="int" stringID="XST_NUMBER_OF_4_INPUT_LUTS" value="183"/>
|
||||
<item dataType="int" stringID="XST_NUMBER_OF_IOS" value="22"/>
|
||||
<item AVAILABLE="66" dataType="int" stringID="XST_NUMBER_OF_BONDED_IOBS" value="20"/>
|
||||
<item AVAILABLE="24" dataType="int" stringID="XST_NUMBER_OF_GCLKS" value="1"/>
|
||||
</section>
|
||||
<section stringID="XST_PARTITION_RESOURCE_SUMMARY">
|
||||
<section stringID="XST_NO_PARTITIONS_WERE_FOUND_IN_THIS_DESIGN"/>
|
||||
</section>
|
||||
<section stringID="XST_ERRORS_STATISTICS">
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="49"/>
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="1"/>
|
||||
</section>
|
||||
</application>
|
||||
|
||||
</document>
|
||||
3
UART/logic/build/project.ngd
Normal file
3
UART/logic/build/project.ngd
Normal file
File diff suppressed because one or more lines are too long
3
UART/logic/build/project.ngm
Normal file
3
UART/logic/build/project.ngm
Normal file
File diff suppressed because one or more lines are too long
3
UART/logic/build/project.ngr
Normal file
3
UART/logic/build/project.ngr
Normal file
File diff suppressed because one or more lines are too long
28
UART/logic/build/project.pcf
Normal file
28
UART/logic/build/project.pcf
Normal file
@@ -0,0 +1,28 @@
|
||||
//! **************************************************************************
|
||||
// Written by: Map K.39 on Thu Nov 11 14:38:06 2010
|
||||
//! **************************************************************************
|
||||
|
||||
SCHEMATIC START;
|
||||
COMP "addr<2>" LOCATE = SITE "P79" LEVEL 1;
|
||||
COMP "clk" LOCATE = SITE "P38" LEVEL 1;
|
||||
COMP "sram_data<0>" LOCATE = SITE "P16" LEVEL 1;
|
||||
COMP "sram_data<1>" LOCATE = SITE "P15" LEVEL 1;
|
||||
COMP "sram_data<2>" LOCATE = SITE "P12" LEVEL 1;
|
||||
COMP "sram_data<3>" LOCATE = SITE "P11" LEVEL 1;
|
||||
COMP "sram_data<4>" LOCATE = SITE "P10" LEVEL 1;
|
||||
COMP "led" LOCATE = SITE "P44" LEVEL 1;
|
||||
COMP "sram_data<5>" LOCATE = SITE "P9" LEVEL 1;
|
||||
COMP "sram_data<6>" LOCATE = SITE "P5" LEVEL 1;
|
||||
COMP "RxD" LOCATE = SITE "P68" LEVEL 1;
|
||||
COMP "sram_data<7>" LOCATE = SITE "P4" LEVEL 1;
|
||||
COMP "TxD" LOCATE = SITE "P67" LEVEL 1;
|
||||
COMP "ncs" LOCATE = SITE "P69" LEVEL 1;
|
||||
COMP "noe" LOCATE = SITE "P86" LEVEL 1;
|
||||
COMP "irq_pin" LOCATE = SITE "P71" LEVEL 1;
|
||||
COMP "nwe" LOCATE = SITE "P88" LEVEL 1;
|
||||
COMP "reset" LOCATE = SITE "P30" LEVEL 1;
|
||||
COMP "addr<0>" LOCATE = SITE "P84" LEVEL 1;
|
||||
COMP "addr<1>" LOCATE = SITE "P83" LEVEL 1;
|
||||
NET "clk_BUFGP/IBUFG" BEL "clk_BUFGP/BUFG.GCLKMUX" USELOCALCONNECT;
|
||||
SCHEMATIC END;
|
||||
|
||||
2
UART/logic/build/project.src
Normal file
2
UART/logic/build/project.src
Normal file
@@ -0,0 +1,2 @@
|
||||
verilog work ../uart_peripheral.v
|
||||
verilog work ../uart.v
|
||||
10
UART/logic/build/project.xst
Normal file
10
UART/logic/build/project.xst
Normal file
@@ -0,0 +1,10 @@
|
||||
run
|
||||
-top uart_peripheral
|
||||
-p xc3s500e-VQ100-4
|
||||
-opt_mode Area
|
||||
-opt_level 1
|
||||
-ifn project.src
|
||||
-ifmt mixed
|
||||
-ofn project.ngc
|
||||
-ofmt NGC
|
||||
-rtlview yes
|
||||
20
UART/logic/build/project_ngdbuild.xrpt
Normal file
20
UART/logic/build/project_ngdbuild.xrpt
Normal file
@@ -0,0 +1,20 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
|
||||
<document OS="lin" product="ISE" version="10.1.03">
|
||||
|
||||
<!--The data in this file is primarily intended for consumption by Xilinx tools.
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="NgdBuild" timeStamp="Thu Nov 11 14:37:46 2010">
|
||||
<task stringID="NGDBUILD_REPORT">
|
||||
<section stringID="NGDBUILD_DESIGN_SUMMARY">
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_ERRORS" value="0"/>
|
||||
<item dataType="int" stringID="NGDBUILD_FILTERED_WARNINGS" value="0"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_WARNINGS" value="0"/>
|
||||
<item dataType="int" stringID="NGDBUILD_FILTERED_INFOS" value="0"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INFOS" value="0"/>
|
||||
</section>
|
||||
</task>
|
||||
</application>
|
||||
|
||||
</document>
|
||||
99
UART/logic/build/project_r.bgn
Normal file
99
UART/logic/build/project_r.bgn
Normal file
@@ -0,0 +1,99 @@
|
||||
Release 10.1.03 - Bitgen K.39 (lin)
|
||||
Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
|
||||
PMSPEC -- Overriding Xilinx file
|
||||
</opt/cad/Xilinx/10.1/ISE/spartan3e/data/spartan3e.acd> with local file
|
||||
</opt/cad/Xilinx/10.1/ISE/spartan3e/data/spartan3e.acd>
|
||||
Loading device for application Rf_Device from file '3s500e.nph' in environment
|
||||
/opt/cad/Xilinx/10.1/ISE:/opt/cad/Xilinx/10.1/ISE/.
|
||||
"uart_peripheral" is an NCD, version 3.2, device xc3s500e, package vq100,
|
||||
speed -4
|
||||
|
||||
Thu Nov 11 14:39:09 2010
|
||||
|
||||
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/bitgen -l -w -g TdoPin:PULLNONE -g DonePin:PULLUP -g CRC:enable -g StartUpClk:CCLK project_r.ncd
|
||||
|
||||
INFO:Bitgen:275 - Spartan-3E devices do not support bitstream readback of the
|
||||
Blockram resources in the -4C speedgrade. If Blockram readback functionality
|
||||
is desired, it is suggested to target the -5C or -4I speedgrades.
|
||||
Summary of Bitgen Options:
|
||||
+----------------------+----------------------+
|
||||
| Option Name | Current Setting |
|
||||
+----------------------+----------------------+
|
||||
| Compress | (Not Specified)* |
|
||||
+----------------------+----------------------+
|
||||
| Readback | (Not Specified)* |
|
||||
+----------------------+----------------------+
|
||||
| CRC | Enable** |
|
||||
+----------------------+----------------------+
|
||||
| DebugBitstream | No* |
|
||||
+----------------------+----------------------+
|
||||
| ConfigRate | 1* |
|
||||
+----------------------+----------------------+
|
||||
| StartupClk | Cclk** |
|
||||
+----------------------+----------------------+
|
||||
| DCMShutdown | Disable* |
|
||||
+----------------------+----------------------+
|
||||
| DonePin | Pullup** |
|
||||
+----------------------+----------------------+
|
||||
| ProgPin | Pullup* |
|
||||
+----------------------+----------------------+
|
||||
| TckPin | Pullup* |
|
||||
+----------------------+----------------------+
|
||||
| TdiPin | Pullup* |
|
||||
+----------------------+----------------------+
|
||||
| TdoPin | Pullnone |
|
||||
+----------------------+----------------------+
|
||||
| TmsPin | Pullup* |
|
||||
+----------------------+----------------------+
|
||||
| UnusedPin | Pulldown* |
|
||||
+----------------------+----------------------+
|
||||
| GWE_cycle | 6* |
|
||||
+----------------------+----------------------+
|
||||
| GTS_cycle | 5* |
|
||||
+----------------------+----------------------+
|
||||
| LCK_cycle | NoWait* |
|
||||
+----------------------+----------------------+
|
||||
| DONE_cycle | 4* |
|
||||
+----------------------+----------------------+
|
||||
| Persist | No* |
|
||||
+----------------------+----------------------+
|
||||
| DriveDone | No* |
|
||||
+----------------------+----------------------+
|
||||
| DonePipe | No* |
|
||||
+----------------------+----------------------+
|
||||
| Security | None* |
|
||||
+----------------------+----------------------+
|
||||
| UserID | 0xFFFFFFFF* |
|
||||
+----------------------+----------------------+
|
||||
| MultiBootMode | No* |
|
||||
+----------------------+----------------------+
|
||||
| ActivateGclk | No* |
|
||||
+----------------------+----------------------+
|
||||
| ActiveReconfig | No* |
|
||||
+----------------------+----------------------+
|
||||
| PartialMask0 | (Not Specified)* |
|
||||
+----------------------+----------------------+
|
||||
| PartialMask1 | (Not Specified)* |
|
||||
+----------------------+----------------------+
|
||||
| PartialMask2 | (Not Specified)* |
|
||||
+----------------------+----------------------+
|
||||
| PartialGclk | (Not Specified)* |
|
||||
+----------------------+----------------------+
|
||||
| PartialLeft | (Not Specified)* |
|
||||
+----------------------+----------------------+
|
||||
| PartialRight | (Not Specified)* |
|
||||
+----------------------+----------------------+
|
||||
| IEEE1532 | No* |
|
||||
+----------------------+----------------------+
|
||||
| Binary | No* |
|
||||
+----------------------+----------------------+
|
||||
* Default setting.
|
||||
** The specified setting matches the default setting.
|
||||
|
||||
Running DRC.
|
||||
DRC detected 0 errors and 0 warnings. Please see the previously displayed
|
||||
individual error or warning messages for more details.
|
||||
Saving ll file in "project_r.ll".
|
||||
Creating bit map...
|
||||
Saving bit stream in "project_r.bit".
|
||||
Bitstream generation is complete.
|
||||
2
UART/logic/build/project_r.drc
Normal file
2
UART/logic/build/project_r.drc
Normal file
@@ -0,0 +1,2 @@
|
||||
DRC detected 0 errors and 0 warnings. Please see the previously displayed
|
||||
individual error or warning messages for more details.
|
||||
227
UART/logic/build/project_r.ll
Normal file
227
UART/logic/build/project_r.ll
Normal file
@@ -0,0 +1,227 @@
|
||||
Revision 3
|
||||
; Created by bitgen K.39 at Thu Nov 11 14:39:12 2010
|
||||
; Bit lines have the following form:
|
||||
; <offset> <frame address> <frame offset> <information>
|
||||
; <information> may be zero or more <kw>=<value> pairs
|
||||
; Block=<blockname specifies the block associated with this
|
||||
; memory cell.
|
||||
;
|
||||
; Latch=<name> specifies the latch associated with this memory cell.
|
||||
;
|
||||
; Net=<netname> specifies the user net associated with this
|
||||
; memory cell.
|
||||
;
|
||||
; COMPARE=[YES | NO] specifies whether or not it is appropriate
|
||||
; to compare this bit position between a
|
||||
; "program" and a "readback" bitstream.
|
||||
; If not present the default is NO.
|
||||
;
|
||||
; Ram=<ram id>:<bit> This is used in cases where a CLB function
|
||||
; Rom=<ram id>:<bit> generator is used as RAM (or ROM). <Ram id>
|
||||
; will be either 'F', 'G', or 'M', indicating
|
||||
; that it is part of a single F or G function
|
||||
; generator used as RAM, or as a single RAM
|
||||
; (or ROM) built from both F and G. <Bit> is
|
||||
; a decimal number.
|
||||
;
|
||||
; Info lines have the following form:
|
||||
; Info <name>=<value> specifies a bit associated with the LCA
|
||||
; configuration options, and the value of
|
||||
; that bit. The names of these bits may have
|
||||
; special meaning to software reading the .ll file.
|
||||
;
|
||||
Info STARTSEL0=1
|
||||
Bit 9552 0x00000400 240 Block=P5 Latch=T2 Net=T
|
||||
Bit 9575 0x00000400 263 Block=P4 Latch=T2 Net=T
|
||||
Bit 10640 0x00000400 1328 Block=P10 Latch=T2 Net=T
|
||||
Bit 10663 0x00000400 1351 Block=P9 Latch=T2 Net=T
|
||||
Bit 10768 0x00000400 1456 Block=P12 Latch=T2 Net=T
|
||||
Bit 10791 0x00000400 1479 Block=P11 Latch=T2 Net=T
|
||||
Bit 10896 0x00000400 1584 Block=P16 Latch=T2 Net=T
|
||||
Bit 10919 0x00000400 1607 Block=P15 Latch=T2 Net=T
|
||||
Bit 12656 0x00020000 240 Block=P5 Latch=O2 Net=rdBus<6>
|
||||
Bit 12679 0x00020000 263 Block=P4 Latch=O2 Net=rdBus<7>
|
||||
Bit 13744 0x00020000 1328 Block=P10 Latch=O2 Net=rdBus<4>
|
||||
Bit 13767 0x00020000 1351 Block=P9 Latch=O2 Net=rdBus<5>
|
||||
Bit 13872 0x00020000 1456 Block=P12 Latch=O2 Net=rdBus<2>
|
||||
Bit 13895 0x00020000 1479 Block=P11 Latch=O2 Net=rdBus<3>
|
||||
Bit 14000 0x00020000 1584 Block=P16 Latch=O2 Net=rdBus<0>
|
||||
Bit 14023 0x00020000 1607 Block=P15 Latch=O2 Net=rdBus<1>
|
||||
Bit 15759 0x00020200 239 Block=P5 Latch=IQ1 Net=buffer_data<6>
|
||||
Bit 15784 0x00020200 264 Block=P4 Latch=IQ1 Net=buffer_data<7>
|
||||
Bit 16847 0x00020200 1327 Block=P10 Latch=IQ1 Net=buffer_data<4>
|
||||
Bit 16872 0x00020200 1352 Block=P9 Latch=IQ1 Net=buffer_data<5>
|
||||
Bit 16975 0x00020200 1455 Block=P12 Latch=IQ1 Net=buffer_data<2>
|
||||
Bit 17000 0x00020200 1480 Block=P11 Latch=IQ1 Net=buffer_data<3>
|
||||
Bit 17103 0x00020200 1583 Block=P16 Latch=IQ1 Net=buffer_data<0>
|
||||
Bit 17128 0x00020200 1608 Block=P15 Latch=IQ1 Net=buffer_data<1>
|
||||
Bit 131834 0x00062200 1466 Block=SLICE_X2Y48 Latch=YQ Net=wdBus<2>
|
||||
Bit 131837 0x00062200 1469 Block=SLICE_X2Y48 Latch=XQ Net=wdBus<3>
|
||||
Bit 131962 0x00062200 1594 Block=SLICE_X2Y44 Latch=YQ Net=wdBus<0>
|
||||
Bit 131965 0x00062200 1597 Block=SLICE_X2Y44 Latch=XQ Net=wdBus<1>
|
||||
Bit 901082 0x00202400 922 Block=SLICE_X26Y65 Latch=YQ Net=wdBus<4>
|
||||
Bit 901085 0x00202400 925 Block=SLICE_X26Y65 Latch=XQ Net=wdBus<5>
|
||||
Bit 903706 0x00220000 442 Block=SLICE_X27Y80 Latch=YQ Net=wdBus<6>
|
||||
Bit 903709 0x00220000 445 Block=SLICE_X27Y80 Latch=XQ Net=wdBus<7>
|
||||
Bit 909416 0x00220200 3048 Block=P30 Latch=I Net=reset_IBUF
|
||||
Bit 1019098 0x00242400 986 Block=SLICE_X30Y63 Latch=YQ Net=UART/buffrx1/datorx<6>
|
||||
Bit 1019101 0x00242400 989 Block=SLICE_X30Y63 Latch=XQ Net=UART/buffrx1/datorx<7>
|
||||
Bit 1019130 0x00242400 1018 Block=SLICE_X30Y62 Latch=YQ Net=UART/buffrx1/datorx<4>
|
||||
Bit 1019133 0x00242400 1021 Block=SLICE_X30Y62 Latch=XQ Net=UART/buffrx1/datorx<5>
|
||||
Bit 1080264 0x00280000 72 Block=P88 Latch=IQ1 Net=snwe
|
||||
Bit 1140058 0x002a0000 890 Block=SLICE_X34Y66 Latch=YQ Net=UART/buffrx1/datorx<0>
|
||||
Bit 1140061 0x002a0000 893 Block=SLICE_X34Y66 Latch=XQ Net=UART/buffrx1/datorx<1>
|
||||
Bit 1140090 0x002a0000 922 Block=SLICE_X34Y65 Latch=YQ Net=UART/buffrx1/bufrx<2>
|
||||
Bit 1140093 0x002a0000 925 Block=SLICE_X34Y65 Latch=XQ Net=UART/buffrx1/bufrx<3>
|
||||
Bit 1140186 0x002a0000 1018 Block=SLICE_X34Y62 Latch=YQ Net=UART/buffrx1/bufrx<4>
|
||||
Bit 1140189 0x002a0000 1021 Block=SLICE_X34Y62 Latch=XQ Net=UART/buffrx1/bufrx<5>
|
||||
Bit 1143162 0x002a0200 890 Block=SLICE_X35Y66 Latch=YQ Net=UART/buffrx1/bufrx<0>
|
||||
Bit 1143165 0x002a0200 893 Block=SLICE_X35Y66 Latch=XQ Net=UART/buffrx1/bufrx<1>
|
||||
Bit 1143226 0x002a0200 954 Block=SLICE_X35Y64 Latch=YQ Net=UART/buffrx1/datorx<2>
|
||||
Bit 1143229 0x002a0200 957 Block=SLICE_X35Y64 Latch=XQ Net=UART/buffrx1/datorx<3>
|
||||
Bit 1143258 0x002a0200 986 Block=SLICE_X35Y63 Latch=YQ Net=UART/buffrx1/bufrx<6>
|
||||
Bit 1143261 0x002a0200 989 Block=SLICE_X35Y63 Latch=XQ Net=UART/buffrx1/bufrx<7>
|
||||
Bit 1145416 0x002a0400 40 Block=P86 Latch=I Net=noe_IBUF
|
||||
Bit 1148463 0x002a0400 3087 Block=P38 Latch=I Net=clk_BUFGP/IBUFG
|
||||
Bit 1258042 0x002e0000 922 Block=SLICE_X38Y65 Latch=YQ Net=UART/buffrx1/err_frame
|
||||
Bit 1258077 0x002e0000 957 Block=SLICE_X38Y64 Latch=XQ Net=UART/buffrx1/err_paridad
|
||||
Bit 1260271 0x002e0200 47 Block=P84 Latch=IQ1 Net=buffer_addr<0>
|
||||
Bit 1260296 0x002e0200 72 Block=P83 Latch=IQ1 Net=buffer_addr<1>
|
||||
Bit 1261210 0x002e0200 986 Block=SLICE_X39Y63 Latch=YQ Net=UART/buffrx1/bufrx<8>
|
||||
Bit 1261213 0x002e0200 989 Block=SLICE_X39Y63 Latch=XQ Net=UART/buffrx1/bufrx<9>
|
||||
Bit 1317242 0x00300000 1146 Block=SLICE_X40Y58 Latch=YQ Net=UART/ctrl_rx1/cont_rx<2>
|
||||
Bit 1317245 0x00300000 1149 Block=SLICE_X40Y58 Latch=XQ Net=UART/ctrl_rx1/cont_rx<3>
|
||||
Bit 1319152 0x00300000 3056 Block=P44 Latch=O2 Net=Result<23>
|
||||
Bit 1320186 0x00300200 986 Block=SLICE_X41Y63 Latch=YQ Net=UART/pulso2/dff
|
||||
Bit 1320314 0x00300200 1114 Block=SLICE_X41Y59 Latch=YQ Net=UART/ctrl_rx1/cont_rx<0>
|
||||
Bit 1320317 0x00300200 1117 Block=SLICE_X41Y59 Latch=XQ Net=UART/ctrl_rx1/cont_rx<1>
|
||||
Bit 1376061 0x00320000 989 Block=SLICE_X42Y63 Latch=XQ Net=UART/muestreo1/sample
|
||||
Bit 1376093 0x00320000 1021 Block=SLICE_X42Y62 Latch=XQ Net=UART/muestreo1/cont_m<3>
|
||||
Bit 1379066 0x00320200 890 Block=SLICE_X43Y66 Latch=YQ Net=UART/isr1/mask_error
|
||||
Bit 1379162 0x00320200 986 Block=SLICE_X43Y63 Latch=YQ Net=UART/muestreo1/cont_m<2>
|
||||
Bit 1379194 0x00320200 1018 Block=SLICE_X43Y62 Latch=YQ Net=UART/muestreo1/cont_m<0>
|
||||
Bit 1379197 0x00320200 1021 Block=SLICE_X43Y62 Latch=XQ Net=UART/muestreo1/cont_m<1>
|
||||
Bit 1379293 0x00320200 1117 Block=SLICE_X43Y59 Latch=XQ Net=UART/ctrl_rx1/rx_lleno
|
||||
Bit 1380826 0x00320200 2650 Block=SLICE_X43Y11 Latch=YQ Net=counter<23>
|
||||
Bit 1380829 0x00320200 2653 Block=SLICE_X43Y11 Latch=XQ Net=counter<22>
|
||||
Bit 1380858 0x00320200 2682 Block=SLICE_X43Y10 Latch=YQ Net=counter<21>
|
||||
Bit 1380861 0x00320200 2685 Block=SLICE_X43Y10 Latch=XQ Net=counter<20>
|
||||
Bit 1380890 0x00320200 2714 Block=SLICE_X43Y9 Latch=YQ Net=counter<19>
|
||||
Bit 1380893 0x00320200 2717 Block=SLICE_X43Y9 Latch=XQ Net=counter<18>
|
||||
Bit 1380922 0x00320200 2746 Block=SLICE_X43Y8 Latch=YQ Net=counter<17>
|
||||
Bit 1380925 0x00320200 2749 Block=SLICE_X43Y8 Latch=XQ Net=counter<16>
|
||||
Bit 1380954 0x00320200 2778 Block=SLICE_X43Y7 Latch=YQ Net=counter<15>
|
||||
Bit 1380957 0x00320200 2781 Block=SLICE_X43Y7 Latch=XQ Net=counter<14>
|
||||
Bit 1380986 0x00320200 2810 Block=SLICE_X43Y6 Latch=YQ Net=counter<13>
|
||||
Bit 1380989 0x00320200 2813 Block=SLICE_X43Y6 Latch=XQ Net=counter<12>
|
||||
Bit 1381018 0x00320200 2842 Block=SLICE_X43Y5 Latch=YQ Net=counter<11>
|
||||
Bit 1381021 0x00320200 2845 Block=SLICE_X43Y5 Latch=XQ Net=counter<10>
|
||||
Bit 1381050 0x00320200 2874 Block=SLICE_X43Y4 Latch=YQ Net=counter<9>
|
||||
Bit 1381053 0x00320200 2877 Block=SLICE_X43Y4 Latch=XQ Net=counter<8>
|
||||
Bit 1381082 0x00320200 2906 Block=SLICE_X43Y3 Latch=YQ Net=counter<7>
|
||||
Bit 1381085 0x00320200 2909 Block=SLICE_X43Y3 Latch=XQ Net=counter<6>
|
||||
Bit 1381114 0x00320200 2938 Block=SLICE_X43Y2 Latch=YQ Net=counter<5>
|
||||
Bit 1381117 0x00320200 2941 Block=SLICE_X43Y2 Latch=XQ Net=counter<4>
|
||||
Bit 1381146 0x00320200 2970 Block=SLICE_X43Y1 Latch=YQ Net=counter<3>
|
||||
Bit 1381149 0x00320200 2973 Block=SLICE_X43Y1 Latch=XQ Net=counter<2>
|
||||
Bit 1381178 0x00320200 3002 Block=SLICE_X43Y0 Latch=YQ Net=counter<1>
|
||||
Bit 1381181 0x00320200 3005 Block=SLICE_X43Y0 Latch=XQ Net=counter<0>
|
||||
Bit 1434781 0x00340000 733 Block=SLICE_X44Y71 Latch=XQ Net=UART/isr1/ISR<0>
|
||||
Bit 1434810 0x00340000 762 Block=SLICE_X44Y70 Latch=YQ Net=UART/isr1/ISR<1>
|
||||
Bit 1434842 0x00340000 794 Block=SLICE_X44Y69 Latch=YQ Net=UART/isr1/mask_dato_rdy
|
||||
Bit 1434877 0x00340000 829 Block=SLICE_X44Y68 Latch=XQ Net=UART/isr1/ISR<2>
|
||||
Bit 1434906 0x00340000 858 Block=SLICE_X44Y67 Latch=YQ Net=UART/lcr1/LCR<0>
|
||||
Bit 1434909 0x00340000 861 Block=SLICE_X44Y67 Latch=XQ Net=UART/lcr1/LCR<1>
|
||||
Bit 1435002 0x00340000 954 Block=SLICE_X44Y64 Latch=YQ Net=UART/lcr1/LCR<4>
|
||||
Bit 1435005 0x00340000 957 Block=SLICE_X44Y64 Latch=XQ Net=UART/lcr1/LCR<5>
|
||||
Bit 1438010 0x00340200 858 Block=SLICE_X45Y67 Latch=YQ Net=UART/lcr1/LCR<6>
|
||||
Bit 1438013 0x00340200 861 Block=SLICE_X45Y67 Latch=XQ Net=UART/lcr1/LCR<7>
|
||||
Bit 1438074 0x00340200 922 Block=SLICE_X45Y65 Latch=YQ Net=UART/lcr1/LCR<2>
|
||||
Bit 1438077 0x00340200 925 Block=SLICE_X45Y65 Latch=XQ Net=UART/lcr1/LCR<3>
|
||||
Bit 1493754 0x00360000 730 Block=SLICE_X46Y71 Latch=YQ Net=UART/isr1/mask_tx_empty
|
||||
Bit 1493853 0x00360000 829 Block=SLICE_X46Y68 Latch=XQ Net=UART/dato_rdy1/err_overrun
|
||||
Bit 1494202 0x00360000 1178 Block=SLICE_X46Y57 Latch=YQ Net=UART/div27/div27<2>
|
||||
Bit 1494205 0x00360000 1181 Block=SLICE_X46Y57 Latch=XQ Net=UART/div27/div27<3>
|
||||
Bit 1494234 0x00360000 1210 Block=SLICE_X46Y56 Latch=YQ Net=UART/div27/div27<1>
|
||||
Bit 1497309 0x00360200 1181 Block=SLICE_X47Y57 Latch=XQ Net=UART/div27/div27<0>
|
||||
Bit 1497341 0x00360200 1213 Block=SLICE_X47Y56 Latch=XQ Net=UART/div27/div27<4>
|
||||
Bit 1552730 0x00380000 730 Block=SLICE_X48Y71 Latch=YQ Net=UART/dato_rdy1/dato_rdy
|
||||
Bit 1552794 0x00380000 794 Block=SLICE_X48Y69 Latch=YQ Net=UART/div_ms1/div<12>
|
||||
Bit 1552797 0x00380000 797 Block=SLICE_X48Y69 Latch=XQ Net=UART/div_ms1/div<13>
|
||||
Bit 1552826 0x00380000 826 Block=SLICE_X48Y68 Latch=YQ Net=UART/div_ms1/div<14>
|
||||
Bit 1552829 0x00380000 829 Block=SLICE_X48Y68 Latch=XQ Net=UART/div_ms1/div<15>
|
||||
Bit 1552922 0x00380000 922 Block=SLICE_X48Y65 Latch=YQ Net=UART/div_ms1/div<6>
|
||||
Bit 1552925 0x00380000 925 Block=SLICE_X48Y65 Latch=XQ Net=UART/div_ms1/div<7>
|
||||
Bit 1552954 0x00380000 954 Block=SLICE_X48Y64 Latch=YQ Net=UART/div_ms1/div<2>
|
||||
Bit 1552957 0x00380000 957 Block=SLICE_X48Y64 Latch=XQ Net=UART/div_ms1/div<3>
|
||||
Bit 1553018 0x00380000 1018 Block=SLICE_X48Y62 Latch=YQ Net=UART/div_ms1/clk_out
|
||||
Bit 1556285 0x00380200 1181 Block=SLICE_X49Y57 Latch=XQ Net=UART/div27/div27<5>
|
||||
Bit 1614554 0x003a0200 474 Block=SLICE_X50Y79 Latch=YQ Net=UART/bufftx1/dato_tx<6>
|
||||
Bit 1614557 0x003a0200 477 Block=SLICE_X50Y79 Latch=XQ Net=UART/bufftx1/dato_tx<7>
|
||||
Bit 1614618 0x003a0200 538 Block=SLICE_X50Y77 Latch=YQ Net=UART/isr1/aux1
|
||||
Bit 1614682 0x003a0200 602 Block=SLICE_X50Y75 Latch=YQ Net=UART/bufftx1/dato_tx<4>
|
||||
Bit 1614685 0x003a0200 605 Block=SLICE_X50Y75 Latch=XQ Net=UART/bufftx1/dato_tx<5>
|
||||
Bit 1614746 0x003a0200 666 Block=SLICE_X50Y73 Latch=YQ Net=UART/isr1/carga_ISRd
|
||||
Bit 1614906 0x003a0200 826 Block=SLICE_X50Y68 Latch=YQ Net=UART/bufftx1/dato_tx<0>
|
||||
Bit 1614909 0x003a0200 829 Block=SLICE_X50Y68 Latch=XQ Net=UART/bufftx1/dato_tx<1>
|
||||
Bit 1614938 0x003a0200 858 Block=SLICE_X50Y67 Latch=YQ Net=UART/div_ms1/div<4>
|
||||
Bit 1614941 0x003a0200 861 Block=SLICE_X50Y67 Latch=XQ Net=UART/div_ms1/div<5>
|
||||
Bit 1615002 0x003a0200 922 Block=SLICE_X50Y65 Latch=YQ Net=UART/bufftx1/buftx<1>
|
||||
Bit 1615005 0x003a0200 925 Block=SLICE_X50Y65 Latch=XQ Net=UART/bufftx1/buftx<2>
|
||||
Bit 1615034 0x003a0200 954 Block=SLICE_X50Y64 Latch=YQ Net=UART/bufftx1/buftx<9>
|
||||
Bit 1615098 0x003a0200 1018 Block=SLICE_X50Y62 Latch=YQ Net=UART/muestreo1/flag_rx
|
||||
Bit 1617658 0x003a0400 474 Block=SLICE_X51Y79 Latch=YQ Net=we
|
||||
Bit 1617661 0x003a0400 477 Block=SLICE_X51Y79 Latch=XQ Net=w_st
|
||||
Bit 1617850 0x003a0400 666 Block=SLICE_X51Y73 Latch=YQ Net=UART/bufftx1/buftx<5>
|
||||
Bit 1617853 0x003a0400 669 Block=SLICE_X51Y73 Latch=XQ Net=UART/bufftx1/buftx<6>
|
||||
Bit 1617882 0x003a0400 698 Block=SLICE_X51Y72 Latch=YQ Net=UART/bufftx1/buftx<7>
|
||||
Bit 1617885 0x003a0400 701 Block=SLICE_X51Y72 Latch=XQ Net=UART/bufftx1/buftx<8>
|
||||
Bit 1617914 0x003a0400 730 Block=SLICE_X51Y71 Latch=YQ Net=UART/bufftx1/dato_tx<2>
|
||||
Bit 1617917 0x003a0400 733 Block=SLICE_X51Y71 Latch=XQ Net=UART/bufftx1/dato_tx<3>
|
||||
Bit 1617946 0x003a0400 762 Block=SLICE_X51Y70 Latch=YQ Net=UART/bufftx1/buftx<3>
|
||||
Bit 1617949 0x003a0400 765 Block=SLICE_X51Y70 Latch=XQ Net=UART/bufftx1/buftx<4>
|
||||
Bit 1617978 0x003a0400 794 Block=SLICE_X51Y69 Latch=YQ Net=UART/ier1/IER<0>
|
||||
Bit 1617981 0x003a0400 797 Block=SLICE_X51Y69 Latch=XQ Net=UART/ier1/IER<1>
|
||||
Bit 1618010 0x003a0400 826 Block=SLICE_X51Y68 Latch=YQ Net=UART/ier1/IER<2>
|
||||
Bit 1618042 0x003a0400 858 Block=SLICE_X51Y67 Latch=YQ Net=UART/div_ms1/div<10>
|
||||
Bit 1618045 0x003a0400 861 Block=SLICE_X51Y67 Latch=XQ Net=UART/div_ms1/div<11>
|
||||
Bit 1618074 0x003a0400 890 Block=SLICE_X51Y66 Latch=YQ Net=UART/div_ms1/div<8>
|
||||
Bit 1618077 0x003a0400 893 Block=SLICE_X51Y66 Latch=XQ Net=UART/div_ms1/div<9>
|
||||
Bit 1618106 0x003a0400 922 Block=SLICE_X51Y65 Latch=YQ Net=UART/div_ms1/k_div<2>
|
||||
Bit 1618109 0x003a0400 925 Block=SLICE_X51Y65 Latch=XQ Net=UART/div_ms1/k_div<3>
|
||||
Bit 1618138 0x003a0400 954 Block=SLICE_X51Y64 Latch=YQ Net=UART/div_ms1/div<0>
|
||||
Bit 1618141 0x003a0400 957 Block=SLICE_X51Y64 Latch=XQ Net=UART/div_ms1/div<1>
|
||||
Bit 1618202 0x003a0400 1018 Block=SLICE_X51Y62 Latch=YQ Net=UART/pulso1/dff
|
||||
Bit 1673850 0x003c0200 794 Block=SLICE_X52Y69 Latch=YQ Net=UART/div_ms1/k_div<12>
|
||||
Bit 1673853 0x003c0200 797 Block=SLICE_X52Y69 Latch=XQ Net=UART/div_ms1/k_div<13>
|
||||
Bit 1673946 0x003c0200 890 Block=SLICE_X52Y66 Latch=YQ Net=UART/div_ms1/k_div<14>
|
||||
Bit 1673949 0x003c0200 893 Block=SLICE_X52Y66 Latch=XQ Net=UART/div_ms1/k_div<15>
|
||||
Bit 1673978 0x003c0200 922 Block=SLICE_X52Y65 Latch=YQ Net=UART/div_ms1/k_div<4>
|
||||
Bit 1673981 0x003c0200 925 Block=SLICE_X52Y65 Latch=XQ Net=UART/div_ms1/k_div<5>
|
||||
Bit 1674010 0x003c0200 954 Block=SLICE_X52Y64 Latch=YQ Net=UART/div_ms1/k_div<0>
|
||||
Bit 1674013 0x003c0200 957 Block=SLICE_X52Y64 Latch=XQ Net=UART/div_ms1/k_div<1>
|
||||
Bit 1676954 0x02000000 794 Block=SLICE_X53Y69 Latch=YQ Net=UART/div_ms1/k_div<10>
|
||||
Bit 1676957 0x02000000 797 Block=SLICE_X53Y69 Latch=XQ Net=UART/div_ms1/k_div<11>
|
||||
Bit 1676986 0x02000000 826 Block=SLICE_X53Y68 Latch=YQ Net=UART/div_ms1/k_div<8>
|
||||
Bit 1676989 0x02000000 829 Block=SLICE_X53Y68 Latch=XQ Net=UART/div_ms1/k_div<9>
|
||||
Bit 1677146 0x02000000 986 Block=SLICE_X53Y63 Latch=YQ Net=UART/div_ms1/k_div<6>
|
||||
Bit 1677149 0x02000000 989 Block=SLICE_X53Y63 Latch=XQ Net=UART/div_ms1/k_div<7>
|
||||
Bit 1732893 0x02002400 861 Block=SLICE_X54Y67 Latch=XQ Net=UART/ctrl_tx1/tx_empty
|
||||
Bit 1732986 0x02002400 954 Block=SLICE_X54Y64 Latch=YQ Net=UART/div161/div16<1>
|
||||
Bit 1732989 0x02002400 957 Block=SLICE_X54Y64 Latch=XQ Net=UART/div161/div16<0>
|
||||
Bit 1733021 0x02002400 989 Block=SLICE_X54Y63 Latch=XQ Net=UART/ctrl_tx1/tx_on
|
||||
Bit 1733050 0x02002400 1018 Block=SLICE_X54Y62 Latch=YQ Net=UART/ctrl_tx1/cont_tx<2>
|
||||
Bit 1733053 0x02002400 1021 Block=SLICE_X54Y62 Latch=XQ Net=UART/ctrl_tx1/cont_tx<3>
|
||||
Bit 1736058 0x02002600 922 Block=SLICE_X55Y65 Latch=YQ Net=UART/pulso3/dff
|
||||
Bit 1736090 0x02002600 954 Block=SLICE_X55Y64 Latch=YQ Net=UART/div161/div16<2>
|
||||
Bit 1736093 0x02002600 957 Block=SLICE_X55Y64 Latch=XQ Net=UART/div161/div16<3>
|
||||
Bit 1736122 0x02002600 986 Block=SLICE_X55Y63 Latch=YQ Net=UART/ctrl_tx1/cont_tx<0>
|
||||
Bit 1736125 0x02002600 989 Block=SLICE_X55Y63 Latch=XQ Net=UART/ctrl_tx1/cont_tx<1>
|
||||
Bit 1736378 0x02002600 1242 Block=SLICE_X55Y55 Latch=YQ Net=UART/ifrxd1/ifrxd<2>
|
||||
Bit 1736381 0x02002600 1245 Block=SLICE_X55Y55 Latch=XQ Net=UART/ifrxd1/ifrxd<1>
|
||||
Bit 2089039 0x02027200 47 Block=P79 Latch=IQ1 Net=buffer_addr<2>
|
||||
Bit 2205104 0x04002400 1264 Block=P71 Latch=O2 Net=irq_pin_OBUF
|
||||
Bit 2205255 0x04002400 1415 Block=P67 Latch=O2 Net=UART/bufftx1/buftx_0_mux0000
|
||||
Bit 2208256 0x04020000 1312 Block=P69 Latch=IQ1 Net=sncs
|
||||
Bit 2208335 0x04020000 1391 Block=P68 Latch=IQ1 Net=UART/ifrxd1/ifrxd<0>
|
||||
Bit 2211367 0x04020200 1319 Block=P69 Latch=I Net=ncs_IBUF
|
||||
3
UART/logic/build/project_r.ncd
Normal file
3
UART/logic/build/project_r.ncd
Normal file
File diff suppressed because one or more lines are too long
130
UART/logic/build/project_r.pad
Normal file
130
UART/logic/build/project_r.pad
Normal file
@@ -0,0 +1,130 @@
|
||||
Release 10.1.03 - par K.39 (lin)
|
||||
Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
|
||||
|
||||
Thu Nov 11 14:38:56 2010
|
||||
|
||||
|
||||
# NOTE: This file is designed to be imported into a spreadsheet program
|
||||
# such as Microsoft Excel for viewing, printing and sorting. The |
|
||||
# character is used as the data field separator. This file is also designed
|
||||
# to support parsing.
|
||||
#
|
||||
INPUT FILE: project.ncd
|
||||
OUTPUT FILE: project_r.pad
|
||||
PART TYPE: xc3s500e
|
||||
SPEED GRADE: -4
|
||||
PACKAGE: vq100
|
||||
|
||||
Pinout by Pin Number:
|
||||
|
||||
-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|
|
||||
Pin Number|Signal Name|Pin Usage|Pin Name|Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage|Constraint|DCI Value|IO Register|Signal Integrity|
|
||||
P1|||PROG_B|||||||||||||
|
||||
P2||DIFFM|IO_L01P_3|UNUSED||3||||||||||
|
||||
P3||DIFFS|IO_L01N_3|UNUSED||3||||||||||
|
||||
P4|sram_data<7>|IOB|IO_L02P_3|BIDIR|LVCMOS25*|3|12|SLOW|NONE**|IFD||LOCATED||YES|NONE|
|
||||
P5|sram_data<6>|IOB|IO_L02N_3/VREF_3|BIDIR|LVCMOS25*|3|12|SLOW|NONE**|IFD||LOCATED||YES|NONE|
|
||||
P6|||VCCINT||||||||1.2|||||
|
||||
P7|||GND|||||||||||||
|
||||
P8|||VCCO_3|||3|||||2.50|||||
|
||||
P9|sram_data<5>|IOB|IO_L03P_3/LHCLK0|BIDIR|LVCMOS25*|3|12|SLOW|NONE**|IFD||LOCATED||YES|NONE|
|
||||
P10|sram_data<4>|IOB|IO_L03N_3/LHCLK1|BIDIR|LVCMOS25*|3|12|SLOW|NONE**|IFD||LOCATED||YES|NONE|
|
||||
P11|sram_data<3>|IOB|IO_L04P_3/LHCLK2|BIDIR|LVCMOS25*|3|12|SLOW|NONE**|IFD||LOCATED||YES|NONE|
|
||||
P12|sram_data<2>|IOB|IO_L04N_3/LHCLK3/IRDY2|BIDIR|LVCMOS25*|3|12|SLOW|NONE**|IFD||LOCATED||YES|NONE|
|
||||
P13||IBUF|IP|UNUSED||3||||||||||
|
||||
P14|||GND|||||||||||||
|
||||
P15|sram_data<1>|IOB|IO_L05P_3/LHCLK4/TRDY2|BIDIR|LVCMOS25*|3|12|SLOW|NONE**|IFD||LOCATED||YES|NONE|
|
||||
P16|sram_data<0>|IOB|IO_L05N_3/LHCLK5|BIDIR|LVCMOS25*|3|12|SLOW|NONE**|IFD||LOCATED||YES|NONE|
|
||||
P17||DIFFM|IO_L06P_3/LHCLK6|UNUSED||3||||||||||
|
||||
P18||DIFFS|IO_L06N_3/LHCLK7|UNUSED||3||||||||||
|
||||
P19|||GND|||||||||||||
|
||||
P20|||VCCO_3|||3|||||2.50|||||
|
||||
P21|||VCCAUX||||||||2.5|||||
|
||||
P22||DIFFM|IO_L07P_3|UNUSED||3||||||||||
|
||||
P23||DIFFS|IO_L07N_3|UNUSED||3||||||||||
|
||||
P24||DIFFM|IO_L01P_2/CSO_B|UNUSED||2||||||||||
|
||||
P25||DIFFS|IO_L01N_2/INIT_B|UNUSED||2||||||||||
|
||||
P26||DIFFM|IO_L02P_2/DOUT/BUSY|UNUSED||2||||||||||
|
||||
P27||DIFFS|IO_L02N_2/MOSI/CSI_B|UNUSED||2||||||||||
|
||||
P28|||VCCINT||||||||1.2|||||
|
||||
P29|||GND|||||||||||||
|
||||
P30|reset|IBUF|IP/VREF_2|INPUT|LVCMOS25*|2||||NONE||LOCATED||NO|NONE|
|
||||
P31|||VCCO_2|||2|||||2.50|||||
|
||||
P32||DIFFM|IO_L03P_2/D7/GCLK12|UNUSED||2||||||||||
|
||||
P33||DIFFS|IO_L03N_2/D6/GCLK13|UNUSED||2||||||||||
|
||||
P34||IOB|IO/D5|UNUSED||2||||||||||
|
||||
P35||DIFFM|IO_L04P_2/D4/GCLK14|UNUSED||2||||||||||
|
||||
P36||DIFFS|IO_L04N_2/D3/GCLK15|UNUSED||2||||||||||
|
||||
P37|||GND|||||||||||||
|
||||
P38|clk|IBUF|IP_L05P_2/RDWR_B/GCLK0|INPUT|LVCMOS25*|2||||NONE||LOCATED||NO|NONE|
|
||||
P39||DIFFSI|IP_L05N_2/M2/GCLK1|UNUSED||2||||||||||
|
||||
P40||DIFFM|IO_L06P_2/D2/GCLK2|UNUSED||2||||||||||
|
||||
P41||DIFFS|IO_L06N_2/D1/GCLK3|UNUSED||2||||||||||
|
||||
P42||IOB|IO/M1|UNUSED||2||||||||||
|
||||
P43||DIFFM|IO_L07P_2/M0|UNUSED||2||||||||||
|
||||
P44|led|IOB|IO_L07N_2/DIN/D0|OUTPUT|LVCMOS25*|2|12|SLOW|NONE**|||LOCATED||YES|NONE|
|
||||
P45|||VCCO_2|||2|||||2.50|||||
|
||||
P46|||VCCAUX||||||||2.5|||||
|
||||
P47||DIFFM|IO_L08P_2/VS2|UNUSED||2||||||||||
|
||||
P48||DIFFS|IO_L08N_2/VS1|UNUSED||2||||||||||
|
||||
P49||DIFFM|IO_L09P_2/VS0|UNUSED||2||||||||||
|
||||
P50||DIFFS|IO_L09N_2/CCLK|UNUSED||2||||||||||
|
||||
P51|||DONE|||||||||||||
|
||||
P52|||GND|||||||||||||
|
||||
P53||DIFFM|IO_L01P_1|UNUSED||1||||||||||
|
||||
P54||DIFFS|IO_L01N_1|UNUSED||1||||||||||
|
||||
P55|||VCCO_1|||1|||||2.50|||||
|
||||
P56|||VCCINT||||||||1.2|||||
|
||||
P57||DIFFM|IO_L02P_1|UNUSED||1||||||||||
|
||||
P58||DIFFS|IO_L02N_1|UNUSED||1||||||||||
|
||||
P59|||GND|||||||||||||
|
||||
P60||DIFFM|IO_L03P_1/RHCLK0|UNUSED||1||||||||||
|
||||
P61||DIFFS|IO_L03N_1/RHCLK1|UNUSED||1||||||||||
|
||||
P62||DIFFM|IO_L04P_1/RHCLK2|UNUSED||1||||||||||
|
||||
P63||DIFFS|IO_L04N_1/RHCLK3/TRDY1|UNUSED||1||||||||||
|
||||
P64|||GND|||||||||||||
|
||||
P65||DIFFM|IO_L05P_1/RHCLK4/IRDY1|UNUSED||1||||||||||
|
||||
P66||DIFFS|IO_L05N_1/RHCLK5|UNUSED||1||||||||||
|
||||
P67|TxD|IOB|IO_L06P_1/RHCLK6|OUTPUT|LVCMOS25*|1|12|SLOW|NONE**|||LOCATED||YES|NONE|
|
||||
P68|RxD|IBUF|IO_L06N_1/RHCLK7|INPUT|LVCMOS25*|1||||IFD||LOCATED||YES|NONE|
|
||||
P69|ncs|IBUF|IP/VREF_1|INPUT|LVCMOS25*|1||||IFD||LOCATED||YES|NONE|
|
||||
P70||DIFFM|IO_L07P_1|UNUSED||1||||||||||
|
||||
P71|irq_pin|IOB|IO_L07N_1|OUTPUT|LVCMOS25*|1|12|SLOW|NONE**|||LOCATED||NO|NONE|
|
||||
P72|||GND|||||||||||||
|
||||
P73|||VCCO_1|||1|||||2.50|||||
|
||||
P74|||VCCAUX||||||||2.5|||||
|
||||
P75|||TMS|||||||||||||
|
||||
P76|||TDO|||||||||||||
|
||||
P77|||TCK|||||||||||||
|
||||
P78||DIFFM|IO_L01P_0|UNUSED||0||||||||||
|
||||
P79|addr<2>|IBUF|IO_L01N_0|INPUT|LVCMOS25*|0||||IFD||LOCATED||YES|NONE|
|
||||
P80|||VCCINT||||||||1.2|||||
|
||||
P81|||GND|||||||||||||
|
||||
P82|||VCCO_0|||0|||||2.50|||||
|
||||
P83|addr<1>|IBUF|IO_L02P_0/GCLK4|INPUT|LVCMOS25*|0||||IFD||LOCATED||YES|NONE|
|
||||
P84|addr<0>|IBUF|IO_L02N_0/GCLK5|INPUT|LVCMOS25*|0||||IFD||LOCATED||YES|NONE|
|
||||
P85||DIFFM|IO_L03P_0/GCLK6|UNUSED||0||||||||||
|
||||
P86|noe|IBUF|IO_L03N_0/GCLK7|INPUT|LVCMOS25*|0||||NONE||LOCATED||NO|NONE|
|
||||
P87|||GND|||||||||||||
|
||||
P88|nwe|IBUF|IP_L04P_0/GCLK8|INPUT|LVCMOS25*|0||||IFD||LOCATED||YES|NONE|
|
||||
P89||DIFFSI|IP_L04N_0/GCLK9|UNUSED||0||||||||||
|
||||
P90||DIFFM|IO_L05P_0/GCLK10|UNUSED||0||||||||||
|
||||
P91||DIFFS|IO_L05N_0/GCLK11|UNUSED||0||||||||||
|
||||
P92||IOB|IO|UNUSED||0||||||||||
|
||||
P93|||GND|||||||||||||
|
||||
P94||DIFFM|IO_L06P_0|UNUSED||0||||||||||
|
||||
P95||DIFFS|IO_L06N_0/VREF_0|UNUSED||0||||||||||
|
||||
P96|||VCCAUX||||||||2.5|||||
|
||||
P97|||VCCO_0|||0|||||2.50|||||
|
||||
P98||DIFFM|IO_L07P_0|UNUSED||0||||||||||
|
||||
P99||DIFFS|IO_L07N_0/HSWAP|UNUSED||0||||||||||
|
||||
P100|||TDI|||||||||||||
|
||||
|
||||
-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|
|
||||
|
||||
* Default value.
|
||||
** This default Pullup/Pulldown value can be overridden in Bitgen.
|
||||
****** Special VCCO requirements may apply. Please consult the device
|
||||
family datasheet for specific guideline on VCCO requirements.
|
||||
|
||||
|
||||
197
UART/logic/build/project_r.par
Normal file
197
UART/logic/build/project_r.par
Normal file
@@ -0,0 +1,197 @@
|
||||
Release 10.1.03 par K.39 (lin)
|
||||
Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
|
||||
|
||||
cain-laptop:: Thu Nov 11 14:38:14 2010
|
||||
|
||||
par -w project.ncd project_r.ncd
|
||||
|
||||
|
||||
Constraints file: project.pcf.
|
||||
PMSPEC -- Overriding Xilinx file </opt/cad/Xilinx/10.1/ISE/spartan3e/data/spartan3e.acd> with local file
|
||||
</opt/cad/Xilinx/10.1/ISE/spartan3e/data/spartan3e.acd>
|
||||
Loading device for application Rf_Device from file '3s500e.nph' in environment
|
||||
/opt/cad/Xilinx/10.1/ISE:/opt/cad/Xilinx/10.1/ISE/.
|
||||
"uart_peripheral" is an NCD, version 3.2, device xc3s500e, package vq100, speed -4
|
||||
|
||||
Initializing temperature to 85.000 Celsius. (default - Range: -40.000 to 100.000 Celsius)
|
||||
Initializing voltage to 1.140 Volts. (default - Range: 1.140 to 1.320 Volts)
|
||||
|
||||
INFO:Par:282 - No user timing constraints were detected or you have set the option to ignore timing constraints ("par
|
||||
-x"). Place and Route will run in "Performance Evaluation Mode" to automatically improve the performance of all
|
||||
internal clocks in this design. The PAR timing summary will list the performance achieved for each clock. Note: For
|
||||
the fastest runtime, set the effort level to "std". For best performance, set the effort level to "high". For a
|
||||
balance between the fastest runtime and best performance, set the effort level to "med".
|
||||
|
||||
Device speed data version: "PRODUCTION 1.27 2008-01-09".
|
||||
|
||||
|
||||
Design Summary Report:
|
||||
|
||||
Number of External IOBs 20 out of 66 30%
|
||||
|
||||
Number of External Input IOBs 9
|
||||
|
||||
Number of External Input IBUFs 9
|
||||
Number of LOCed External Input IBUFs 9 out of 9 100%
|
||||
|
||||
|
||||
Number of External Output IOBs 3
|
||||
|
||||
Number of External Output IOBs 3
|
||||
Number of LOCed External Output IOBs 3 out of 3 100%
|
||||
|
||||
|
||||
Number of External Bidir IOBs 8
|
||||
|
||||
Number of External Bidir IOBs 8
|
||||
Number of LOCed External Bidir IOBs 8 out of 8 100%
|
||||
|
||||
|
||||
Number of BUFGMUXs 1 out of 24 4%
|
||||
Number of Slices 138 out of 4656 2%
|
||||
Number of SLICEMs 0 out of 2328 0%
|
||||
|
||||
|
||||
|
||||
Overall effort level (-ol): Standard
|
||||
Placer effort level (-pl): High
|
||||
Placer cost table entry (-t): 1
|
||||
Router effort level (-rl): Standard
|
||||
|
||||
|
||||
Starting Placer
|
||||
|
||||
Phase 1.1
|
||||
Phase 1.1 (Checksum:149c9) REAL time: 9 secs
|
||||
|
||||
Phase 2.7
|
||||
Phase 2.7 (Checksum:149c9) REAL time: 9 secs
|
||||
|
||||
Phase 3.31
|
||||
Phase 3.31 (Checksum:149c9) REAL time: 9 secs
|
||||
|
||||
Phase 4.2
|
||||
|
||||
.
|
||||
Phase 4.2 (Checksum:159e9) REAL time: 9 secs
|
||||
|
||||
Phase 5.30
|
||||
Phase 5.30 (Checksum:159e9) REAL time: 9 secs
|
||||
|
||||
Phase 6.8
|
||||
.
|
||||
.
|
||||
.
|
||||
.
|
||||
.
|
||||
Phase 6.8 (Checksum:d4161) REAL time: 21 secs
|
||||
|
||||
Phase 7.5
|
||||
Phase 7.5 (Checksum:d4161) REAL time: 21 secs
|
||||
|
||||
Phase 8.18
|
||||
Phase 8.18 (Checksum:d708d) REAL time: 27 secs
|
||||
|
||||
Phase 9.5
|
||||
Phase 9.5 (Checksum:d708d) REAL time: 27 secs
|
||||
|
||||
REAL time consumed by placer: 27 secs
|
||||
CPU time consumed by placer: 23 secs
|
||||
Writing design to file project_r.ncd
|
||||
|
||||
|
||||
Total REAL time to Placer completion: 27 secs
|
||||
Total CPU time to Placer completion: 24 secs
|
||||
|
||||
Starting Router
|
||||
|
||||
Phase 1: 909 unrouted; REAL time: 37 secs
|
||||
|
||||
Phase 2: 799 unrouted; REAL time: 37 secs
|
||||
|
||||
Phase 3: 166 unrouted; REAL time: 38 secs
|
||||
|
||||
Phase 4: 166 unrouted; (241538) REAL time: 38 secs
|
||||
|
||||
Phase 5: 167 unrouted; (0) REAL time: 38 secs
|
||||
|
||||
Phase 6: 0 unrouted; (0) REAL time: 39 secs
|
||||
|
||||
Phase 7: 0 unrouted; (0) REAL time: 39 secs
|
||||
|
||||
Phase 8: 0 unrouted; (0) REAL time: 39 secs
|
||||
|
||||
Phase 9: 0 unrouted; (0) REAL time: 39 secs
|
||||
|
||||
Phase 10: 0 unrouted; (0) REAL time: 40 secs
|
||||
|
||||
|
||||
Total REAL time to Router completion: 40 secs
|
||||
Total CPU time to Router completion: 36 secs
|
||||
|
||||
Partition Implementation Status
|
||||
-------------------------------
|
||||
|
||||
No Partitions were found in this design.
|
||||
|
||||
-------------------------------
|
||||
|
||||
Generating "PAR" statistics.
|
||||
|
||||
**************************
|
||||
Generating Clock Report
|
||||
**************************
|
||||
|
||||
+---------------------+--------------+------+------+------------+-------------+
|
||||
| Clock Net | Resource |Locked|Fanout|Net Skew(ns)|Max Delay(ns)|
|
||||
+---------------------+--------------+------+------+------------+-------------+
|
||||
| clk_BUFGP | BUFGMUX_X2Y1| No | 109 | 0.084 | 0.201 |
|
||||
+---------------------+--------------+------+------+------------+-------------+
|
||||
|
||||
* Net Skew is the difference between the minimum and maximum routing
|
||||
only delays for the net. Note this is different from Clock Skew which
|
||||
is reported in TRCE timing report. Clock Skew is the difference between
|
||||
the minimum and maximum path delays which includes logic delays.
|
||||
|
||||
Timing Score: 0
|
||||
|
||||
INFO:Timing:2761 - N/A entries in the Constraints list may indicate that the constraint does not cover any paths or that it has no
|
||||
requested value.
|
||||
Asterisk (*) preceding a constraint indicates it was not met.
|
||||
This may be due to a setup or hold violation.
|
||||
|
||||
------------------------------------------------------------------------------------------------------
|
||||
Constraint | Check | Worst Case | Best Case | Timing | Timing
|
||||
| | Slack | Achievable | Errors | Score
|
||||
------------------------------------------------------------------------------------------------------
|
||||
Autotimespec constraint for clock net clk | SETUP | N/A| 15.993ns| N/A| 0
|
||||
_BUFGP | HOLD | 1.022ns| | 0| 0
|
||||
------------------------------------------------------------------------------------------------------
|
||||
|
||||
|
||||
All constraints were met.
|
||||
INFO:Timing:2761 - N/A entries in the Constraints list may indicate that the
|
||||
constraint does not cover any paths or that it has no requested value.
|
||||
|
||||
|
||||
Generating Pad Report.
|
||||
|
||||
All signals are completely routed.
|
||||
|
||||
Total REAL time to PAR completion: 41 secs
|
||||
Total CPU time to PAR completion: 37 secs
|
||||
|
||||
Peak Memory Usage: 126 MB
|
||||
|
||||
Placement: Completed - No errors found.
|
||||
Routing: Completed - No errors found.
|
||||
|
||||
Number of error messages: 0
|
||||
Number of warning messages: 0
|
||||
Number of info messages: 2
|
||||
|
||||
Writing design to file project_r.ncd
|
||||
|
||||
|
||||
|
||||
PAR done!
|
||||
332
UART/logic/build/project_r.ptwx
Normal file
332
UART/logic/build/project_r.ptwx
Normal file
@@ -0,0 +1,332 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!DOCTYPE twReport [
|
||||
<!ELEMENT twReport (twHead?, (twWarn | twDebug | twInfo)*, twBody, twSum?,
|
||||
twDebug*, twFoot?, twClientInfo?)>
|
||||
<!ATTLIST twReport version CDATA "10,4">
|
||||
<!ELEMENT twHead (twExecVer?, twCopyright, twCmdLine?, twDesign?, twPCF?, twDevInfo, twRptInfo, twEnvVar*)>
|
||||
<!ELEMENT twExecVer (#PCDATA)>
|
||||
<!ELEMENT twCopyright (#PCDATA)>
|
||||
<!ELEMENT twCmdLine (#PCDATA)>
|
||||
<!ELEMENT twDesign (#PCDATA)>
|
||||
<!ELEMENT twPCF (#PCDATA)>
|
||||
<!ELEMENT twDevInfo (twDevName, twSpeedGrade, twSpeedVer?)>
|
||||
<!ELEMENT twDevName (#PCDATA)>
|
||||
<!ATTLIST twDevInfo arch CDATA #IMPLIED pkg CDATA #IMPLIED>
|
||||
<!ELEMENT twSpeedGrade (#PCDATA)>
|
||||
<!ELEMENT twSpeedVer (#PCDATA)>
|
||||
<!ELEMENT twRptInfo (twItemLimit?, (twUnconst, twUnconstLimit?)?)>
|
||||
<!ATTLIST twRptInfo twRptLvl (twErr | twVerbose | twTerseErr | twSum | twTimeGrp) #REQUIRED>
|
||||
<!ATTLIST twRptInfo twAdvRpt (TRUE | FALSE) "FALSE">
|
||||
<!ATTLIST twRptInfo twTimeUnits (twPsec | twNsec | twUsec | twMsec | twSec) "twNsec">
|
||||
<!ATTLIST twRptInfo twFreqUnits (twGHz | twMHz | twHz) "twMHz">
|
||||
<!ATTLIST twRptInfo twReportMinPaths CDATA #IMPLIED>
|
||||
<!ELEMENT twItemLimit (#PCDATA)>
|
||||
<!ELEMENT twUnconst EMPTY>
|
||||
<!ELEMENT twUnconstLimit (#PCDATA)>
|
||||
<!ELEMENT twEnvVar EMPTY>
|
||||
<!ATTLIST twEnvVar name CDATA #REQUIRED>
|
||||
<!ATTLIST twEnvVar description CDATA #REQUIRED>
|
||||
<!ELEMENT twWarn (#PCDATA)>
|
||||
<!ELEMENT twInfo (#PCDATA)>
|
||||
<!ELEMENT twDebug (#PCDATA)>
|
||||
<!ELEMENT twBody (twDerating?, (twSumRpt | twVerboseRpt | twErrRpt | twTerseErrRpt | twTimeGrpRpt), twNonDedClks?)>
|
||||
<!ATTLIST twBody twFastPaths CDATA #IMPLIED>
|
||||
<!ELEMENT twDerating (twProc?, twTemp?, twVolt?)>
|
||||
<!ELEMENT twProc (#PCDATA)>
|
||||
<!ELEMENT twTemp (#PCDATA)>
|
||||
<!ELEMENT twVolt (#PCDATA)>
|
||||
<!ELEMENT twSumRpt (twConstRollupTable*, twConstList?, twConstSummaryTable?, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?)>
|
||||
<!ELEMENT twErrRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
|
||||
<!ELEMENT twTerseErrRpt (twConstList, twUnmetConstCnt?, twDataSheet?)>
|
||||
<!ELEMENT twVerboseRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
|
||||
<!ELEMENT twCycles (twSigConn+)>
|
||||
<!ATTLIST twCycles twNum CDATA #REQUIRED>
|
||||
<!ELEMENT twSigConn (twSig, twDriver, twLoad)>
|
||||
<!ELEMENT twSig (#PCDATA)>
|
||||
<!ELEMENT twDriver (#PCDATA)>
|
||||
<!ELEMENT twLoad (#PCDATA)>
|
||||
<!ELEMENT twConst (twConstHead, ((twPathRpt?,twRacePathRpt?, twPathRptBanner?)* | (twPathRpt*, twRacePathRpt?) | twNetRpt* | twClkSkewLimit*))>
|
||||
<!ATTLIST twConst twConstType (NET |
|
||||
NETDELAY |
|
||||
NETSKEW |
|
||||
PATH |
|
||||
DEFPERIOD |
|
||||
UNCONSTPATH |
|
||||
DEFPATH |
|
||||
PATH2SETUP |
|
||||
UNCONSTPATH2SETUP |
|
||||
PATHCLASS |
|
||||
PATHDELAY |
|
||||
PERIOD |
|
||||
FREQUENCY |
|
||||
PATHBLOCK |
|
||||
OFFSET |
|
||||
OFFSETIN |
|
||||
OFFSETINCLOCK |
|
||||
UNCONSTOFFSETINCLOCK |
|
||||
OFFSETINDELAY |
|
||||
OFFSETINMOD |
|
||||
OFFSETOUT |
|
||||
OFFSETOUTCLOCK |
|
||||
UNCONSTOFFSETOUTCLOCK |
|
||||
OFFSETOUTDELAY |
|
||||
OFFSETOUTMOD| CLOCK_SKEW_LIMITS) #IMPLIED>
|
||||
<!ELEMENT twConstHead (twConstName, twItemCnt, twErrCntSetup, twErrCntEndPt?, twErrCntHold,
|
||||
twEndPtCnt?,
|
||||
twPathErrCnt?, (twMinPer| twMaxDel| twMaxFreq| twMaxNetDel| twMaxNetSkew| twMinOff| twMaxOff)*)>
|
||||
<!ELEMENT twConstName (#PCDATA)>
|
||||
<!ATTLIST twConstName UCFConstName CDATA #IMPLIED>
|
||||
<!ATTLIST twConstHead uID CDATA #IMPLIED>
|
||||
<!ELEMENT twItemCnt (#PCDATA)>
|
||||
<!ELEMENT twErrCnt (#PCDATA)>
|
||||
<!ELEMENT twErrCntEndPt (#PCDATA)>
|
||||
<!ELEMENT twErrCntSetup (#PCDATA)>
|
||||
<!ELEMENT twErrCntHold (#PCDATA)>
|
||||
<!ATTLIST twErrCntHold twRaceChecked (TRUE | FALSE) "FALSE">
|
||||
<!ELEMENT twEndPtCnt (#PCDATA)>
|
||||
<!ELEMENT twPathErrCnt (#PCDATA)>
|
||||
<!ELEMENT twMinPer (#PCDATA) >
|
||||
<!ELEMENT twFootnote EMPTY>
|
||||
<!ATTLIST twFootnote number CDATA #REQUIRED>
|
||||
<!ELEMENT twMaxDel (#PCDATA)>
|
||||
<!ELEMENT twMaxFreq (#PCDATA)>
|
||||
<!ELEMENT twMinOff (#PCDATA)>
|
||||
<!ELEMENT twMaxOff (#PCDATA)>
|
||||
<!ELEMENT twTIG (twTIGHead, (twPathRpt*,twRacePathRpt?))>
|
||||
<!ELEMENT twTIGHead (twTIGName, twInstantiated, twBlocked)>
|
||||
<!ELEMENT twTIGName (#PCDATA)>
|
||||
<!ELEMENT twInstantiated (#PCDATA)>
|
||||
<!ELEMENT twBlocked (#PCDATA)>
|
||||
<!ELEMENT twRacePathRpt (twRacePath+)>
|
||||
<!ELEMENT twPathRpt (twUnconstPath | twConstPath | twUnconstOffIn | twConstOffIn | twUnconstOffOut | twConstOffOut | twModOffOut)>
|
||||
<!ELEMENT twUnconstPath (twTotDel, twSrc, twDest, (twDel, twSUTime)?, twTotPathDel?, twClkSkew?, tw2Phase?, twClkUncert?, twDetPath?)>
|
||||
<!ATTLIST twUnconstPath twDataPathType CDATA #IMPLIED
|
||||
twSimpleMinPath CDATA #IMPLIED>
|
||||
<!ELEMENT twTotDel (#PCDATA)>
|
||||
<!ELEMENT twSrc (#PCDATA)>
|
||||
<!ATTLIST twSrc BELType CDATA #IMPLIED>
|
||||
<!ELEMENT twDest (#PCDATA)>
|
||||
<!ATTLIST twDest BELType CDATA #IMPLIED>
|
||||
<!ELEMENT twDel (#PCDATA)>
|
||||
<!ELEMENT twSUTime (#PCDATA)>
|
||||
<!ELEMENT twTotPathDel (#PCDATA)>
|
||||
<!ELEMENT twClkSkew (#PCDATA)>
|
||||
<!ATTLIST twClkSkew dest CDATA #IMPLIED src CDATA #IMPLIED>
|
||||
<!ELEMENT twConstPath (twSlack, twSrc, twDest, twTotPathDel?, twClkSkew?, twDelConst, tw2Phase?, twClkUncert?, twDetPath?)>
|
||||
<!ATTLIST twConstPath twDataPathType CDATA "twDataPathMaxDelay">
|
||||
<!ATTLIST twConstPath constType (period | fromto | unknown) "unknown">
|
||||
<!ELEMENT twSlack (#PCDATA)>
|
||||
<!ELEMENT twDelConst (#PCDATA)>
|
||||
<!ELEMENT tw2Phase EMPTY>
|
||||
<!ELEMENT twClkUncert (#PCDATA)>
|
||||
<!ATTLIST twClkUncert fSysJit CDATA #IMPLIED fInputJit CDATA #IMPLIED
|
||||
fDCMJit CDATA #IMPLIED
|
||||
fPhaseErr CDATA #IMPLIED
|
||||
sEqu CDATA #IMPLIED>
|
||||
<!ELEMENT twRacePath (twSlack, twSrc, twDest, twClkSkew, twDelConst?, twClkUncert?, twDetPath)>
|
||||
<!ELEMENT twPathRptBanner (#PCDATA)>
|
||||
<!ATTLIST twPathRptBanner sType CDATA #IMPLIED iPaths CDATA #IMPLIED iCriticalPaths CDATA #IMPLIED>
|
||||
<!ELEMENT twUnconstOffIn (twOff, twSrc, twDest, twGuaranteed?, twClkUncert?, (twDataPath, twClkPath)?)>
|
||||
<!ATTLIST twUnconstOffIn twDataPathType CDATA #IMPLIED>
|
||||
<!ELEMENT twOff (#PCDATA)>
|
||||
<!ELEMENT twGuaranteed EMPTY>
|
||||
<!ELEMENT twConstOffIn (twSlack, twSrc, twDest, ((twClkDel, twClkSrc, twClkDest) | twGuarInSetup), twOff, twOffSrc, twOffDest, twClkUncert?, (twDataPath, twClkPath)?)>
|
||||
<!ATTLIST twConstOffIn twDataPathType CDATA "twDataPathMaxDelay">
|
||||
<!ATTLIST twConstOffIn twDurationNotSpecified CDATA #IMPLIED>
|
||||
<!ELEMENT twClkDel (#PCDATA)>
|
||||
<!ELEMENT twClkSrc (#PCDATA)>
|
||||
<!ELEMENT twClkDest (#PCDATA)>
|
||||
<!ELEMENT twGuarInSetup (#PCDATA)>
|
||||
<!ELEMENT twOffSrc (#PCDATA)>
|
||||
<!ELEMENT twOffDest (#PCDATA)>
|
||||
<!ELEMENT twUnconstOffOut (twOff, twSrc, twDest, twClkUncert?, (twClkPath, twDataPath)?)>
|
||||
<!ATTLIST twUnconstOffOut twDataPathType CDATA #IMPLIED>
|
||||
<!ELEMENT twConstOffOut (twSlack, twSrc, twDest, twClkDel, twClkSrc, twClkDest, twDataDel, twDataSrc, twDataDest, twOff, twOffSrc, twOffDest, twClkUncert?, (twClkPath, twDataPath)?)>
|
||||
<!ATTLIST twConstOffOut twDataPathType CDATA "twDataPathMaxDelay">
|
||||
<!ELEMENT twDataDel (#PCDATA)>
|
||||
<!ELEMENT twDataSrc (#PCDATA)>
|
||||
<!ELEMENT twDataDest (#PCDATA)>
|
||||
<!ELEMENT twModOffOut (twSlack, twDest, twDataDel, twDataSrc, twDataDest, twClkUncert?, twDataPath?)>
|
||||
<!ELEMENT twDetPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
|
||||
<!ATTLIST twDetPath maxSiteLen CDATA #IMPLIED>
|
||||
<!ELEMENT twDataPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
|
||||
<!ATTLIST twDataPath maxSiteLen CDATA #IMPLIED>
|
||||
<!ELEMENT twClkPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
|
||||
<!ATTLIST twClkPath maxSiteLen CDATA #IMPLIED>
|
||||
<!ELEMENT twLogLvls (#PCDATA)>
|
||||
<!ELEMENT twSrcSite (#PCDATA)>
|
||||
<!ELEMENT twSrcClk (#PCDATA)>
|
||||
<!ATTLIST twSrcClk twEdge (twRising | twFalling) "twRising">
|
||||
<!ATTLIST twSrcClk twArriveTime CDATA #IMPLIED>
|
||||
<!ATTLIST twSrcClk twClkRes CDATA #IMPLIED>
|
||||
<!ELEMENT twPathDel (twSite, twDelType, twFanCnt?, twDelInfo?, twComp, twNet?, twBEL*)>
|
||||
<!ATTLIST twPathDel twHoldTime (TRUE | FALSE) "FALSE">
|
||||
<!ELEMENT twDelInfo (#PCDATA)>
|
||||
<!ATTLIST twDelInfo twEdge (twRising | twFalling | twIndet) #REQUIRED>
|
||||
<!ATTLIST twDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
|
||||
<!ELEMENT twSite (#PCDATA)>
|
||||
<!ELEMENT twDelType (#PCDATA)>
|
||||
<!ELEMENT twFanCnt (#PCDATA)>
|
||||
<!ELEMENT twComp (#PCDATA)>
|
||||
<!ELEMENT twNet (#PCDATA)>
|
||||
<!ELEMENT twBEL (#PCDATA)>
|
||||
<!ELEMENT twLogDel (#PCDATA)>
|
||||
<!ELEMENT twRouteDel (#PCDATA)>
|
||||
<!ELEMENT twDestClk (#PCDATA)>
|
||||
<!ATTLIST twDestClk twEdge (twRising | twFalling) "twRising">
|
||||
<!ATTLIST twDestClk twArriveTime CDATA #IMPLIED>
|
||||
<!ATTLIST twDestClk twClkRes CDATA #IMPLIED>
|
||||
<!ELEMENT twPctLog (#PCDATA)>
|
||||
<!ELEMENT twPctRoute (#PCDATA)>
|
||||
<!ELEMENT twNetRpt (twDelNet | twSlackNet | twSkewNet)>
|
||||
<!ELEMENT twDelNet (twDel, twNet, twDetNet?)>
|
||||
<!ELEMENT twSlackNet (twSlack, twNet, twDel, twNotMet?, twTimeConst, twAbsSlack, twDetNet?)>
|
||||
<!ELEMENT twTimeConst (#PCDATA)>
|
||||
<!ELEMENT twAbsSlack (#PCDATA)>
|
||||
<!ELEMENT twSkewNet (twSlack, twNet, twSkew, twNotMet?, twTimeConst, twAbsSlack, twDetSkewNet?)>
|
||||
<!ELEMENT twSkew (#PCDATA)>
|
||||
<!ELEMENT twDetNet (twNetDel*)>
|
||||
<!ELEMENT twNetDel (twSrc, twDest, twNetDelInfo)>
|
||||
<!ELEMENT twNetDelInfo (#PCDATA)>
|
||||
<!ATTLIST twNetDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
|
||||
<!ELEMENT twDetSkewNet (twNetSkew*)>
|
||||
<!ELEMENT twNetSkew (twSrc, twDest, twNetDelInfo, twSkew)>
|
||||
<!ELEMENT twClkSkewLimit EMPTY>
|
||||
<!ATTLIST twClkSkewLimit slack CDATA #IMPLIED skew CDATA #IMPLIED arrv1name CDATA #IMPLIED arrv1 CDATA #IMPLIED
|
||||
arrv2name CDATA #IMPLIED arrv2 CDATA #IMPLIED uncert CDATA #IMPLIED>
|
||||
<!ELEMENT twConstRollupTable (twConstRollup*)>
|
||||
<!ATTLIST twConstRollupTable uID CDATA #IMPLIED>
|
||||
<!ELEMENT twConstRollup EMPTY>
|
||||
<!ATTLIST twConstRollup name CDATA #IMPLIED fullName CDATA #IMPLIED type CDATA #IMPLIED requirement CDATA #IMPLIED prefType CDATA #IMPLIED actual CDATA #IMPLIED>
|
||||
<!ATTLIST twConstRollup actualRollup CDATA #IMPLIED errors CDATA #IMPLIED errorRollup CDATA #IMPLIED items CDATA #IMPLIED itemsRollup CDATA #IMPLIED>
|
||||
<!ELEMENT twConstList (twConstListItem)*>
|
||||
<!ELEMENT twConstListItem (twConstName, twNotMet?, twReqVal?, twActVal?, twLogLvls?)>
|
||||
<!ATTLIST twConstListItem twUnits (twTime | twFreq) "twTime">
|
||||
<!ELEMENT twNotMet EMPTY>
|
||||
<!ELEMENT twReqVal (#PCDATA)>
|
||||
<!ELEMENT twActVal (#PCDATA)>
|
||||
<!ELEMENT twConstSummaryTable (twConstStats|twConstSummary)*>
|
||||
<!ATTLIST twConstSummaryTable twEmptyConstraints CDATA #IMPLIED>
|
||||
<!ELEMENT twConstStats (twConstName)>
|
||||
<!ATTLIST twConstStats twUnits (twTime | twFreq) "twTime">
|
||||
<!ATTLIST twConstStats twRequired CDATA #IMPLIED>
|
||||
<!ATTLIST twConstStats twActual CDATA #IMPLIED>
|
||||
<!ATTLIST twConstStats twSlack CDATA #IMPLIED>
|
||||
<!ATTLIST twConstStats twLogLvls CDATA #IMPLIED>
|
||||
<!ATTLIST twConstStats twErrors CDATA #IMPLIED>
|
||||
<!ATTLIST twConstStats twPCFIndex CDATA #IMPLIED>
|
||||
<!ATTLIST twConstStats twAbsSlackIndex CDATA #IMPLIED>
|
||||
<!ATTLIST twConstStats twTCType CDATA #IMPLIED>
|
||||
<!ELEMENT twConstSummary (twConstName, twConstData?, twConstData*)>
|
||||
<!ATTLIST twConstSummary PCFIndex CDATA #IMPLIED slackIndex CDATA #IMPLIED>
|
||||
<!ELEMENT twConstData EMPTY>
|
||||
<!ATTLIST twConstData type CDATA #IMPLIED units (MHz | ns) "ns" slack CDATA #IMPLIED
|
||||
best CDATA #IMPLIED requested CDATA #IMPLIED
|
||||
errors CDATA #IMPLIED
|
||||
score CDATA #IMPLIED>
|
||||
<!ELEMENT twTimeGrpRpt (twTimeGrp)*>
|
||||
<!ELEMENT twTimeGrp (twTimeGrpName, twCompList?, twBELList?, twMacList?, twBlockList?, twSigList?, twPinList?)>
|
||||
<!ELEMENT twTimeGrpName (#PCDATA)>
|
||||
<!ELEMENT twCompList (twCompName+)>
|
||||
<!ELEMENT twCompName (#PCDATA)>
|
||||
<!ELEMENT twSigList (twSigName+)>
|
||||
<!ELEMENT twSigName (#PCDATA)>
|
||||
<!ELEMENT twBELList (twBELName+)>
|
||||
<!ELEMENT twBELName (#PCDATA)>
|
||||
<!ELEMENT twBlockList (twBlockName+)>
|
||||
<!ELEMENT twBlockName (#PCDATA)>
|
||||
<!ELEMENT twMacList (twMacName+)>
|
||||
<!ELEMENT twMacName (#PCDATA)>
|
||||
<!ELEMENT twPinList (twPinName+)>
|
||||
<!ELEMENT twPinName (#PCDATA)>
|
||||
<!ELEMENT twUnmetConstCnt (#PCDATA)>
|
||||
<!ELEMENT twDataSheet (twSUH2ClkList*, (twClk2PadList|twClk2OutList)*, twClk2SUList*, twPad2PadList?, twOffsetTables?)>
|
||||
<!ATTLIST twDataSheet twNameLen CDATA #REQUIRED>
|
||||
<!ELEMENT twSUH2ClkList (twDest, twSUH2Clk+)>
|
||||
<!ATTLIST twSUH2ClkList twDestWidth CDATA #IMPLIED>
|
||||
<!ATTLIST twSUH2ClkList twPhaseWidth CDATA #IMPLIED>
|
||||
<!ELEMENT twSUH2Clk (twSrc, twSUHTime, twSUHTime?)>
|
||||
<!ELEMENT twSUHTime (twSU2ClkTime?,twH2ClkTime?)>
|
||||
<!ATTLIST twSUHTime twInternalClk CDATA #IMPLIED>
|
||||
<!ATTLIST twSUHTime twClkPhase CDATA #IMPLIED>
|
||||
<!ELEMENT twSU2ClkTime (#PCDATA)>
|
||||
<!ATTLIST twSU2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
|
||||
<!ELEMENT twH2ClkTime (#PCDATA)>
|
||||
<!ATTLIST twH2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
|
||||
<!ELEMENT twClk2PadList (twSrc, twClk2Pad+)>
|
||||
<!ELEMENT twClk2Pad (twDest, twTime)>
|
||||
<!ELEMENT twTime (#PCDATA)>
|
||||
<!ATTLIST twTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
|
||||
<!ELEMENT twClk2OutList (twSrc, twClk2Out+)>
|
||||
<!ATTLIST twClk2OutList twDestWidth CDATA #REQUIRED>
|
||||
<!ATTLIST twClk2OutList twPhaseWidth CDATA #REQUIRED>
|
||||
<!ELEMENT twClk2Out EMPTY>
|
||||
<!ATTLIST twClk2Out twOutPad CDATA #REQUIRED>
|
||||
<!ATTLIST twClk2Out twMinTime CDATA #REQUIRED>
|
||||
<!ATTLIST twClk2Out twMinEdge CDATA #REQUIRED>
|
||||
<!ATTLIST twClk2Out twMaxTime CDATA #REQUIRED>
|
||||
<!ATTLIST twClk2Out twMaxEdge CDATA #REQUIRED>
|
||||
<!ATTLIST twClk2Out twInternalClk CDATA #REQUIRED>
|
||||
<!ATTLIST twClk2Out twClkPhase CDATA #REQUIRED>
|
||||
<!ELEMENT twClk2SUList (twDest, twClk2SU+)>
|
||||
<!ATTLIST twClk2SUList twDestWidth CDATA #IMPLIED>
|
||||
<!ELEMENT twClk2SU (twSrc, twRiseRise?, twFallRise?, twRiseFall?, twFallFall?)>
|
||||
<!ELEMENT twRiseRise (#PCDATA)>
|
||||
<!ELEMENT twFallRise (#PCDATA)>
|
||||
<!ELEMENT twRiseFall (#PCDATA)>
|
||||
<!ELEMENT twFallFall (#PCDATA)>
|
||||
<!ELEMENT twPad2PadList (twPad2Pad+)>
|
||||
<!ATTLIST twPad2PadList twSrcWidth CDATA #IMPLIED>
|
||||
<!ATTLIST twPad2PadList twDestWidth CDATA #IMPLIED>
|
||||
<!ELEMENT twPad2Pad (twSrc, twDest, twDel)>
|
||||
<!ELEMENT twOffsetTables (twOffsetInTable*,twOffsetOutTable*)>
|
||||
<!ELEMENT twOffsetInTable (twConstName, twOffInTblRow*)>
|
||||
<!ATTLIST twOffsetInTable twDestWidth CDATA #IMPLIED>
|
||||
<!ATTLIST twOffsetInTable twWorstWindow CDATA #IMPLIED>
|
||||
<!ATTLIST twOffsetInTable twWorstSetup CDATA #IMPLIED>
|
||||
<!ATTLIST twOffsetInTable twWorstHold CDATA #IMPLIED>
|
||||
<!ATTLIST twOffsetInTable twWorstSetupSlack CDATA #IMPLIED>
|
||||
<!ATTLIST twOffsetInTable twWorstHoldSlack CDATA #IMPLIED>
|
||||
<!ELEMENT twOffsetOutTable (twConstName, twOffOutTblRow*)>
|
||||
<!ATTLIST twOffsetOutTable twDestWidth CDATA #IMPLIED>
|
||||
<!ATTLIST twOffsetOutTable twMinSlack CDATA #IMPLIED>
|
||||
<!ATTLIST twOffsetOutTable twMaxSlack CDATA #IMPLIED>
|
||||
<!ATTLIST twOffsetOutTable twRelSkew CDATA #IMPLIED>
|
||||
<!ELEMENT twOffInTblRow (twSrc, twSUHSlackTime*)>
|
||||
<!ELEMENT twSUHSlackTime (twSU2ClkTime?,twH2ClkTime?)>
|
||||
<!ATTLIST twSUHSlackTime twSetupSlack CDATA #IMPLIED twHoldSlack CDATA #IMPLIED>
|
||||
<!ELEMENT twOffOutTblRow EMPTY>
|
||||
<!ATTLIST twOffOutTblRow twOutPad CDATA #IMPLIED>
|
||||
<!ATTLIST twOffOutTblRow twSlack CDATA #IMPLIED>
|
||||
<!ATTLIST twOffOutTblRow twRelSkew CDATA #IMPLIED>
|
||||
<!ELEMENT twNonDedClks ((twWarn | twInfo), twNonDedClk+)>
|
||||
<!ELEMENT twNonDedClk (#PCDATA)>
|
||||
<!ELEMENT twSum ( twErrCnt, twScore, twConstCov, twStats)>
|
||||
<!ELEMENT twScore (#PCDATA)>
|
||||
<!ELEMENT twConstCov (twPathCnt, twNetCnt, twConnCnt, twPct?)>
|
||||
<!ELEMENT twPathCnt (#PCDATA)>
|
||||
<!ELEMENT twNetCnt (#PCDATA)>
|
||||
<!ELEMENT twConnCnt (#PCDATA)>
|
||||
<!ELEMENT twPct (#PCDATA)>
|
||||
<!ELEMENT twStats ( twMinPer?, twFootnote?, twMaxFreq?, twMaxCombDel?, twMaxFromToDel?, twMaxNetDel?, twMaxNetSkew?, twMaxInAfterClk?, twMinInBeforeClk?, twMaxOutBeforeClk?, twMinOutAfterClk?, (twInfo | twWarn)*)>
|
||||
<!ELEMENT twMaxCombDel (#PCDATA)>
|
||||
<!ELEMENT twMaxFromToDel (#PCDATA)>
|
||||
<!ELEMENT twMaxNetDel (#PCDATA)>
|
||||
<!ELEMENT twMaxNetSkew (#PCDATA)>
|
||||
<!ELEMENT twMaxInAfterClk (#PCDATA)>
|
||||
<!ELEMENT twMinInBeforeClk (#PCDATA)>
|
||||
<!ELEMENT twMaxOutBeforeClk (#PCDATA)>
|
||||
<!ELEMENT twMinOutAfterClk (#PCDATA)>
|
||||
<!ELEMENT twFoot (twFootnoteExplanation*, twTimestamp)>
|
||||
<!ELEMENT twTimestamp (#PCDATA)>
|
||||
<!ELEMENT twFootnoteExplanation EMPTY>
|
||||
<!ATTLIST twFootnoteExplanation number CDATA #REQUIRED>
|
||||
<!ATTLIST twFootnoteExplanation text CDATA #REQUIRED>
|
||||
<!ELEMENT twClientInfo (twClientName, twAttrList?)>
|
||||
<!ELEMENT twClientName (#PCDATA)>
|
||||
<!ELEMENT twAttrList (twAttrListItem)*>
|
||||
<!ELEMENT twAttrListItem (twName, twValue*)>
|
||||
<!ELEMENT twName (#PCDATA)>
|
||||
<!ELEMENT twValue (#PCDATA)>
|
||||
]>
|
||||
<twReport><twBody><twSumRpt><twConstSummaryTable><twConstSummary><twConstName UCFConstName="">Autotimespec constraint for clock net clk_BUFGP</twConstName><twConstData type="SETUP" best="15.993" units="ns" score="0"/><twConstData type="HOLD" slack="1.022" units="ns" errors="0" score="0"/></twConstSummary></twConstSummaryTable><twUnmetConstCnt>0</twUnmetConstCnt><twInfo>INFO:Timing:2761 - N/A entries in the Constraints list may indicate that the constraint does not cover any paths or that it has no requested value.</twInfo></twSumRpt></twBody></twReport>
|
||||
121
UART/logic/build/project_r.twr
Normal file
121
UART/logic/build/project_r.twr
Normal file
@@ -0,0 +1,121 @@
|
||||
--------------------------------------------------------------------------------
|
||||
Release 10.1.03 Trace (lin)
|
||||
Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
|
||||
|
||||
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/trce -v 25 project_r.ncd project.pcf
|
||||
|
||||
Design file: project_r.ncd
|
||||
Physical constraint file: project.pcf
|
||||
Device,package,speed: xc3s500e,vq100,-4 (PRODUCTION 1.27 2008-01-09)
|
||||
Report level: verbose report, limited to 25 items per constraint
|
||||
|
||||
Environment Variable Effect
|
||||
-------------------- ------
|
||||
NONE No environment variables were set
|
||||
--------------------------------------------------------------------------------
|
||||
|
||||
INFO:Timing:2698 - No timing constraints found, doing default enumeration.
|
||||
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
|
||||
option. All paths that are not constrained will be reported in the
|
||||
unconstrained paths section(s) of the report.
|
||||
INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on
|
||||
a 50 Ohm transmission line loading model. For the details of this model,
|
||||
and for more information on accounting for different loading conditions,
|
||||
please see the device datasheet.
|
||||
|
||||
|
||||
|
||||
Data Sheet report:
|
||||
-----------------
|
||||
All values displayed in nanoseconds (ns)
|
||||
|
||||
Setup/Hold to clock clk
|
||||
------------+------------+------------+------------------+--------+
|
||||
| Setup to | Hold to | | Clock |
|
||||
Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |
|
||||
------------+------------+------------+------------------+--------+
|
||||
RxD | 4.665(R)| -0.791(R)|clk_BUFGP | 0.000|
|
||||
addr<0> | 4.669(F)| -0.795(F)|clk_BUFGP | 0.000|
|
||||
addr<1> | 4.669(F)| -0.795(F)|clk_BUFGP | 0.000|
|
||||
addr<2> | 4.652(F)| -0.775(F)|clk_BUFGP | 0.000|
|
||||
ncs | 4.667(F)| -0.792(F)|clk_BUFGP | 0.000|
|
||||
nwe | 4.666(F)| -0.791(F)|clk_BUFGP | 0.000|
|
||||
reset | 4.649(R)| -0.365(R)|clk_BUFGP | 0.000|
|
||||
sram_data<0>| 4.664(F)| -0.789(F)|clk_BUFGP | 0.000|
|
||||
sram_data<1>| 4.664(F)| -0.789(F)|clk_BUFGP | 0.000|
|
||||
sram_data<2>| 4.664(F)| -0.789(F)|clk_BUFGP | 0.000|
|
||||
sram_data<3>| 4.664(F)| -0.789(F)|clk_BUFGP | 0.000|
|
||||
sram_data<4>| 4.667(F)| -0.792(F)|clk_BUFGP | 0.000|
|
||||
sram_data<5>| 4.667(F)| -0.792(F)|clk_BUFGP | 0.000|
|
||||
sram_data<6>| 4.651(F)| -0.774(F)|clk_BUFGP | 0.000|
|
||||
sram_data<7>| 4.651(F)| -0.774(F)|clk_BUFGP | 0.000|
|
||||
------------+------------+------------+------------------+--------+
|
||||
|
||||
Clock clk to Pad
|
||||
------------+------------+------------------+--------+
|
||||
| clk (edge) | | Clock |
|
||||
Destination | to PAD |Internal Clock(s) | Phase |
|
||||
------------+------------+------------------+--------+
|
||||
TxD | 6.163(R)|clk_BUFGP | 0.000|
|
||||
irq_pin | 10.697(R)|clk_BUFGP | 0.000|
|
||||
led | 6.155(R)|clk_BUFGP | 0.000|
|
||||
sram_data<0>| 14.532(R)|clk_BUFGP | 0.000|
|
||||
| 16.364(F)|clk_BUFGP | 0.000|
|
||||
sram_data<1>| 15.462(R)|clk_BUFGP | 0.000|
|
||||
| 17.685(F)|clk_BUFGP | 0.000|
|
||||
sram_data<2>| 15.054(R)|clk_BUFGP | 0.000|
|
||||
| 16.594(F)|clk_BUFGP | 0.000|
|
||||
sram_data<3>| 14.794(R)|clk_BUFGP | 0.000|
|
||||
| 16.334(F)|clk_BUFGP | 0.000|
|
||||
sram_data<4>| 14.119(R)|clk_BUFGP | 0.000|
|
||||
| 15.659(F)|clk_BUFGP | 0.000|
|
||||
sram_data<5>| 15.051(R)|clk_BUFGP | 0.000|
|
||||
| 16.591(F)|clk_BUFGP | 0.000|
|
||||
sram_data<6>| 15.120(R)|clk_BUFGP | 0.000|
|
||||
| 16.660(F)|clk_BUFGP | 0.000|
|
||||
sram_data<7>| 14.331(R)|clk_BUFGP | 0.000|
|
||||
| 17.406(F)|clk_BUFGP | 0.000|
|
||||
------------+------------+------------------+--------+
|
||||
|
||||
Clock to Setup on destination clock clk
|
||||
---------------+---------+---------+---------+---------+
|
||||
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
|
||||
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
||||
---------------+---------+---------+---------+---------+
|
||||
clk | 9.370| 7.997| | |
|
||||
---------------+---------+---------+---------+---------+
|
||||
|
||||
Pad to Pad
|
||||
---------------+---------------+---------+
|
||||
Source Pad |Destination Pad| Delay |
|
||||
---------------+---------------+---------+
|
||||
ncs |sram_data<0> | 8.998|
|
||||
ncs |sram_data<1> | 9.262|
|
||||
ncs |sram_data<2> | 8.918|
|
||||
ncs |sram_data<3> | 9.517|
|
||||
ncs |sram_data<4> | 9.167|
|
||||
ncs |sram_data<5> | 8.636|
|
||||
ncs |sram_data<6> | 9.866|
|
||||
ncs |sram_data<7> | 9.858|
|
||||
noe |sram_data<0> | 8.802|
|
||||
noe |sram_data<1> | 9.066|
|
||||
noe |sram_data<2> | 8.722|
|
||||
noe |sram_data<3> | 9.321|
|
||||
noe |sram_data<4> | 8.971|
|
||||
noe |sram_data<5> | 8.440|
|
||||
noe |sram_data<6> | 9.670|
|
||||
noe |sram_data<7> | 9.662|
|
||||
---------------+---------------+---------+
|
||||
|
||||
|
||||
Analysis completed Thu Nov 11 14:39:04 2010
|
||||
--------------------------------------------------------------------------------
|
||||
|
||||
Trace Settings:
|
||||
-------------------------
|
||||
Trace Settings
|
||||
|
||||
Peak Memory Usage: 93 MB
|
||||
|
||||
|
||||
|
||||
337
UART/logic/build/project_r.twx
Normal file
337
UART/logic/build/project_r.twx
Normal file
File diff suppressed because one or more lines are too long
9
UART/logic/build/project_r.unroutes
Normal file
9
UART/logic/build/project_r.unroutes
Normal file
@@ -0,0 +1,9 @@
|
||||
Release 10.1.03 - par K.39 (lin)
|
||||
Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
|
||||
|
||||
Thu Nov 11 14:38:56 2010
|
||||
|
||||
All signals are completely routed.
|
||||
|
||||
|
||||
|
||||
3
UART/logic/build/project_r.xpi
Normal file
3
UART/logic/build/project_r.xpi
Normal file
@@ -0,0 +1,3 @@
|
||||
PROGRAM=PAR
|
||||
STATE=ROUTED
|
||||
TIMESPECS_MET=OFF
|
||||
131
UART/logic/build/project_r_pad.csv
Normal file
131
UART/logic/build/project_r_pad.csv
Normal file
@@ -0,0 +1,131 @@
|
||||
#Release 10.1.03 - par K.39 (lin)
|
||||
#Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
|
||||
|
||||
#Thu Nov 11 14:38:56 2010
|
||||
|
||||
#
|
||||
## NOTE: This file is designed to be imported into a spreadsheet program
|
||||
# such as Microsoft Excel for viewing, printing and sorting. The |
|
||||
# character is used as the data field separator. This file is also designed
|
||||
# to support parsing.
|
||||
#
|
||||
#INPUT FILE: project.ncd
|
||||
#OUTPUT FILE: project_r_pad.csv
|
||||
#PART TYPE: xc3s500e
|
||||
#SPEED GRADE: -4
|
||||
#PACKAGE: vq100
|
||||
#
|
||||
# Pinout by Pin Number:
|
||||
#
|
||||
# -----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,
|
||||
Pin Number,Signal Name,Pin Usage,Pin Name,Direction,IO Standard,IO Bank Number,Drive (mA),Slew Rate,Termination,IOB Delay,Voltage,Constraint,DCI Value,IO Register,Signal Integrity,
|
||||
P1,,,PROG_B,,,,,,,,,,,,,
|
||||
P2,,DIFFM,IO_L01P_3,UNUSED,,3,,,,,,,,,,
|
||||
P3,,DIFFS,IO_L01N_3,UNUSED,,3,,,,,,,,,,
|
||||
P4,sram_data<7>,IOB,IO_L02P_3,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,,YES,NONE,
|
||||
P5,sram_data<6>,IOB,IO_L02N_3/VREF_3,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,,YES,NONE,
|
||||
P6,,,VCCINT,,,,,,,,1.2,,,,,
|
||||
P7,,,GND,,,,,,,,,,,,,
|
||||
P8,,,VCCO_3,,,3,,,,,2.50,,,,,
|
||||
P9,sram_data<5>,IOB,IO_L03P_3/LHCLK0,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,,YES,NONE,
|
||||
P10,sram_data<4>,IOB,IO_L03N_3/LHCLK1,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,,YES,NONE,
|
||||
P11,sram_data<3>,IOB,IO_L04P_3/LHCLK2,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,,YES,NONE,
|
||||
P12,sram_data<2>,IOB,IO_L04N_3/LHCLK3/IRDY2,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,,YES,NONE,
|
||||
P13,,IBUF,IP,UNUSED,,3,,,,,,,,,,
|
||||
P14,,,GND,,,,,,,,,,,,,
|
||||
P15,sram_data<1>,IOB,IO_L05P_3/LHCLK4/TRDY2,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,,YES,NONE,
|
||||
P16,sram_data<0>,IOB,IO_L05N_3/LHCLK5,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,,YES,NONE,
|
||||
P17,,DIFFM,IO_L06P_3/LHCLK6,UNUSED,,3,,,,,,,,,,
|
||||
P18,,DIFFS,IO_L06N_3/LHCLK7,UNUSED,,3,,,,,,,,,,
|
||||
P19,,,GND,,,,,,,,,,,,,
|
||||
P20,,,VCCO_3,,,3,,,,,2.50,,,,,
|
||||
P21,,,VCCAUX,,,,,,,,2.5,,,,,
|
||||
P22,,DIFFM,IO_L07P_3,UNUSED,,3,,,,,,,,,,
|
||||
P23,,DIFFS,IO_L07N_3,UNUSED,,3,,,,,,,,,,
|
||||
P24,,DIFFM,IO_L01P_2/CSO_B,UNUSED,,2,,,,,,,,,,
|
||||
P25,,DIFFS,IO_L01N_2/INIT_B,UNUSED,,2,,,,,,,,,,
|
||||
P26,,DIFFM,IO_L02P_2/DOUT/BUSY,UNUSED,,2,,,,,,,,,,
|
||||
P27,,DIFFS,IO_L02N_2/MOSI/CSI_B,UNUSED,,2,,,,,,,,,,
|
||||
P28,,,VCCINT,,,,,,,,1.2,,,,,
|
||||
P29,,,GND,,,,,,,,,,,,,
|
||||
P30,reset,IBUF,IP/VREF_2,INPUT,LVCMOS25*,2,,,,NONE,,LOCATED,,NO,NONE,
|
||||
P31,,,VCCO_2,,,2,,,,,2.50,,,,,
|
||||
P32,,DIFFM,IO_L03P_2/D7/GCLK12,UNUSED,,2,,,,,,,,,,
|
||||
P33,,DIFFS,IO_L03N_2/D6/GCLK13,UNUSED,,2,,,,,,,,,,
|
||||
P34,,IOB,IO/D5,UNUSED,,2,,,,,,,,,,
|
||||
P35,,DIFFM,IO_L04P_2/D4/GCLK14,UNUSED,,2,,,,,,,,,,
|
||||
P36,,DIFFS,IO_L04N_2/D3/GCLK15,UNUSED,,2,,,,,,,,,,
|
||||
P37,,,GND,,,,,,,,,,,,,
|
||||
P38,clk,IBUF,IP_L05P_2/RDWR_B/GCLK0,INPUT,LVCMOS25*,2,,,,NONE,,LOCATED,,NO,NONE,
|
||||
P39,,DIFFSI,IP_L05N_2/M2/GCLK1,UNUSED,,2,,,,,,,,,,
|
||||
P40,,DIFFM,IO_L06P_2/D2/GCLK2,UNUSED,,2,,,,,,,,,,
|
||||
P41,,DIFFS,IO_L06N_2/D1/GCLK3,UNUSED,,2,,,,,,,,,,
|
||||
P42,,IOB,IO/M1,UNUSED,,2,,,,,,,,,,
|
||||
P43,,DIFFM,IO_L07P_2/M0,UNUSED,,2,,,,,,,,,,
|
||||
P44,led,IOB,IO_L07N_2/DIN/D0,OUTPUT,LVCMOS25*,2,12,SLOW,NONE**,,,LOCATED,,YES,NONE,
|
||||
P45,,,VCCO_2,,,2,,,,,2.50,,,,,
|
||||
P46,,,VCCAUX,,,,,,,,2.5,,,,,
|
||||
P47,,DIFFM,IO_L08P_2/VS2,UNUSED,,2,,,,,,,,,,
|
||||
P48,,DIFFS,IO_L08N_2/VS1,UNUSED,,2,,,,,,,,,,
|
||||
P49,,DIFFM,IO_L09P_2/VS0,UNUSED,,2,,,,,,,,,,
|
||||
P50,,DIFFS,IO_L09N_2/CCLK,UNUSED,,2,,,,,,,,,,
|
||||
P51,,,DONE,,,,,,,,,,,,,
|
||||
P52,,,GND,,,,,,,,,,,,,
|
||||
P53,,DIFFM,IO_L01P_1,UNUSED,,1,,,,,,,,,,
|
||||
P54,,DIFFS,IO_L01N_1,UNUSED,,1,,,,,,,,,,
|
||||
P55,,,VCCO_1,,,1,,,,,2.50,,,,,
|
||||
P56,,,VCCINT,,,,,,,,1.2,,,,,
|
||||
P57,,DIFFM,IO_L02P_1,UNUSED,,1,,,,,,,,,,
|
||||
P58,,DIFFS,IO_L02N_1,UNUSED,,1,,,,,,,,,,
|
||||
P59,,,GND,,,,,,,,,,,,,
|
||||
P60,,DIFFM,IO_L03P_1/RHCLK0,UNUSED,,1,,,,,,,,,,
|
||||
P61,,DIFFS,IO_L03N_1/RHCLK1,UNUSED,,1,,,,,,,,,,
|
||||
P62,,DIFFM,IO_L04P_1/RHCLK2,UNUSED,,1,,,,,,,,,,
|
||||
P63,,DIFFS,IO_L04N_1/RHCLK3/TRDY1,UNUSED,,1,,,,,,,,,,
|
||||
P64,,,GND,,,,,,,,,,,,,
|
||||
P65,,DIFFM,IO_L05P_1/RHCLK4/IRDY1,UNUSED,,1,,,,,,,,,,
|
||||
P66,,DIFFS,IO_L05N_1/RHCLK5,UNUSED,,1,,,,,,,,,,
|
||||
P67,TxD,IOB,IO_L06P_1/RHCLK6,OUTPUT,LVCMOS25*,1,12,SLOW,NONE**,,,LOCATED,,YES,NONE,
|
||||
P68,RxD,IBUF,IO_L06N_1/RHCLK7,INPUT,LVCMOS25*,1,,,,IFD,,LOCATED,,YES,NONE,
|
||||
P69,ncs,IBUF,IP/VREF_1,INPUT,LVCMOS25*,1,,,,IFD,,LOCATED,,YES,NONE,
|
||||
P70,,DIFFM,IO_L07P_1,UNUSED,,1,,,,,,,,,,
|
||||
P71,irq_pin,IOB,IO_L07N_1,OUTPUT,LVCMOS25*,1,12,SLOW,NONE**,,,LOCATED,,NO,NONE,
|
||||
P72,,,GND,,,,,,,,,,,,,
|
||||
P73,,,VCCO_1,,,1,,,,,2.50,,,,,
|
||||
P74,,,VCCAUX,,,,,,,,2.5,,,,,
|
||||
P75,,,TMS,,,,,,,,,,,,,
|
||||
P76,,,TDO,,,,,,,,,,,,,
|
||||
P77,,,TCK,,,,,,,,,,,,,
|
||||
P78,,DIFFM,IO_L01P_0,UNUSED,,0,,,,,,,,,,
|
||||
P79,addr<2>,IBUF,IO_L01N_0,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,,YES,NONE,
|
||||
P80,,,VCCINT,,,,,,,,1.2,,,,,
|
||||
P81,,,GND,,,,,,,,,,,,,
|
||||
P82,,,VCCO_0,,,0,,,,,2.50,,,,,
|
||||
P83,addr<1>,IBUF,IO_L02P_0/GCLK4,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,,YES,NONE,
|
||||
P84,addr<0>,IBUF,IO_L02N_0/GCLK5,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,,YES,NONE,
|
||||
P85,,DIFFM,IO_L03P_0/GCLK6,UNUSED,,0,,,,,,,,,,
|
||||
P86,noe,IBUF,IO_L03N_0/GCLK7,INPUT,LVCMOS25*,0,,,,NONE,,LOCATED,,NO,NONE,
|
||||
P87,,,GND,,,,,,,,,,,,,
|
||||
P88,nwe,IBUF,IP_L04P_0/GCLK8,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,,YES,NONE,
|
||||
P89,,DIFFSI,IP_L04N_0/GCLK9,UNUSED,,0,,,,,,,,,,
|
||||
P90,,DIFFM,IO_L05P_0/GCLK10,UNUSED,,0,,,,,,,,,,
|
||||
P91,,DIFFS,IO_L05N_0/GCLK11,UNUSED,,0,,,,,,,,,,
|
||||
P92,,IOB,IO,UNUSED,,0,,,,,,,,,,
|
||||
P93,,,GND,,,,,,,,,,,,,
|
||||
P94,,DIFFM,IO_L06P_0,UNUSED,,0,,,,,,,,,,
|
||||
P95,,DIFFS,IO_L06N_0/VREF_0,UNUSED,,0,,,,,,,,,,
|
||||
P96,,,VCCAUX,,,,,,,,2.5,,,,,
|
||||
P97,,,VCCO_0,,,0,,,,,2.50,,,,,
|
||||
P98,,DIFFM,IO_L07P_0,UNUSED,,0,,,,,,,,,,
|
||||
P99,,DIFFS,IO_L07N_0/HSWAP,UNUSED,,0,,,,,,,,,,
|
||||
P100,,,TDI,,,,,,,,,,,,,
|
||||
|
||||
# -----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,
|
||||
#
|
||||
#* Default value.
|
||||
#** This default Pullup/Pulldown value can be overridden in Bitgen.
|
||||
#****** Special VCCO requirements may apply. Please consult the device
|
||||
# family datasheet for specific guideline on VCCO requirements.
|
||||
#
|
||||
#
|
||||
#
|
||||
|
130
UART/logic/build/project_r_pad.txt
Normal file
130
UART/logic/build/project_r_pad.txt
Normal file
@@ -0,0 +1,130 @@
|
||||
Release 10.1.03 - par K.39 (lin)
|
||||
Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
|
||||
|
||||
Thu Nov 11 14:38:56 2010
|
||||
|
||||
|
||||
INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are:
|
||||
1. The <design name>_pad.txt file (this file) designed to provide information on IO usage in a human readable ASCII text format viewable through common text editors.
|
||||
2. The <design namd>_pad.csv file for use with spreadsheet programs such as MS Excel. This file can also be read by PACE to communicate post PAR IO information.
|
||||
3. The <design name>.pad file designed for parsing by customers. It uses the "|" as a data field separator.
|
||||
|
||||
INPUT FILE: project.ncd
|
||||
OUTPUT FILE: project_r_pad.txt
|
||||
PART TYPE: xc3s500e
|
||||
SPEED GRADE: -4
|
||||
PACKAGE: vq100
|
||||
|
||||
Pinout by Pin Number:
|
||||
|
||||
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
|Pin Number|Signal Name |Pin Usage|Pin Name |Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage|Constraint|DCI Value|IO Register|Signal Integrity|
|
||||
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
|P1 | | |PROG_B | | | | | | | | | | | | |
|
||||
|P2 | |DIFFM |IO_L01P_3 |UNUSED | |3 | | | | | | | | | |
|
||||
|P3 | |DIFFS |IO_L01N_3 |UNUSED | |3 | | | | | | | | | |
|
||||
|P4 |sram_data<7>|IOB |IO_L02P_3 |BIDIR |LVCMOS25* |3 |12 |SLOW |NONE** |IFD | |LOCATED | |YES |NONE |
|
||||
|P5 |sram_data<6>|IOB |IO_L02N_3/VREF_3 |BIDIR |LVCMOS25* |3 |12 |SLOW |NONE** |IFD | |LOCATED | |YES |NONE |
|
||||
|P6 | | |VCCINT | | | | | | | |1.2 | | | | |
|
||||
|P7 | | |GND | | | | | | | | | | | | |
|
||||
|P8 | | |VCCO_3 | | |3 | | | | |2.50 | | | | |
|
||||
|P9 |sram_data<5>|IOB |IO_L03P_3/LHCLK0 |BIDIR |LVCMOS25* |3 |12 |SLOW |NONE** |IFD | |LOCATED | |YES |NONE |
|
||||
|P10 |sram_data<4>|IOB |IO_L03N_3/LHCLK1 |BIDIR |LVCMOS25* |3 |12 |SLOW |NONE** |IFD | |LOCATED | |YES |NONE |
|
||||
|P11 |sram_data<3>|IOB |IO_L04P_3/LHCLK2 |BIDIR |LVCMOS25* |3 |12 |SLOW |NONE** |IFD | |LOCATED | |YES |NONE |
|
||||
|P12 |sram_data<2>|IOB |IO_L04N_3/LHCLK3/IRDY2|BIDIR |LVCMOS25* |3 |12 |SLOW |NONE** |IFD | |LOCATED | |YES |NONE |
|
||||
|P13 | |IBUF |IP |UNUSED | |3 | | | | | | | | | |
|
||||
|P14 | | |GND | | | | | | | | | | | | |
|
||||
|P15 |sram_data<1>|IOB |IO_L05P_3/LHCLK4/TRDY2|BIDIR |LVCMOS25* |3 |12 |SLOW |NONE** |IFD | |LOCATED | |YES |NONE |
|
||||
|P16 |sram_data<0>|IOB |IO_L05N_3/LHCLK5 |BIDIR |LVCMOS25* |3 |12 |SLOW |NONE** |IFD | |LOCATED | |YES |NONE |
|
||||
|P17 | |DIFFM |IO_L06P_3/LHCLK6 |UNUSED | |3 | | | | | | | | | |
|
||||
|P18 | |DIFFS |IO_L06N_3/LHCLK7 |UNUSED | |3 | | | | | | | | | |
|
||||
|P19 | | |GND | | | | | | | | | | | | |
|
||||
|P20 | | |VCCO_3 | | |3 | | | | |2.50 | | | | |
|
||||
|P21 | | |VCCAUX | | | | | | | |2.5 | | | | |
|
||||
|P22 | |DIFFM |IO_L07P_3 |UNUSED | |3 | | | | | | | | | |
|
||||
|P23 | |DIFFS |IO_L07N_3 |UNUSED | |3 | | | | | | | | | |
|
||||
|P24 | |DIFFM |IO_L01P_2/CSO_B |UNUSED | |2 | | | | | | | | | |
|
||||
|P25 | |DIFFS |IO_L01N_2/INIT_B |UNUSED | |2 | | | | | | | | | |
|
||||
|P26 | |DIFFM |IO_L02P_2/DOUT/BUSY |UNUSED | |2 | | | | | | | | | |
|
||||
|P27 | |DIFFS |IO_L02N_2/MOSI/CSI_B |UNUSED | |2 | | | | | | | | | |
|
||||
|P28 | | |VCCINT | | | | | | | |1.2 | | | | |
|
||||
|P29 | | |GND | | | | | | | | | | | | |
|
||||
|P30 |reset |IBUF |IP/VREF_2 |INPUT |LVCMOS25* |2 | | | |NONE | |LOCATED | |NO |NONE |
|
||||
|P31 | | |VCCO_2 | | |2 | | | | |2.50 | | | | |
|
||||
|P32 | |DIFFM |IO_L03P_2/D7/GCLK12 |UNUSED | |2 | | | | | | | | | |
|
||||
|P33 | |DIFFS |IO_L03N_2/D6/GCLK13 |UNUSED | |2 | | | | | | | | | |
|
||||
|P34 | |IOB |IO/D5 |UNUSED | |2 | | | | | | | | | |
|
||||
|P35 | |DIFFM |IO_L04P_2/D4/GCLK14 |UNUSED | |2 | | | | | | | | | |
|
||||
|P36 | |DIFFS |IO_L04N_2/D3/GCLK15 |UNUSED | |2 | | | | | | | | | |
|
||||
|P37 | | |GND | | | | | | | | | | | | |
|
||||
|P38 |clk |IBUF |IP_L05P_2/RDWR_B/GCLK0|INPUT |LVCMOS25* |2 | | | |NONE | |LOCATED | |NO |NONE |
|
||||
|P39 | |DIFFSI |IP_L05N_2/M2/GCLK1 |UNUSED | |2 | | | | | | | | | |
|
||||
|P40 | |DIFFM |IO_L06P_2/D2/GCLK2 |UNUSED | |2 | | | | | | | | | |
|
||||
|P41 | |DIFFS |IO_L06N_2/D1/GCLK3 |UNUSED | |2 | | | | | | | | | |
|
||||
|P42 | |IOB |IO/M1 |UNUSED | |2 | | | | | | | | | |
|
||||
|P43 | |DIFFM |IO_L07P_2/M0 |UNUSED | |2 | | | | | | | | | |
|
||||
|P44 |led |IOB |IO_L07N_2/DIN/D0 |OUTPUT |LVCMOS25* |2 |12 |SLOW |NONE** | | |LOCATED | |YES |NONE |
|
||||
|P45 | | |VCCO_2 | | |2 | | | | |2.50 | | | | |
|
||||
|P46 | | |VCCAUX | | | | | | | |2.5 | | | | |
|
||||
|P47 | |DIFFM |IO_L08P_2/VS2 |UNUSED | |2 | | | | | | | | | |
|
||||
|P48 | |DIFFS |IO_L08N_2/VS1 |UNUSED | |2 | | | | | | | | | |
|
||||
|P49 | |DIFFM |IO_L09P_2/VS0 |UNUSED | |2 | | | | | | | | | |
|
||||
|P50 | |DIFFS |IO_L09N_2/CCLK |UNUSED | |2 | | | | | | | | | |
|
||||
|P51 | | |DONE | | | | | | | | | | | | |
|
||||
|P52 | | |GND | | | | | | | | | | | | |
|
||||
|P53 | |DIFFM |IO_L01P_1 |UNUSED | |1 | | | | | | | | | |
|
||||
|P54 | |DIFFS |IO_L01N_1 |UNUSED | |1 | | | | | | | | | |
|
||||
|P55 | | |VCCO_1 | | |1 | | | | |2.50 | | | | |
|
||||
|P56 | | |VCCINT | | | | | | | |1.2 | | | | |
|
||||
|P57 | |DIFFM |IO_L02P_1 |UNUSED | |1 | | | | | | | | | |
|
||||
|P58 | |DIFFS |IO_L02N_1 |UNUSED | |1 | | | | | | | | | |
|
||||
|P59 | | |GND | | | | | | | | | | | | |
|
||||
|P60 | |DIFFM |IO_L03P_1/RHCLK0 |UNUSED | |1 | | | | | | | | | |
|
||||
|P61 | |DIFFS |IO_L03N_1/RHCLK1 |UNUSED | |1 | | | | | | | | | |
|
||||
|P62 | |DIFFM |IO_L04P_1/RHCLK2 |UNUSED | |1 | | | | | | | | | |
|
||||
|P63 | |DIFFS |IO_L04N_1/RHCLK3/TRDY1|UNUSED | |1 | | | | | | | | | |
|
||||
|P64 | | |GND | | | | | | | | | | | | |
|
||||
|P65 | |DIFFM |IO_L05P_1/RHCLK4/IRDY1|UNUSED | |1 | | | | | | | | | |
|
||||
|P66 | |DIFFS |IO_L05N_1/RHCLK5 |UNUSED | |1 | | | | | | | | | |
|
||||
|P67 |TxD |IOB |IO_L06P_1/RHCLK6 |OUTPUT |LVCMOS25* |1 |12 |SLOW |NONE** | | |LOCATED | |YES |NONE |
|
||||
|P68 |RxD |IBUF |IO_L06N_1/RHCLK7 |INPUT |LVCMOS25* |1 | | | |IFD | |LOCATED | |YES |NONE |
|
||||
|P69 |ncs |IBUF |IP/VREF_1 |INPUT |LVCMOS25* |1 | | | |IFD | |LOCATED | |YES |NONE |
|
||||
|P70 | |DIFFM |IO_L07P_1 |UNUSED | |1 | | | | | | | | | |
|
||||
|P71 |irq_pin |IOB |IO_L07N_1 |OUTPUT |LVCMOS25* |1 |12 |SLOW |NONE** | | |LOCATED | |NO |NONE |
|
||||
|P72 | | |GND | | | | | | | | | | | | |
|
||||
|P73 | | |VCCO_1 | | |1 | | | | |2.50 | | | | |
|
||||
|P74 | | |VCCAUX | | | | | | | |2.5 | | | | |
|
||||
|P75 | | |TMS | | | | | | | | | | | | |
|
||||
|P76 | | |TDO | | | | | | | | | | | | |
|
||||
|P77 | | |TCK | | | | | | | | | | | | |
|
||||
|P78 | |DIFFM |IO_L01P_0 |UNUSED | |0 | | | | | | | | | |
|
||||
|P79 |addr<2> |IBUF |IO_L01N_0 |INPUT |LVCMOS25* |0 | | | |IFD | |LOCATED | |YES |NONE |
|
||||
|P80 | | |VCCINT | | | | | | | |1.2 | | | | |
|
||||
|P81 | | |GND | | | | | | | | | | | | |
|
||||
|P82 | | |VCCO_0 | | |0 | | | | |2.50 | | | | |
|
||||
|P83 |addr<1> |IBUF |IO_L02P_0/GCLK4 |INPUT |LVCMOS25* |0 | | | |IFD | |LOCATED | |YES |NONE |
|
||||
|P84 |addr<0> |IBUF |IO_L02N_0/GCLK5 |INPUT |LVCMOS25* |0 | | | |IFD | |LOCATED | |YES |NONE |
|
||||
|P85 | |DIFFM |IO_L03P_0/GCLK6 |UNUSED | |0 | | | | | | | | | |
|
||||
|P86 |noe |IBUF |IO_L03N_0/GCLK7 |INPUT |LVCMOS25* |0 | | | |NONE | |LOCATED | |NO |NONE |
|
||||
|P87 | | |GND | | | | | | | | | | | | |
|
||||
|P88 |nwe |IBUF |IP_L04P_0/GCLK8 |INPUT |LVCMOS25* |0 | | | |IFD | |LOCATED | |YES |NONE |
|
||||
|P89 | |DIFFSI |IP_L04N_0/GCLK9 |UNUSED | |0 | | | | | | | | | |
|
||||
|P90 | |DIFFM |IO_L05P_0/GCLK10 |UNUSED | |0 | | | | | | | | | |
|
||||
|P91 | |DIFFS |IO_L05N_0/GCLK11 |UNUSED | |0 | | | | | | | | | |
|
||||
|P92 | |IOB |IO |UNUSED | |0 | | | | | | | | | |
|
||||
|P93 | | |GND | | | | | | | | | | | | |
|
||||
|P94 | |DIFFM |IO_L06P_0 |UNUSED | |0 | | | | | | | | | |
|
||||
|P95 | |DIFFS |IO_L06N_0/VREF_0 |UNUSED | |0 | | | | | | | | | |
|
||||
|P96 | | |VCCAUX | | | | | | | |2.5 | | | | |
|
||||
|P97 | | |VCCO_0 | | |0 | | | | |2.50 | | | | |
|
||||
|P98 | |DIFFM |IO_L07P_0 |UNUSED | |0 | | | | | | | | | |
|
||||
|P99 | |DIFFS |IO_L07N_0/HSWAP |UNUSED | |0 | | | | | | | | | |
|
||||
|P100 | | |TDI | | | | | | | | | | | | |
|
||||
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
|
||||
* Default value.
|
||||
** This default Pullup/Pulldown value can be overridden in Bitgen.
|
||||
****** Special VCCO requirements may apply. Please consult the device
|
||||
family datasheet for specific guideline on VCCO requirements.
|
||||
|
||||
|
||||
10
UART/logic/build/project_summary.xml
Normal file
10
UART/logic/build/project_summary.xml
Normal file
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!-- IMPORTANT: This is an internal file that has been generated
|
||||
by the Xilinx ISE software. Any direct editing or
|
||||
changes made to this file may result in unpredictable
|
||||
behavior or data corruption. It is strongly advised that
|
||||
users do not edit the contents of this file. -->
|
||||
<DesignSummary rev="2">
|
||||
<CmdHistory>
|
||||
</CmdHistory>
|
||||
</DesignSummary>
|
||||
492
UART/logic/build/project_usage.xml
Normal file
492
UART/logic/build/project_usage.xml
Normal file
@@ -0,0 +1,492 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!-- IMPORTANT: This is an internal file that has been generated
|
||||
by the Xilinx ISE software. Any direct editing or
|
||||
changes made to this file may result in unpredictable
|
||||
behavior or data corruption. It is strongly advised that
|
||||
users do not edit the contents of this file. -->
|
||||
<DeviceUsageSummary rev="2">
|
||||
<DesignStatistics TimeStamp="Thu Nov 11 14:39:26 2010"><group name="NetStatistics">
|
||||
<item name="NumNets_Active" rev="2">
|
||||
<attrib name="value" value="304"/></item>
|
||||
<item name="NumNets_Gnd" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="NumNets_Vcc" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="NumNodesOfType_Active_CLKPIN" rev="2">
|
||||
<attrib name="value" value="109"/></item>
|
||||
<item name="NumNodesOfType_Active_CNTRLPIN" rev="2">
|
||||
<attrib name="value" value="164"/></item>
|
||||
<item name="NumNodesOfType_Active_DOUBLE" rev="2">
|
||||
<attrib name="value" value="480"/></item>
|
||||
<item name="NumNodesOfType_Active_DUMMY" rev="2">
|
||||
<attrib name="value" value="530"/></item>
|
||||
<item name="NumNodesOfType_Active_DUMMYESC" rev="2">
|
||||
<attrib name="value" value="4"/></item>
|
||||
<item name="NumNodesOfType_Active_GLOBAL" rev="2">
|
||||
<attrib name="value" value="50"/></item>
|
||||
<item name="NumNodesOfType_Active_HFULLHEX" rev="2">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="NumNodesOfType_Active_HLONG" rev="2">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="NumNodesOfType_Active_HUNIHEX" rev="2">
|
||||
<attrib name="value" value="69"/></item>
|
||||
<item name="NumNodesOfType_Active_INPUT" rev="2">
|
||||
<attrib name="value" value="631"/></item>
|
||||
<item name="NumNodesOfType_Active_IOBOUTPUT" rev="2">
|
||||
<attrib name="value" value="18"/></item>
|
||||
<item name="NumNodesOfType_Active_OMUX" rev="2">
|
||||
<attrib name="value" value="281"/></item>
|
||||
<item name="NumNodesOfType_Active_OUTPUT" rev="2">
|
||||
<attrib name="value" value="267"/></item>
|
||||
<item name="NumNodesOfType_Active_PREBXBY" rev="2">
|
||||
<attrib name="value" value="207"/></item>
|
||||
<item name="NumNodesOfType_Active_VFULLHEX" rev="2">
|
||||
<attrib name="value" value="43"/></item>
|
||||
<item name="NumNodesOfType_Active_VLONG" rev="2">
|
||||
<attrib name="value" value="19"/></item>
|
||||
<item name="NumNodesOfType_Active_VUNIHEX" rev="2">
|
||||
<attrib name="value" value="35"/></item>
|
||||
<item name="NumNodesOfType_Vcc_CNTRLPIN" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="NumNodesOfType_Vcc_INPUT" rev="2">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="NumNodesOfType_Vcc_PREBXBY" rev="2">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="NumNodesOfType_Vcc_VCCOUT" rev="2">
|
||||
<attrib name="value" value="3"/></item>
|
||||
</group>
|
||||
<group name="MiscellaneousStatistics">
|
||||
<item name="AGG_BONDED_IO" rev="1">
|
||||
<attrib name="value" value="20"/></item>
|
||||
<item name="AGG_IO" rev="1">
|
||||
<attrib name="value" value="20"/></item>
|
||||
<item name="AGG_SLICE" rev="1">
|
||||
<attrib name="value" value="138"/></item>
|
||||
<item name="NUM_4_INPUT_LUT" rev="1">
|
||||
<attrib name="value" value="181"/></item>
|
||||
<item name="NUM_BONDED_IBUF" rev="1">
|
||||
<attrib name="value" value="9"/></item>
|
||||
<item name="NUM_BONDED_IOB" rev="1">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="NUM_BUFGMUX" rev="1">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="NUM_CYMUX" rev="1">
|
||||
<attrib name="value" value="46"/></item>
|
||||
<item name="NUM_IOB_FF" rev="1">
|
||||
<attrib name="value" value="16"/></item>
|
||||
<item name="NUM_LUT_RT" rev="1">
|
||||
<attrib name="value" value="40"/></item>
|
||||
<item name="NUM_SLICEL" rev="1">
|
||||
<attrib name="value" value="138"/></item>
|
||||
<item name="NUM_SLICE_FF" rev="1">
|
||||
<attrib name="value" value="157"/></item>
|
||||
<item name="NUM_XOR" rev="1">
|
||||
<attrib name="value" value="40"/></item>
|
||||
</group>
|
||||
</DesignStatistics>
|
||||
<DeviceUsage TimeStamp="Thu Nov 11 14:39:26 2010"><group name="SiteSummary">
|
||||
<item name="BUFGMUX" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="1"/></item>
|
||||
<item name="BUFGMUX_GCLKMUX" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="1"/></item>
|
||||
<item name="BUFGMUX_GCLK_BUFFER" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="1"/></item>
|
||||
<item name="IBUF" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="9"/></item>
|
||||
<item name="IBUF_IFD_DELAY" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="6"/></item>
|
||||
<item name="IBUF_IFF1" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="6"/></item>
|
||||
<item name="IBUF_INBUF" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="9"/></item>
|
||||
<item name="IBUF_PAD" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="9"/></item>
|
||||
<item name="IOB" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="11"/></item>
|
||||
<item name="IOB_IFD_DELAY" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="8"/></item>
|
||||
<item name="IOB_IFF1" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="8"/></item>
|
||||
<item name="IOB_INBUF" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="8"/></item>
|
||||
<item name="IOB_OFF1" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="2"/></item>
|
||||
<item name="IOB_OUTBUF" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="11"/></item>
|
||||
<item name="IOB_PAD" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="11"/></item>
|
||||
<item name="SLICEL" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="138"/></item>
|
||||
<item name="SLICEL_C1VDD" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="2"/></item>
|
||||
<item name="SLICEL_CYMUXF" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="24"/></item>
|
||||
<item name="SLICEL_CYMUXG" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="22"/></item>
|
||||
<item name="SLICEL_F" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="88"/></item>
|
||||
<item name="SLICEL_F5MUX" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="7"/></item>
|
||||
<item name="SLICEL_FFX" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="76"/></item>
|
||||
<item name="SLICEL_FFY" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="81"/></item>
|
||||
<item name="SLICEL_G" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="93"/></item>
|
||||
<item name="SLICEL_GNDF" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="22"/></item>
|
||||
<item name="SLICEL_GNDG" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="22"/></item>
|
||||
<item name="SLICEL_XORF" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="20"/></item>
|
||||
<item name="SLICEL_XORG" rev="2">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="20"/></item>
|
||||
</group>
|
||||
</DeviceUsage>
|
||||
<ReportConfigData TimeStamp="Thu Nov 11 14:39:26 2010"><group name="IBUF_PAD">
|
||||
<item name="IOATTRBOX" rev="2">
|
||||
<attrib name="LVCMOS25" value="9"/></item>
|
||||
</group>
|
||||
<group name="IBUF_INBUF">
|
||||
<item name="IFD_DELAY_VALUE" rev="2">
|
||||
<attrib name="DLY3" value="6"/></item>
|
||||
</group>
|
||||
<group name="IOB_OFF1">
|
||||
<item name="LATCH_OR_FF" rev="2">
|
||||
<attrib name="FF" value="2"/></item>
|
||||
<item name="OFF1_INIT_ATTR" rev="2">
|
||||
<attrib name="INIT0" value="1"/><attrib name="INIT1" value="1"/></item>
|
||||
<item name="OFF1_SR_ATTR" rev="2">
|
||||
<attrib name="SRLOW" value="1"/><attrib name="SRHIGH" value="1"/></item>
|
||||
<item name="OFFATTRBOX" rev="2">
|
||||
<attrib name="ASYNC" value="1"/><attrib name="SYNC" value="1"/></item>
|
||||
</group>
|
||||
<group name="BUFGMUX_GCLKMUX">
|
||||
<item name="DISABLE_ATTR" rev="2">
|
||||
<attrib name="LOW" value="1"/></item>
|
||||
</group>
|
||||
<group name="IOB_IFF1">
|
||||
<item name="IFF1_INIT_ATTR" rev="2">
|
||||
<attrib name="INIT0" value="8"/></item>
|
||||
<item name="LATCH_OR_FF" rev="2">
|
||||
<attrib name="FF" value="8"/></item>
|
||||
</group>
|
||||
<group name="IOB_INBUF">
|
||||
<item name="IFD_DELAY_VALUE" rev="2">
|
||||
<attrib name="DLY3" value="8"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_FFX">
|
||||
<item name="FFX_INIT_ATTR" rev="2">
|
||||
<attrib name="INIT0" value="70"/><attrib name="INIT1" value="6"/></item>
|
||||
<item name="FFX_SR_ATTR" rev="2">
|
||||
<attrib name="SRLOW" value="70"/><attrib name="SRHIGH" value="6"/></item>
|
||||
<item name="LATCH_OR_FF" rev="2">
|
||||
<attrib name="FF" value="76"/></item>
|
||||
<item name="SYNC_ATTR" rev="2">
|
||||
<attrib name="ASYNC" value="54"/><attrib name="SYNC" value="22"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_FFY">
|
||||
<item name="FFY_INIT_ATTR" rev="2">
|
||||
<attrib name="INIT0" value="71"/><attrib name="INIT1" value="10"/></item>
|
||||
<item name="FFY_SR_ATTR" rev="2">
|
||||
<attrib name="SRLOW" value="71"/><attrib name="SRHIGH" value="10"/></item>
|
||||
<item name="LATCH_OR_FF" rev="2">
|
||||
<attrib name="FF" value="81"/></item>
|
||||
<item name="SYNC_ATTR" rev="2">
|
||||
<attrib name="ASYNC" value="53"/><attrib name="SYNC" value="28"/></item>
|
||||
</group>
|
||||
<group name="IBUF_IFF1">
|
||||
<item name="IFF1_INIT_ATTR" rev="2">
|
||||
<attrib name="INIT0" value="5"/><attrib name="INIT1" value="1"/></item>
|
||||
<item name="IFF1_SR_ATTR" rev="2">
|
||||
<attrib name="SRHIGH" value="1"/></item>
|
||||
<item name="IFFATTRBOX" rev="2">
|
||||
<attrib name="ASYNC" value="1"/></item>
|
||||
<item name="LATCH_OR_FF" rev="2">
|
||||
<attrib name="FF" value="6"/></item>
|
||||
</group>
|
||||
<group name="IOB_PAD">
|
||||
<item name="DRIVEATTRBOX" rev="2">
|
||||
<attrib name="12" value="11"/></item>
|
||||
<item name="IOATTRBOX" rev="2">
|
||||
<attrib name="LVCMOS25" value="11"/></item>
|
||||
<item name="SLEW" rev="2">
|
||||
<attrib name="SLOW" value="11"/></item>
|
||||
</group>
|
||||
</ReportConfigData>
|
||||
<ReportPinData TimeStamp="Thu Nov 11 14:39:26 2010"><group name="IBUF_PAD">
|
||||
<item name="PAD" rev="2">
|
||||
<attrib name="value" value="9"/></item>
|
||||
</group>
|
||||
<group name="IBUF_INBUF">
|
||||
<item name="IN" rev="2">
|
||||
<attrib name="value" value="9"/></item>
|
||||
<item name="OUT" rev="2">
|
||||
<attrib name="value" value="9"/></item>
|
||||
</group>
|
||||
<group name="SLICEL">
|
||||
<item name="BX" rev="2">
|
||||
<attrib name="value" value="42"/></item>
|
||||
<item name="BY" rev="2">
|
||||
<attrib name="value" value="42"/></item>
|
||||
<item name="CE" rev="2">
|
||||
<attrib name="value" value="62"/></item>
|
||||
<item name="CIN" rev="2">
|
||||
<attrib name="value" value="21"/></item>
|
||||
<item name="CLK" rev="2">
|
||||
<attrib name="value" value="93"/></item>
|
||||
<item name="COUT" rev="2">
|
||||
<attrib name="value" value="22"/></item>
|
||||
<item name="F1" rev="2">
|
||||
<attrib name="value" value="86"/></item>
|
||||
<item name="F2" rev="2">
|
||||
<attrib name="value" value="66"/></item>
|
||||
<item name="F3" rev="2">
|
||||
<attrib name="value" value="63"/></item>
|
||||
<item name="F4" rev="2">
|
||||
<attrib name="value" value="41"/></item>
|
||||
<item name="G1" rev="2">
|
||||
<attrib name="value" value="92"/></item>
|
||||
<item name="G2" rev="2">
|
||||
<attrib name="value" value="70"/></item>
|
||||
<item name="G3" rev="2">
|
||||
<attrib name="value" value="63"/></item>
|
||||
<item name="G4" rev="2">
|
||||
<attrib name="value" value="37"/></item>
|
||||
<item name="SR" rev="2">
|
||||
<attrib name="value" value="89"/></item>
|
||||
<item name="X" rev="2">
|
||||
<attrib name="value" value="41"/></item>
|
||||
<item name="XQ" rev="2">
|
||||
<attrib name="value" value="76"/></item>
|
||||
<item name="Y" rev="2">
|
||||
<attrib name="value" value="45"/></item>
|
||||
<item name="YQ" rev="2">
|
||||
<attrib name="value" value="81"/></item>
|
||||
</group>
|
||||
<group name="IOB_OFF1">
|
||||
<item name="CE" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="CK" rev="2">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="D" rev="2">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="Q" rev="2">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="SR" rev="2">
|
||||
<attrib name="value" value="2"/></item>
|
||||
</group>
|
||||
<group name="IOB_OUTBUF">
|
||||
<item name="IN" rev="2">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="OUT" rev="2">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="TRI" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_CYMUXF">
|
||||
<item name="0" rev="2">
|
||||
<attrib name="value" value="24"/></item>
|
||||
<item name="1" rev="2">
|
||||
<attrib name="value" value="24"/></item>
|
||||
<item name="OUT" rev="2">
|
||||
<attrib name="value" value="24"/></item>
|
||||
<item name="S0" rev="2">
|
||||
<attrib name="value" value="24"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_CYMUXG">
|
||||
<item name="0" rev="2">
|
||||
<attrib name="value" value="22"/></item>
|
||||
<item name="1" rev="2">
|
||||
<attrib name="value" value="22"/></item>
|
||||
<item name="OUT" rev="2">
|
||||
<attrib name="value" value="22"/></item>
|
||||
<item name="S0" rev="2">
|
||||
<attrib name="value" value="22"/></item>
|
||||
</group>
|
||||
<group name="BUFGMUX_GCLKMUX">
|
||||
<item name="I0" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="OUT" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="S" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_C1VDD">
|
||||
<item name="1" rev="2">
|
||||
<attrib name="value" value="2"/></item>
|
||||
</group>
|
||||
<group name="IOB_IFD_DELAY">
|
||||
<item name="IN" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
<item name="OUT" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
</group>
|
||||
<group name="IOB_IFF1">
|
||||
<item name="CK" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
<item name="D" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
<item name="Q" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
</group>
|
||||
<group name="IBUF">
|
||||
<item name="I" rev="2">
|
||||
<attrib name="value" value="4"/></item>
|
||||
<item name="ICE" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="ICLK1" rev="2">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="IQ1" rev="2">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="PAD" rev="2">
|
||||
<attrib name="value" value="9"/></item>
|
||||
<item name="SR" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
</group>
|
||||
<group name="IOB_INBUF">
|
||||
<item name="IN" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
<item name="OUT" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_FFX">
|
||||
<item name="CE" rev="2">
|
||||
<attrib name="value" value="51"/></item>
|
||||
<item name="CK" rev="2">
|
||||
<attrib name="value" value="76"/></item>
|
||||
<item name="D" rev="2">
|
||||
<attrib name="value" value="76"/></item>
|
||||
<item name="Q" rev="2">
|
||||
<attrib name="value" value="76"/></item>
|
||||
<item name="SR" rev="2">
|
||||
<attrib name="value" value="74"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_XORF">
|
||||
<item name="0" rev="2">
|
||||
<attrib name="value" value="20"/></item>
|
||||
<item name="1" rev="2">
|
||||
<attrib name="value" value="20"/></item>
|
||||
<item name="O" rev="2">
|
||||
<attrib name="value" value="20"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_FFY">
|
||||
<item name="CE" rev="2">
|
||||
<attrib name="value" value="57"/></item>
|
||||
<item name="CK" rev="2">
|
||||
<attrib name="value" value="81"/></item>
|
||||
<item name="D" rev="2">
|
||||
<attrib name="value" value="81"/></item>
|
||||
<item name="Q" rev="2">
|
||||
<attrib name="value" value="81"/></item>
|
||||
<item name="SR" rev="2">
|
||||
<attrib name="value" value="79"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_XORG">
|
||||
<item name="0" rev="2">
|
||||
<attrib name="value" value="20"/></item>
|
||||
<item name="1" rev="2">
|
||||
<attrib name="value" value="20"/></item>
|
||||
<item name="O" rev="2">
|
||||
<attrib name="value" value="20"/></item>
|
||||
</group>
|
||||
<group name="IBUF_IFF1">
|
||||
<item name="CE" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="CK" rev="2">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="D" rev="2">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="Q" rev="2">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="SR" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
</group>
|
||||
<group name="IOB_PAD">
|
||||
<item name="PAD" rev="2">
|
||||
<attrib name="value" value="11"/></item>
|
||||
</group>
|
||||
<group name="IOB">
|
||||
<item name="ICLK1" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
<item name="IQ1" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
<item name="O1" rev="2">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="OCE" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="OTCLK1" rev="2">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="PAD" rev="2">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="SR" rev="2">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="T1" rev="2">
|
||||
<attrib name="value" value="8"/></item>
|
||||
</group>
|
||||
<group name="BUFGMUX">
|
||||
<item name="I0" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="O" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="S" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
</group>
|
||||
<group name="BUFGMUX_GCLK_BUFFER">
|
||||
<item name="IN" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="OUT" rev="2">
|
||||
<attrib name="value" value="1"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_F">
|
||||
<item name="A1" rev="2">
|
||||
<attrib name="value" value="86"/></item>
|
||||
<item name="A2" rev="2">
|
||||
<attrib name="value" value="66"/></item>
|
||||
<item name="A3" rev="2">
|
||||
<attrib name="value" value="63"/></item>
|
||||
<item name="A4" rev="2">
|
||||
<attrib name="value" value="41"/></item>
|
||||
<item name="D" rev="2">
|
||||
<attrib name="value" value="88"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_F5MUX">
|
||||
<item name="F" rev="2">
|
||||
<attrib name="value" value="7"/></item>
|
||||
<item name="G" rev="2">
|
||||
<attrib name="value" value="7"/></item>
|
||||
<item name="OUT" rev="2">
|
||||
<attrib name="value" value="7"/></item>
|
||||
<item name="S0" rev="2">
|
||||
<attrib name="value" value="7"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_G">
|
||||
<item name="A1" rev="2">
|
||||
<attrib name="value" value="92"/></item>
|
||||
<item name="A2" rev="2">
|
||||
<attrib name="value" value="70"/></item>
|
||||
<item name="A3" rev="2">
|
||||
<attrib name="value" value="63"/></item>
|
||||
<item name="A4" rev="2">
|
||||
<attrib name="value" value="37"/></item>
|
||||
<item name="D" rev="2">
|
||||
<attrib name="value" value="93"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_GNDF">
|
||||
<item name="0" rev="2">
|
||||
<attrib name="value" value="22"/></item>
|
||||
</group>
|
||||
<group name="IBUF_IFD_DELAY">
|
||||
<item name="IN" rev="2">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="OUT" rev="2">
|
||||
<attrib name="value" value="6"/></item>
|
||||
</group>
|
||||
<group name="SLICEL_GNDG">
|
||||
<item name="0" rev="2">
|
||||
<attrib name="value" value="22"/></item>
|
||||
</group>
|
||||
</ReportPinData>
|
||||
<CmdHistory>
|
||||
</CmdHistory>
|
||||
</DeviceUsageSummary>
|
||||
1
UART/logic/build/uart_peripheral.lso
Normal file
1
UART/logic/build/uart_peripheral.lso
Normal file
@@ -0,0 +1 @@
|
||||
work
|
||||
263
UART/logic/build/uart_peripheral_map.xrpt
Normal file
263
UART/logic/build/uart_peripheral_map.xrpt
Normal file
@@ -0,0 +1,263 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
|
||||
<document OS="lin" product="ISE" version="10.1.03">
|
||||
|
||||
<!--The data in this file is primarily intended for consumption by Xilinx tools.
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="Map" timeStamp="Thu Nov 11 14:38:10 2010">
|
||||
<task stringID="MAP_PACK_REPORT">
|
||||
<section stringID="MAP_DESIGN_INFORMATION">
|
||||
<item stringID="MAP_PART" value="3s500evq100-4"/>
|
||||
<item stringID="MAP_DEVICE" value="xc3s500e"/>
|
||||
<item stringID="MAP_ARCHITECTURE" value="spartan3e"/>
|
||||
<item stringID="MAP_PACKAGE" value="vq100"/>
|
||||
<item stringID="MAP_SPEED" value="-4"/>
|
||||
</section>
|
||||
<section stringID="MAP_DESIGN_SUMMARY">
|
||||
<item dataType="int" stringID="MAP_NUM_ERRORS" value="0"/>
|
||||
<item dataType="int" stringID="MAP_FILTERED_WARNINGS" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_WARNINGS" value="2"/>
|
||||
<item UNITS="KB" dataType="int" stringID="MAP_PEAK_MEMORY" value="155892"/>
|
||||
<item stringID="MAP_TOTAL_REAL_TIME" value="10 secs "/>
|
||||
<item stringID="MAP_TOTAL_CPU_TIME" value="8 secs "/>
|
||||
</section>
|
||||
<section stringID="MAP_SLICE_REPORTING">
|
||||
<item dataType="int" stringID="MAP_NUM_SLICE_FF" value="157"/>
|
||||
<item dataType="int" stringID="MAP_NUM_SLICE_LATCH" value="0"/>
|
||||
<item dataType="int" stringID="MAP_AVAILABLE_SLICEL" value="2328"/>
|
||||
<item dataType="int" stringID="MAP_AVAILABLE_SLICEM" value="2328"/>
|
||||
<item dataType="int" stringID="MAP_FLOPS_PER_SLICE" value="2"/>
|
||||
<item dataType="int" stringID="MAP_LUTS_PER_SLICE" value="2"/>
|
||||
<item AVAILABLE="2328" dataType="int" stringID="MAP_NUM_SLICEM" value="0"/>
|
||||
<item AVAILABLE="2328" dataType="int" stringID="MAP_NUM_SLICEL" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_4_INPUT_LUT" value="181"/>
|
||||
<item dataType="int" stringID="MAP_AGG_SLICE" value="138"/>
|
||||
<item dataType="int" stringID="MAP_NUM_SLICE_UNRELATED" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_LUT_RT" value="40"/>
|
||||
<item dataType="int" stringID="MAP_NUM_DP_RAM" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_RAM32" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_RAM16" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_ROM16" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_SHIFT" value="0"/>
|
||||
</section>
|
||||
<section stringID="MAP_IOB_REPORTING"></section>
|
||||
<section stringID="MAP_HARD_IP_REPORTING">
|
||||
<item AVAILABLE="20" dataType="int" stringID="MAP_NUM_RAMB16" value="0"/>
|
||||
<item AVAILABLE="1" dataType="int" stringID="MAP_NUM_ICAP" value="0"/>
|
||||
<item AVAILABLE="1" dataType="int" stringID="MAP_NUM_STARTUP" value="0"/>
|
||||
<item AVAILABLE="1" dataType="int" stringID="MAP_NUM_BSCAN" value="0"/>
|
||||
<item AVAILABLE="1" dataType="int" stringID="MAP_NUM_CAPTURE" value="0"/>
|
||||
<item AVAILABLE="0" dataType="int" stringID="MAP_NUM_DCIRESET" value="0"/>
|
||||
</section>
|
||||
<section stringID="MAP_MACRO_RPM_REPORTING">
|
||||
<item dataType="int" stringID="MAP_HARD_MACROS" value="0"/>
|
||||
<item dataType="int" stringID="MAP_RPMS" value="0"/>
|
||||
</section>
|
||||
<section stringID="MAP_IOB_PROPERTIES">
|
||||
<table stringID="MAP_IOB_TABLE">
|
||||
<column stringID="IOB_Name"/>
|
||||
<column stringID="TYPE"/>
|
||||
<column stringID="DIRECTION"/>
|
||||
<column stringID="IO_STANDARD"/>
|
||||
<column stringID="DIFF_TERM"/>
|
||||
<column stringID="DRIVE_STRENGTH"/>
|
||||
<column stringID="SLEW_RATE"/>
|
||||
<column stringID="REGS"/>
|
||||
<column stringID="RESISTOR"/>
|
||||
<column stringID="IOB_Delay"/>
|
||||
<row stringID="row" value="1">
|
||||
<item stringID="IOB_Name" value="RxD"/>
|
||||
<item stringID="TYPE" value="IBUF"/>
|
||||
<item stringID="DIRECTION" value="INPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="2">
|
||||
<item stringID="IOB_Name" value="TxD"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="OUTPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="REGS" value="OFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 0"/>
|
||||
</row>
|
||||
<row stringID="row" value="3">
|
||||
<item stringID="IOB_Name" value="addr<0>"/>
|
||||
<item stringID="TYPE" value="IBUF"/>
|
||||
<item stringID="DIRECTION" value="INPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="4">
|
||||
<item stringID="IOB_Name" value="addr<1>"/>
|
||||
<item stringID="TYPE" value="IBUF"/>
|
||||
<item stringID="DIRECTION" value="INPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="5">
|
||||
<item stringID="IOB_Name" value="addr<2>"/>
|
||||
<item stringID="TYPE" value="IBUF"/>
|
||||
<item stringID="DIRECTION" value="INPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="6">
|
||||
<item stringID="IOB_Name" value="clk"/>
|
||||
<item stringID="TYPE" value="IBUF"/>
|
||||
<item stringID="DIRECTION" value="INPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="IOB_Delay" value="0 / 0"/>
|
||||
</row>
|
||||
<row stringID="row" value="7">
|
||||
<item stringID="IOB_Name" value="irq_pin"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="OUTPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="IOB_Delay" value="0 / 0"/>
|
||||
</row>
|
||||
<row stringID="row" value="8">
|
||||
<item stringID="IOB_Name" value="led"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="OUTPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="REGS" value="OFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 0"/>
|
||||
</row>
|
||||
<row stringID="row" value="9">
|
||||
<item stringID="IOB_Name" value="ncs"/>
|
||||
<item stringID="TYPE" value="IBUF"/>
|
||||
<item stringID="DIRECTION" value="INPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="10">
|
||||
<item stringID="IOB_Name" value="noe"/>
|
||||
<item stringID="TYPE" value="IBUF"/>
|
||||
<item stringID="DIRECTION" value="INPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="IOB_Delay" value="0 / 0"/>
|
||||
</row>
|
||||
<row stringID="row" value="11">
|
||||
<item stringID="IOB_Name" value="nwe"/>
|
||||
<item stringID="TYPE" value="IBUF"/>
|
||||
<item stringID="DIRECTION" value="INPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="12">
|
||||
<item stringID="IOB_Name" value="reset"/>
|
||||
<item stringID="TYPE" value="IBUF"/>
|
||||
<item stringID="DIRECTION" value="INPUT"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="IOB_Delay" value="0 / 0"/>
|
||||
</row>
|
||||
<row stringID="row" value="13">
|
||||
<item stringID="IOB_Name" value="sram_data<0>"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="BIDIR"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="14">
|
||||
<item stringID="IOB_Name" value="sram_data<1>"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="BIDIR"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="15">
|
||||
<item stringID="IOB_Name" value="sram_data<2>"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="BIDIR"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="16">
|
||||
<item stringID="IOB_Name" value="sram_data<3>"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="BIDIR"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="17">
|
||||
<item stringID="IOB_Name" value="sram_data<4>"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="BIDIR"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="18">
|
||||
<item stringID="IOB_Name" value="sram_data<5>"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="BIDIR"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="19">
|
||||
<item stringID="IOB_Name" value="sram_data<6>"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="BIDIR"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
<row stringID="row" value="20">
|
||||
<item stringID="IOB_Name" value="sram_data<7>"/>
|
||||
<item stringID="TYPE" value="IOB"/>
|
||||
<item stringID="DIRECTION" value="BIDIR"/>
|
||||
<item stringID="IO_STANDARD" value="LVCMOS25"/>
|
||||
<item stringID="DRIVE_STRENGTH" value="12"/>
|
||||
<item stringID="SLEW_RATE" value="SLOW"/>
|
||||
<item stringID="REGS" value="IFF1"/>
|
||||
<item stringID="IOB_Delay" value="0 / 3"/>
|
||||
</row>
|
||||
</table>
|
||||
</section>
|
||||
<section stringID="MAP_RPM_MACROS">
|
||||
<section stringID="MAP_SHAPE_SECTION">
|
||||
<item dataType="int" stringID="MAP_NUM_SHAPE" value="3"/>
|
||||
</section>
|
||||
</section>
|
||||
<section stringID="MAP_GUIDE_REPORT"/>
|
||||
<section stringID="MAP_AREA_GROUPS_PARTITIONS"/>
|
||||
<section stringID="MAP_TIMING_REPORT"/>
|
||||
<section stringID="MAP_CONFIGURATION_STRING_DETAILS"/>
|
||||
<section stringID="MAP_GENERAL_CONFIG_DATA"></section>
|
||||
<section stringID="MAP_CONTROL_SET_INFORMATION"/>
|
||||
</task>
|
||||
</application>
|
||||
|
||||
</document>
|
||||
38
UART/logic/build/uart_peripheral_par.xrpt
Normal file
38
UART/logic/build/uart_peripheral_par.xrpt
Normal file
@@ -0,0 +1,38 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
|
||||
<document OS="lin" product="ISE" version="10.1.03">
|
||||
|
||||
<!--The data in this file is primarily intended for consumption by Xilinx tools.
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="par" timeStamp="Thu Nov 11 14:38:20 2010">
|
||||
<task stringID="PAR_DEVICE_UTILIZATION">
|
||||
<section stringID="PAR_DESIGN_SUMMARY"></section>
|
||||
</task>
|
||||
<task stringID="PAR_PAR">
|
||||
<section stringID="PAR_DESIGN_SUMMARY">
|
||||
<item stringID="PAR_REAL_TIME_COMPLETION_ROUTER" value="40 secs "/>
|
||||
<item stringID="PAR_CPU_TIME_COMPLETION_ROUTER" value="36 secs "/>
|
||||
<item dataType="int" stringID="PAR_UNROUTES" value="0"/>
|
||||
<item dataType="float" stringID="PAR_TIMING_SCORE" value="0.000000"/>
|
||||
<item stringID="PAR_REAL_TIME_COMPLETION_PAR" value="41 secs "/>
|
||||
<item stringID="PAR_CPU_TIME_COMPLETION_PAR" value="37 secs "/>
|
||||
</section>
|
||||
</task>
|
||||
<task stringID="PAR_par">
|
||||
<section stringID="PAR_DLY_CLK_REPORT"/>
|
||||
<section stringID="PAR_CLOCK_REPORT">
|
||||
<table stringID="PAR_CLOCK_TABLE">
|
||||
<row stringID="row" value="1"></row>
|
||||
</table>
|
||||
</section>
|
||||
<section stringID="PAR_PAD_PIN_REPORT"></section>
|
||||
<section stringID="PAR_UNROUTES_REPORT">
|
||||
<item dataType="int" stringID="PAR_UNROUTED_NETS" value="0"/>
|
||||
<item dataType="int" stringID="PAR_TOTAL_SOURCELESS_NETS" value="0"/>
|
||||
<item dataType="int" stringID="PAR_TOTAL_LOADLESS_NETS" value="0"/>
|
||||
</section>
|
||||
</task>
|
||||
</application>
|
||||
|
||||
</document>
|
||||
BIN
UART/logic/build/xlnx_auto_0.ise
Normal file
BIN
UART/logic/build/xlnx_auto_0.ise
Normal file
Binary file not shown.
BIN
UART/logic/build/xlnx_auto_0_xdb/cst.xbcd
Normal file
BIN
UART/logic/build/xlnx_auto_0_xdb/cst.xbcd
Normal file
Binary file not shown.
BIN
UART/logic/build/xlnx_auto_0_xdb/tmp/ise.lock
Normal file
BIN
UART/logic/build/xlnx_auto_0_xdb/tmp/ise.lock
Normal file
Binary file not shown.
Binary file not shown.
Binary file not shown.
@@ -0,0 +1,24 @@
|
||||
CommandLine-Map
|
||||
|
||||
s
|
||||
CommandLine-Ngdbuild
|
||||
|
||||
s
|
||||
CommandLine-Par
|
||||
|
||||
s
|
||||
CommandLine-Xst
|
||||
|
||||
s
|
||||
Previous-NGD
|
||||
|
||||
s
|
||||
Previous-NGM
|
||||
|
||||
s
|
||||
Previous-Packed-NCD
|
||||
|
||||
s
|
||||
Previous-Routed-NCD
|
||||
|
||||
s
|
||||
@@ -0,0 +1,6 @@
|
||||
CommandLine
|
||||
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/bitgen project_r.ncd -l -w -g TdoPin:PULLNONE -g DonePin:PULLUP -g CRC:enable -g StartUpClk:CCLK
|
||||
s
|
||||
FormatString
|
||||
bitgen [-d] [-j] [-b] [-w] [-l] [-m] [-t] [-n] [-u] [-a] [--p] [-r <bitFile>] [-intstyle ise|xflow|silent] [-ise <projectrepositoryfile>] {-bd <BRAM_data_file> [tag <tagname>]} {-g <setting_value>} <infile[.ncd]> [<outfile>] [<pcffile[.pcf]>]
|
||||
s
|
||||
@@ -0,0 +1,6 @@
|
||||
CommandLine
|
||||
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/map -pr b -p xc3s500e-VQ100-4 project
|
||||
s
|
||||
FormatString
|
||||
map <infile[.ngd]> [-bp] [-c [<packfactor:0,100>]] [-cm <covermode>] [-detail] [-equivalent_register_removal on|off] [-global_opt off|&speed|&area|on] [-ignore_keep_hierarchy] [-intstyle ise|xflow|silent] [-ir] [-ise <iseProjectFile>] [-k 4|5|6|7|8] [-l] [-lc off|area|auto] [-logic_opt off|on] [-ntd] [-o <outfile[.ncd]>] [-ol std|med|high] [-p <partname>] [-power off|on] [-activityfile <activityfile[.vcd|.saif]>] [-pr off|i|o|b] [-r] [-register_duplication [off|on]] [-retiming off|on] [-smartguide <guide[.ncd]>] [-t <costtable:1,100>] [-timing] [-tx on|off|aggressive|limit] [-u] [-w] [-x] [-xe c|n] [--ds <doodlescript>] [--hv] [--lambda <inputlambda:1,15> <outputlambda:1,4>] [--m] [--ms <mapscript>] [--physical_synthesis off|on] [--smartsynthesis <value>] [--ts_comb <combll> <combul>] [--ts_cy <cyll> <cyul>] [--ts_load <load>] [--ts_trigger <trigger>] [--use_soft_locs] [--global_opt_script <file>] [<prffile[.pcf]>]
|
||||
s
|
||||
@@ -0,0 +1,6 @@
|
||||
CommandLine
|
||||
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/ngdbuild -p xc3s500e-VQ100-4 project.ngc -uc ../uart_peripheral.ucf
|
||||
s
|
||||
FormatString
|
||||
ngdbuild [-p <partname>] {-sd <source_dir>} {-l <library>} [-ur <rules_file[.urf]>] [-dd <output_dir>] [-r] [-a] [-u] [-nt timestamp|on|off] [-uc <ucf_file[.ucf]>] [-aul] [-bm <bmm_file[.bmm]>] [-i] [-modular initial|module|assemble] [-intstyle ise|xflow|silent] [-quiet] [-verbose] [-active <active_module_name>] [-pimpath <pimpath>] {-use_pim <pim_module_name>} [-insert_keep_hierarchy] [--forcengd] {--n <ngl_file>} {--sl <library>} [--global_opt] [--script <tcl_file>] [--incremental] [--csttrans] <design_name> [<ngd_file[.ngd]>]
|
||||
s
|
||||
@@ -0,0 +1,6 @@
|
||||
CommandLine
|
||||
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/par -w project project_r.ncd
|
||||
s
|
||||
FormatString
|
||||
par [-ol std|med|high] [-pl std|med|high] [-rl std|med|high] [-xe n|c] [-t <costtable:1,100>] [-p] [-k] [-r] [-w] [-smartguide <guidefile[.ncd]>] [-n <iterations:0,100>] [-s <savebest:1,100>] [-m <nodelistfile>] [-x] [-ub] [-nopad] [-power on|off] [-activityfile <activityfile[.vcd|.saif]>] [-ntd] [-intstyle ise|xflow|silent] [-ise <projectrepositoryfile>] [--strategy use_placement|keep_placement|ignore_placement]<infile[.ncd]> <outfile> [<constraintsfile[.pcf]>]
|
||||
s
|
||||
@@ -0,0 +1,6 @@
|
||||
MostRecentClient
|
||||
bitgen
|
||||
s
|
||||
SteInfoVersion
|
||||
0.0
|
||||
s
|
||||
@@ -0,0 +1,6 @@
|
||||
CommandLine
|
||||
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/trce -v 25 project_r.ncd project.pcf
|
||||
s
|
||||
FormatString
|
||||
trce ([-e|-v [<limit:0,2000000000>]] [-l <limit:0,2000000000>] [-n [<limit:0,2000000000>]] [-u [<limit:0,2000000000>]] [-skew] [-a] [--p] [-s <speed>] [-o <report[.twr]>] [--m] [-stamp <stampfile>] [-tsi <tsifile[.tsi]>] [-xml <report[.twx]>] [-nodatasheet] [-timegroups] [-fastpaths] [-intstyle ise|xflow|silent] [-ise <projectfile>] [--ucf <constraint[.ucf]>] <design[.ncd]> [<constraint[.pcf]>]) | ([-run <macro[.xtm]> [<design[.ncd]> [<constraint[.pcf]>]]] [-intstyle ise|xflow|silent] [-ise <projectfile>])
|
||||
s
|
||||
@@ -0,0 +1,6 @@
|
||||
CommandLine
|
||||
/opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/xst -ifn project.xst -ofn project.log -finalclean 1
|
||||
s
|
||||
FormatString
|
||||
xst [-ifn <InputFile>] [-ofn <OutputFile>] [-ise <iseProjectFile>] [--quiet] [-intstyle <Style>] [--deb <DebugLevel>] [--finalclean <Clean>] [--PcubeFlow] [--globOptFlow] [--XstNtrc]
|
||||
s
|
||||
@@ -0,0 +1,21 @@
|
||||
ISE_VERSION_CREATED_WITH
|
||||
10.1.03
|
||||
s
|
||||
ISE_VERSION_LAST_SAVED_WITH
|
||||
10.1.03
|
||||
s
|
||||
LastRepoDir
|
||||
/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/logic/build/
|
||||
s
|
||||
OBJSTORE_VERSION
|
||||
1.3
|
||||
s
|
||||
PROJECT_CREATION_TIMESTAMP
|
||||
2010-11-11T14:37:07
|
||||
s
|
||||
REGISTRY_VERSION
|
||||
1.1
|
||||
s
|
||||
REPOSITORY_VERSION
|
||||
1.1
|
||||
s
|
||||
10
UART/logic/build/xlnx_auto_0_xdb/tmp/ise/version
Normal file
10
UART/logic/build/xlnx_auto_0_xdb/tmp/ise/version
Normal file
@@ -0,0 +1,10 @@
|
||||
REPOSITORY_VERSION
|
||||
1.1
|
||||
REGISTRY_VERSION
|
||||
1.1
|
||||
OBJSTORE_VERSION
|
||||
1.3
|
||||
ISE_VERSION_CREATED_WITH
|
||||
10.1.03
|
||||
ISE_VERSION_LAST_SAVED_WITH
|
||||
10.1.03
|
||||
17
UART/logic/build/xst/work/hdllib.ref
Normal file
17
UART/logic/build/xst/work/hdllib.ref
Normal file
@@ -0,0 +1,17 @@
|
||||
MO UART NULL ../uart.v vlg48/_u_a_r_t.bin 1289504228
|
||||
MO pc_bufftx NULL ../uart.v vlg1D/pc__bufftx.bin 1289504228
|
||||
MO pc_ctrl_tx_pc NULL ../uart.v vlg78/pc__ctrl__tx__pc.bin 1289504228
|
||||
MO pc_ifrxd NULL ../uart.v vlg5B/pc__ifrxd.bin 1289504228
|
||||
MO pc_ier NULL ../uart.v vlg72/pc__ier.bin 1289504228
|
||||
MO pc_muestreo NULL ../uart.v vlg1E/pc__muestreo.bin 1289504228
|
||||
MO pc_dato_rdy NULL ../uart.v vlg70/pc__dato__rdy.bin 1289504228
|
||||
MO pc_ctrl_rx NULL ../uart.v vlg6C/pc__ctrl__rx.bin 1289504228
|
||||
MO pc_div16 NULL ../uart.v vlg70/pc__div16.bin 1289504228
|
||||
MO pc_div27 NULL ../uart.v vlg76/pc__div27.bin 1289504228
|
||||
MO uart_peripheral NULL ../uart_peripheral.v vlg1B/uart__peripheral.bin 1289504228
|
||||
MO pc_lcr NULL ../uart.v vlg33/pc__lcr.bin 1289504228
|
||||
MO pc_isr NULL ../uart.v vlg38/pc__isr.bin 1289504228
|
||||
MO pc_buffrx_pc NULL ../uart.v vlg21/pc__buffrx__pc.bin 1289504228
|
||||
MO pc_div_ms NULL ../uart.v vlg34/pc__div__ms.bin 1289504228
|
||||
MO pc_if_arm_pc NULL ../uart.v vlg7E/pc__if__arm__pc.bin 1289504228
|
||||
MO pc_pulso NULL ../uart.v vlg21/pc__pulso.bin 1289504228
|
||||
BIN
UART/logic/build/xst/work/vlg1B/uart__peripheral.bin
Normal file
BIN
UART/logic/build/xst/work/vlg1B/uart__peripheral.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg1D/pc__bufftx.bin
Normal file
BIN
UART/logic/build/xst/work/vlg1D/pc__bufftx.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg1E/pc__muestreo.bin
Normal file
BIN
UART/logic/build/xst/work/vlg1E/pc__muestreo.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg21/pc__buffrx__pc.bin
Normal file
BIN
UART/logic/build/xst/work/vlg21/pc__buffrx__pc.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg21/pc__pulso.bin
Normal file
BIN
UART/logic/build/xst/work/vlg21/pc__pulso.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg33/pc__lcr.bin
Normal file
BIN
UART/logic/build/xst/work/vlg33/pc__lcr.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg34/pc__div__ms.bin
Normal file
BIN
UART/logic/build/xst/work/vlg34/pc__div__ms.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg38/pc__isr.bin
Normal file
BIN
UART/logic/build/xst/work/vlg38/pc__isr.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg48/_u_a_r_t.bin
Normal file
BIN
UART/logic/build/xst/work/vlg48/_u_a_r_t.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg5B/pc__ifrxd.bin
Normal file
BIN
UART/logic/build/xst/work/vlg5B/pc__ifrxd.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg6C/pc__ctrl__rx.bin
Normal file
BIN
UART/logic/build/xst/work/vlg6C/pc__ctrl__rx.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg70/pc__dato__rdy.bin
Normal file
BIN
UART/logic/build/xst/work/vlg70/pc__dato__rdy.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg70/pc__div16.bin
Normal file
BIN
UART/logic/build/xst/work/vlg70/pc__div16.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg72/pc__ier.bin
Normal file
BIN
UART/logic/build/xst/work/vlg72/pc__ier.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg76/pc__div27.bin
Normal file
BIN
UART/logic/build/xst/work/vlg76/pc__div27.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg78/pc__ctrl__tx__pc.bin
Normal file
BIN
UART/logic/build/xst/work/vlg78/pc__ctrl__tx__pc.bin
Normal file
Binary file not shown.
BIN
UART/logic/build/xst/work/vlg7E/pc__if__arm__pc.bin
Normal file
BIN
UART/logic/build/xst/work/vlg7E/pc__if__arm__pc.bin
Normal file
Binary file not shown.
1319
UART/logic/uart.v
Normal file
1319
UART/logic/uart.v
Normal file
File diff suppressed because it is too large
Load Diff
BIN
UART/logic/uart_peripheral.bit
Normal file
BIN
UART/logic/uart_peripheral.bit
Normal file
Binary file not shown.
35
UART/logic/uart_peripheral.ucf
Normal file
35
UART/logic/uart_peripheral.ucf
Normal file
@@ -0,0 +1,35 @@
|
||||
NET clk LOC = "P38";
|
||||
NET reset LOC = "P30";
|
||||
NET led LOC = "P44";
|
||||
NET TxD LOC = "P67";#To MAX-232
|
||||
NET RxD LOC = "P68";
|
||||
NET irq_pin LOC = "P71";
|
||||
|
||||
#ADDRESS BUS
|
||||
|
||||
NET "addr<2>" LOC = "P79";
|
||||
NET "addr<1>" LOC = "P83";
|
||||
NET "addr<0>" LOC = "P84";
|
||||
|
||||
#DATA BUS
|
||||
NET "sram_data<7>" LOC = "P4";
|
||||
NET "sram_data<6>" LOC = "P5";
|
||||
NET "sram_data<5>" LOC = "P9";
|
||||
NET "sram_data<4>" LOC = "P10";
|
||||
NET "sram_data<3>" LOC = "P11";
|
||||
NET "sram_data<2>" LOC = "P12";
|
||||
NET "sram_data<1>" LOC = "P15";
|
||||
NET "sram_data<0>" LOC = "P16";
|
||||
|
||||
#CONTROL BUS
|
||||
NET "nwe" LOC = "P88";
|
||||
NET "noe" LOC = "P86";
|
||||
NET "ncs" LOC = "P69";
|
||||
|
||||
#ADC
|
||||
#NET "ADC_EOC" LOC = "P17";
|
||||
#NET "ADC_SCLK" LOC = "P18";
|
||||
#NET "ADC_SDIN" LOC = "P22";
|
||||
#NET "ADC_SDOUT" LOC = "P23";
|
||||
#NET "ADC_CS" LOC = "P24";
|
||||
#NET "ADC_CSTART" LOC = "P26";
|
||||
85
UART/logic/uart_peripheral.v
Normal file
85
UART/logic/uart_peripheral.v
Normal file
@@ -0,0 +1,85 @@
|
||||
`timescale 1ns / 1ps
|
||||
module uart_peripheral(clk, sram_data, addr, nwe, ncs, noe, reset, led, RxD,TxD,irq_pin,RxD2,TxD2);
|
||||
parameter B = (7);
|
||||
|
||||
input clk, nwe, ncs, noe, reset,RxD,RxD2;
|
||||
input [2:0] addr;
|
||||
inout [B:0] sram_data;
|
||||
output led,TxD,TxD2;
|
||||
output irq_pin;
|
||||
wire [6:0] ISRC_LP;
|
||||
// synchronize signals
|
||||
reg sncs, snwe;
|
||||
reg [12:0] buffer_addr;
|
||||
reg [B:0] buffer_data;
|
||||
reg [23:0] counter;
|
||||
// interfaz fpga signals
|
||||
// wire [12:0] addr;
|
||||
|
||||
// bram interfaz signals
|
||||
reg we;
|
||||
reg w_st;
|
||||
wire [7:0] RD;
|
||||
reg [B:0] wdBus;
|
||||
wire [B:0] rdBus;
|
||||
// interefaz signals assignments
|
||||
wire T = ~noe | ncs;
|
||||
assign sram_data = T?8'bZ:rdBus;
|
||||
assign out=irq_pin;
|
||||
//--------------------------------------------------------------------------
|
||||
|
||||
// synchronize assignment
|
||||
always @(negedge clk)
|
||||
begin
|
||||
sncs <= ncs;
|
||||
snwe <= nwe;
|
||||
buffer_data <= sram_data;
|
||||
buffer_addr <= addr;
|
||||
end
|
||||
|
||||
// write access cpu to bram
|
||||
always @(posedge clk)
|
||||
if(~reset) {w_st, we, wdBus} <= 0;
|
||||
else begin
|
||||
wdBus <= buffer_data;
|
||||
case (w_st)
|
||||
0: begin
|
||||
we <= 0;
|
||||
if(sncs | snwe) w_st <= 1;
|
||||
end
|
||||
1: begin
|
||||
if(~(sncs | snwe)) begin
|
||||
we <= 1;
|
||||
w_st <= 0;
|
||||
end
|
||||
else we <= 0;
|
||||
end
|
||||
endcase
|
||||
end
|
||||
|
||||
|
||||
|
||||
//the UART Module
|
||||
UART UART(
|
||||
.CLK(clk),
|
||||
.reset(~reset),
|
||||
.CS(~sncs),
|
||||
.nRW(we),
|
||||
.data_in(wdBus),
|
||||
.data_out(rdBus),
|
||||
.RxD(RxD),
|
||||
.TxD(TxD),
|
||||
.add(buffer_addr),
|
||||
.nIRQ(irq_pin)
|
||||
);
|
||||
|
||||
always @(posedge clk) begin
|
||||
if (~reset)
|
||||
counter <= {24{1'b0}};
|
||||
else
|
||||
counter <= counter + 1;
|
||||
end
|
||||
assign led = counter[23];
|
||||
|
||||
|
||||
endmodule
|
||||
1
UART/src/.8250_fpga.ko.cmd
Normal file
1
UART/src/.8250_fpga.ko.cmd
Normal file
@@ -0,0 +1 @@
|
||||
cmd_/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.ko := mipsel-openwrt-linux-ld -r -m elf32ltsmip -T /home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/scripts/module-common.lds --build-id -o /home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.ko /home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.o /home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.mod.o
|
||||
340
UART/src/.8250_fpga.mod.o.cmd
Normal file
340
UART/src/.8250_fpga.mod.o.cmd
Normal file
@@ -0,0 +1,340 @@
|
||||
cmd_/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.mod.o := mipsel-openwrt-linux-gcc -Wp,-MD,/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/.8250_fpga.mod.o.d -nostdinc -isystem /home/cain/Embedded/ingenic/sakc/openwrt-xburst/staging_dir/toolchain-mipsel_gcc-4.3.3+cs_uClibc-0.9.32/usr/lib/gcc/mipsel-openwrt-linux-uclibc/4.3.3/include -Iinclude -I/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include -include include/linux/autoconf.h -D__KERNEL__ -D"VMLINUX_LOAD_ADDRESS=0xffffffff80010000" -D"DATAOFFSET=0" -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -O2 -fno-reorder-blocks -fno-tree-ch -ffunction-sections -mno-check-zero-division -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=mips32 -Wa,-mips32 -Wa,--trap -I/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-jz4740 -I/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic -fno-stack-protector -fomit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-strict-overflow -Wall -D"KBUILD_STR(s)=\#s" -D"KBUILD_BASENAME=KBUILD_STR(8250_fpga.mod)" -D"KBUILD_MODNAME=KBUILD_STR(8250_fpga)" -DMODULE -mno-long-calls -c -o /home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.mod.o /home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.mod.c
|
||||
|
||||
deps_/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.mod.o := \
|
||||
/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.mod.c \
|
||||
$(wildcard include/config/module/unload.h) \
|
||||
include/linux/module.h \
|
||||
$(wildcard include/config/modules.h) \
|
||||
$(wildcard include/config/modversions.h) \
|
||||
$(wildcard include/config/unused/symbols.h) \
|
||||
$(wildcard include/config/generic/bug.h) \
|
||||
$(wildcard include/config/kallsyms.h) \
|
||||
$(wildcard include/config/tracepoints.h) \
|
||||
$(wildcard include/config/tracing.h) \
|
||||
$(wildcard include/config/event/tracing.h) \
|
||||
$(wildcard include/config/ftrace/mcount/record.h) \
|
||||
$(wildcard include/config/smp.h) \
|
||||
$(wildcard include/config/constructors.h) \
|
||||
$(wildcard include/config/sysfs.h) \
|
||||
include/linux/list.h \
|
||||
$(wildcard include/config/debug/list.h) \
|
||||
include/linux/stddef.h \
|
||||
include/linux/compiler.h \
|
||||
$(wildcard include/config/trace/branch/profiling.h) \
|
||||
$(wildcard include/config/profile/all/branches.h) \
|
||||
$(wildcard include/config/enable/must/check.h) \
|
||||
$(wildcard include/config/enable/warn/deprecated.h) \
|
||||
include/linux/compiler-gcc.h \
|
||||
$(wildcard include/config/arch/supports/optimized/inlining.h) \
|
||||
$(wildcard include/config/optimize/inlining.h) \
|
||||
include/linux/compiler-gcc4.h \
|
||||
include/linux/poison.h \
|
||||
$(wildcard include/config/illegal/pointer/value.h) \
|
||||
include/linux/prefetch.h \
|
||||
include/linux/types.h \
|
||||
$(wildcard include/config/uid16.h) \
|
||||
$(wildcard include/config/lbdaf.h) \
|
||||
$(wildcard include/config/phys/addr/t/64bit.h) \
|
||||
$(wildcard include/config/64bit.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/types.h \
|
||||
$(wildcard include/config/highmem.h) \
|
||||
$(wildcard include/config/64bit/phys/addr.h) \
|
||||
include/asm-generic/int-ll64.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/bitsperlong.h \
|
||||
include/asm-generic/bitsperlong.h \
|
||||
include/linux/posix_types.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/posix_types.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/sgidefs.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/processor.h \
|
||||
$(wildcard include/config/32bit.h) \
|
||||
$(wildcard include/config/cpu/cavium/octeon.h) \
|
||||
$(wildcard include/config/cavium/octeon/cvmseg/size.h) \
|
||||
$(wildcard include/config/mips/mt/fpaff.h) \
|
||||
$(wildcard include/config/cpu/has/prefetch.h) \
|
||||
include/linux/cpumask.h \
|
||||
$(wildcard include/config/cpumask/offstack.h) \
|
||||
$(wildcard include/config/hotplug/cpu.h) \
|
||||
$(wildcard include/config/debug/per/cpu/maps.h) \
|
||||
$(wildcard include/config/disable/obsolete/cpumask/functions.h) \
|
||||
include/linux/kernel.h \
|
||||
$(wildcard include/config/preempt/voluntary.h) \
|
||||
$(wildcard include/config/debug/spinlock/sleep.h) \
|
||||
$(wildcard include/config/prove/locking.h) \
|
||||
$(wildcard include/config/printk.h) \
|
||||
$(wildcard include/config/dynamic/debug.h) \
|
||||
$(wildcard include/config/ring/buffer.h) \
|
||||
$(wildcard include/config/numa.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/staging_dir/toolchain-mipsel_gcc-4.3.3+cs_uClibc-0.9.32/usr/lib/gcc/mipsel-openwrt-linux-uclibc/4.3.3/include/stdarg.h \
|
||||
include/linux/linkage.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/linkage.h \
|
||||
include/linux/bitops.h \
|
||||
$(wildcard include/config/generic/find/first/bit.h) \
|
||||
$(wildcard include/config/generic/find/last/bit.h) \
|
||||
$(wildcard include/config/generic/find/next/bit.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/bitops.h \
|
||||
$(wildcard include/config/cpu/mipsr2.h) \
|
||||
include/linux/irqflags.h \
|
||||
$(wildcard include/config/trace/irqflags.h) \
|
||||
$(wildcard include/config/irqsoff/tracer.h) \
|
||||
$(wildcard include/config/preempt/tracer.h) \
|
||||
$(wildcard include/config/trace/irqflags/support.h) \
|
||||
$(wildcard include/config/x86.h) \
|
||||
include/linux/typecheck.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/irqflags.h \
|
||||
$(wildcard include/config/mips/mt/smtc.h) \
|
||||
$(wildcard include/config/irq/cpu.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/hazards.h \
|
||||
$(wildcard include/config/cpu/mipsr1.h) \
|
||||
$(wildcard include/config/mach/alchemy.h) \
|
||||
$(wildcard include/config/cpu/loongson2.h) \
|
||||
$(wildcard include/config/cpu/r10000.h) \
|
||||
$(wildcard include/config/cpu/r5500.h) \
|
||||
$(wildcard include/config/cpu/rm9000.h) \
|
||||
$(wildcard include/config/cpu/sb1.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cpu-features.h \
|
||||
$(wildcard include/config/cpu/mipsr2/irq/vi.h) \
|
||||
$(wildcard include/config/cpu/mipsr2/irq/ei.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cpu.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cpu-info.h \
|
||||
$(wildcard include/config/mips/mt/smp.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cache.h \
|
||||
$(wildcard include/config/mips/l1/cache/shift.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/kmalloc.h \
|
||||
$(wildcard include/config/dma/coherent.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/cpu-feature-overrides.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/barrier.h \
|
||||
$(wildcard include/config/cpu/has/sync.h) \
|
||||
$(wildcard include/config/sgi/ip28.h) \
|
||||
$(wildcard include/config/cpu/has/wb.h) \
|
||||
$(wildcard include/config/weak/ordering.h) \
|
||||
$(wildcard include/config/weak/reordering/beyond/llsc.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/bug.h \
|
||||
$(wildcard include/config/bug.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/break.h \
|
||||
include/asm-generic/bug.h \
|
||||
$(wildcard include/config/generic/bug/relative/pointers.h) \
|
||||
$(wildcard include/config/debug/bugverbose.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/byteorder.h \
|
||||
include/linux/byteorder/little_endian.h \
|
||||
include/linux/swab.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/swab.h \
|
||||
include/linux/byteorder/generic.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/war.h \
|
||||
$(wildcard include/config/cpu/r4000/workarounds.h) \
|
||||
$(wildcard include/config/cpu/r4400/workarounds.h) \
|
||||
$(wildcard include/config/cpu/daddi/workarounds.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-jz4740/war.h \
|
||||
include/asm-generic/bitops/non-atomic.h \
|
||||
include/asm-generic/bitops/fls64.h \
|
||||
include/asm-generic/bitops/ffz.h \
|
||||
include/asm-generic/bitops/find.h \
|
||||
include/asm-generic/bitops/sched.h \
|
||||
include/asm-generic/bitops/hweight.h \
|
||||
include/asm-generic/bitops/ext2-non-atomic.h \
|
||||
include/asm-generic/bitops/le.h \
|
||||
include/asm-generic/bitops/ext2-atomic.h \
|
||||
include/asm-generic/bitops/minix.h \
|
||||
include/linux/log2.h \
|
||||
$(wildcard include/config/arch/has/ilog2/u32.h) \
|
||||
$(wildcard include/config/arch/has/ilog2/u64.h) \
|
||||
include/linux/ratelimit.h \
|
||||
include/linux/param.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/param.h \
|
||||
$(wildcard include/config/hz.h) \
|
||||
include/linux/dynamic_debug.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/div64.h \
|
||||
include/asm-generic/div64.h \
|
||||
include/linux/threads.h \
|
||||
$(wildcard include/config/nr/cpus.h) \
|
||||
$(wildcard include/config/base/small.h) \
|
||||
include/linux/bitmap.h \
|
||||
include/linux/string.h \
|
||||
$(wildcard include/config/binary/printf.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/string.h \
|
||||
$(wildcard include/config/cpu/r3000.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cachectl.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mipsregs.h \
|
||||
$(wildcard include/config/cpu/vr41xx.h) \
|
||||
$(wildcard include/config/page/size/4kb.h) \
|
||||
$(wildcard include/config/page/size/8kb.h) \
|
||||
$(wildcard include/config/page/size/16kb.h) \
|
||||
$(wildcard include/config/page/size/32kb.h) \
|
||||
$(wildcard include/config/page/size/64kb.h) \
|
||||
$(wildcard include/config/hugetlb/page.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/prefetch.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/system.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/addrspace.h \
|
||||
$(wildcard include/config/cpu/r8000.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/spaces.h \
|
||||
$(wildcard include/config/dma/noncoherent.h) \
|
||||
include/linux/const.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cmpxchg.h \
|
||||
include/asm-generic/cmpxchg-local.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/dsp.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/watch.h \
|
||||
$(wildcard include/config/hardware/watchpoints.h) \
|
||||
include/linux/stat.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/stat.h \
|
||||
include/linux/time.h \
|
||||
$(wildcard include/config/arch/uses/gettimeoffset.h) \
|
||||
include/linux/cache.h \
|
||||
$(wildcard include/config/arch/has/cache/line/size.h) \
|
||||
include/linux/seqlock.h \
|
||||
include/linux/spinlock.h \
|
||||
$(wildcard include/config/debug/spinlock.h) \
|
||||
$(wildcard include/config/generic/lockbreak.h) \
|
||||
$(wildcard include/config/preempt.h) \
|
||||
$(wildcard include/config/debug/lock/alloc.h) \
|
||||
include/linux/preempt.h \
|
||||
$(wildcard include/config/debug/preempt.h) \
|
||||
$(wildcard include/config/preempt/notifiers.h) \
|
||||
include/linux/thread_info.h \
|
||||
$(wildcard include/config/compat.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/thread_info.h \
|
||||
$(wildcard include/config/debug/stack/usage.h) \
|
||||
$(wildcard include/config/mips32/o32.h) \
|
||||
$(wildcard include/config/mips32/n32.h) \
|
||||
include/linux/stringify.h \
|
||||
include/linux/bottom_half.h \
|
||||
include/linux/spinlock_types.h \
|
||||
include/linux/spinlock_types_up.h \
|
||||
include/linux/lockdep.h \
|
||||
$(wildcard include/config/lockdep.h) \
|
||||
$(wildcard include/config/lock/stat.h) \
|
||||
$(wildcard include/config/generic/hardirqs.h) \
|
||||
include/linux/spinlock_up.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/atomic.h \
|
||||
include/asm-generic/atomic-long.h \
|
||||
include/linux/spinlock_api_up.h \
|
||||
include/linux/math64.h \
|
||||
include/linux/kmod.h \
|
||||
include/linux/gfp.h \
|
||||
$(wildcard include/config/kmemcheck.h) \
|
||||
$(wildcard include/config/zone/dma.h) \
|
||||
$(wildcard include/config/zone/dma32.h) \
|
||||
$(wildcard include/config/debug/vm.h) \
|
||||
include/linux/mmzone.h \
|
||||
$(wildcard include/config/force/max/zoneorder.h) \
|
||||
$(wildcard include/config/memory/hotplug.h) \
|
||||
$(wildcard include/config/sparsemem.h) \
|
||||
$(wildcard include/config/arch/populates/node/map.h) \
|
||||
$(wildcard include/config/discontigmem.h) \
|
||||
$(wildcard include/config/flat/node/mem/map.h) \
|
||||
$(wildcard include/config/cgroup/mem/res/ctlr.h) \
|
||||
$(wildcard include/config/have/memory/present.h) \
|
||||
$(wildcard include/config/need/node/memmap/size.h) \
|
||||
$(wildcard include/config/need/multiple/nodes.h) \
|
||||
$(wildcard include/config/have/arch/early/pfn/to/nid.h) \
|
||||
$(wildcard include/config/flatmem.h) \
|
||||
$(wildcard include/config/sparsemem/extreme.h) \
|
||||
$(wildcard include/config/nodes/span/other/nodes.h) \
|
||||
$(wildcard include/config/holes/in/zone.h) \
|
||||
$(wildcard include/config/arch/has/holes/memorymodel.h) \
|
||||
include/linux/wait.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/current.h \
|
||||
include/linux/numa.h \
|
||||
$(wildcard include/config/nodes/shift.h) \
|
||||
include/linux/init.h \
|
||||
$(wildcard include/config/hotplug.h) \
|
||||
include/linux/nodemask.h \
|
||||
include/linux/pageblock-flags.h \
|
||||
$(wildcard include/config/hugetlb/page/size/variable.h) \
|
||||
include/linux/bounds.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/page.h \
|
||||
$(wildcard include/config/cpu/mips32.h) \
|
||||
include/linux/pfn.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/io.h \
|
||||
include/asm-generic/iomap.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/pgtable-bits.h \
|
||||
$(wildcard include/config/cpu/tx39xx.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/ioremap.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/mangle-port.h \
|
||||
$(wildcard include/config/swap/io/space.h) \
|
||||
include/asm-generic/memory_model.h \
|
||||
$(wildcard include/config/sparsemem/vmemmap.h) \
|
||||
include/asm-generic/getorder.h \
|
||||
include/linux/memory_hotplug.h \
|
||||
$(wildcard include/config/have/arch/nodedata/extension.h) \
|
||||
$(wildcard include/config/memory/hotremove.h) \
|
||||
include/linux/notifier.h \
|
||||
include/linux/errno.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/errno.h \
|
||||
include/asm-generic/errno-base.h \
|
||||
include/linux/mutex.h \
|
||||
$(wildcard include/config/debug/mutexes.h) \
|
||||
include/linux/rwsem.h \
|
||||
$(wildcard include/config/rwsem/generic/spinlock.h) \
|
||||
include/linux/rwsem-spinlock.h \
|
||||
include/linux/srcu.h \
|
||||
include/linux/topology.h \
|
||||
$(wildcard include/config/sched/smt.h) \
|
||||
$(wildcard include/config/sched/mc.h) \
|
||||
include/linux/smp.h \
|
||||
$(wildcard include/config/use/generic/smp/helpers.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/topology.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/topology.h \
|
||||
include/asm-generic/topology.h \
|
||||
include/linux/mmdebug.h \
|
||||
$(wildcard include/config/debug/virtual.h) \
|
||||
include/linux/elf.h \
|
||||
include/linux/elf-em.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/elf.h \
|
||||
$(wildcard include/config/mips32/compat.h) \
|
||||
include/linux/kobject.h \
|
||||
include/linux/sysfs.h \
|
||||
include/linux/kref.h \
|
||||
include/linux/moduleparam.h \
|
||||
$(wildcard include/config/alpha.h) \
|
||||
$(wildcard include/config/ia64.h) \
|
||||
$(wildcard include/config/ppc64.h) \
|
||||
include/linux/tracepoint.h \
|
||||
include/linux/rcupdate.h \
|
||||
$(wildcard include/config/tree/preempt/rcu.h) \
|
||||
$(wildcard include/config/tree/rcu.h) \
|
||||
include/linux/completion.h \
|
||||
include/linux/rcutree.h \
|
||||
$(wildcard include/config/no/hz.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/local.h \
|
||||
include/linux/percpu.h \
|
||||
$(wildcard include/config/have/legacy/per/cpu/area.h) \
|
||||
$(wildcard include/config/need/per/cpu/embed/first/chunk.h) \
|
||||
$(wildcard include/config/need/per/cpu/page/first/chunk.h) \
|
||||
$(wildcard include/config/debug/kmemleak.h) \
|
||||
$(wildcard include/config/have/setup/per/cpu/area.h) \
|
||||
include/linux/slab.h \
|
||||
$(wildcard include/config/slab/debug.h) \
|
||||
$(wildcard include/config/debug/objects.h) \
|
||||
$(wildcard include/config/slub.h) \
|
||||
$(wildcard include/config/slob.h) \
|
||||
$(wildcard include/config/debug/slab.h) \
|
||||
include/linux/slab_def.h \
|
||||
$(wildcard include/config/kmemtrace.h) \
|
||||
include/linux/kmemtrace.h \
|
||||
include/trace/events/kmem.h \
|
||||
include/trace/define_trace.h \
|
||||
include/linux/kmalloc_sizes.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/percpu.h \
|
||||
include/asm-generic/percpu.h \
|
||||
include/linux/percpu-defs.h \
|
||||
$(wildcard include/config/debug/force/weak/per/cpu.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/module.h \
|
||||
$(wildcard include/config/cpu/mips32/r1.h) \
|
||||
$(wildcard include/config/cpu/mips32/r2.h) \
|
||||
$(wildcard include/config/cpu/mips64/r1.h) \
|
||||
$(wildcard include/config/cpu/mips64/r2.h) \
|
||||
$(wildcard include/config/cpu/r4300.h) \
|
||||
$(wildcard include/config/cpu/r4x00.h) \
|
||||
$(wildcard include/config/cpu/tx49xx.h) \
|
||||
$(wildcard include/config/cpu/r5000.h) \
|
||||
$(wildcard include/config/cpu/r5432.h) \
|
||||
$(wildcard include/config/cpu/r6000.h) \
|
||||
$(wildcard include/config/cpu/nevada.h) \
|
||||
$(wildcard include/config/cpu/rm7000.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/uaccess.h \
|
||||
include/trace/events/module.h \
|
||||
include/linux/vermagic.h \
|
||||
include/linux/utsrelease.h \
|
||||
|
||||
/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.mod.o: $(deps_/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.mod.o)
|
||||
|
||||
$(deps_/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.mod.o):
|
||||
543
UART/src/.8250_fpga.o.cmd
Normal file
543
UART/src/.8250_fpga.o.cmd
Normal file
@@ -0,0 +1,543 @@
|
||||
cmd_/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.o := mipsel-openwrt-linux-gcc -Wp,-MD,/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/.8250_fpga.o.d -nostdinc -isystem /home/cain/Embedded/ingenic/sakc/openwrt-xburst/staging_dir/toolchain-mipsel_gcc-4.3.3+cs_uClibc-0.9.32/usr/lib/gcc/mipsel-openwrt-linux-uclibc/4.3.3/include -Iinclude -I/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include -include include/linux/autoconf.h -D__KERNEL__ -D"VMLINUX_LOAD_ADDRESS=0xffffffff80010000" -D"DATAOFFSET=0" -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -O2 -fno-reorder-blocks -fno-tree-ch -ffunction-sections -mno-check-zero-division -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=mips32 -Wa,-mips32 -Wa,--trap -I/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-jz4740 -I/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic -fno-stack-protector -fomit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-strict-overflow -Wall -DMODULE -mno-long-calls -D"KBUILD_STR(s)=\#s" -D"KBUILD_BASENAME=KBUILD_STR(8250_fpga)" -D"KBUILD_MODNAME=KBUILD_STR(8250_fpga)" -c -o /home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.o /home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.c
|
||||
|
||||
deps_/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.o := \
|
||||
/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.c \
|
||||
$(wildcard include/config/type.h) \
|
||||
include/linux/kernel.h \
|
||||
$(wildcard include/config/lbdaf.h) \
|
||||
$(wildcard include/config/preempt/voluntary.h) \
|
||||
$(wildcard include/config/debug/spinlock/sleep.h) \
|
||||
$(wildcard include/config/prove/locking.h) \
|
||||
$(wildcard include/config/printk.h) \
|
||||
$(wildcard include/config/dynamic/debug.h) \
|
||||
$(wildcard include/config/ring/buffer.h) \
|
||||
$(wildcard include/config/tracing.h) \
|
||||
$(wildcard include/config/numa.h) \
|
||||
$(wildcard include/config/ftrace/mcount/record.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/staging_dir/toolchain-mipsel_gcc-4.3.3+cs_uClibc-0.9.32/usr/lib/gcc/mipsel-openwrt-linux-uclibc/4.3.3/include/stdarg.h \
|
||||
include/linux/linkage.h \
|
||||
include/linux/compiler.h \
|
||||
$(wildcard include/config/trace/branch/profiling.h) \
|
||||
$(wildcard include/config/profile/all/branches.h) \
|
||||
$(wildcard include/config/enable/must/check.h) \
|
||||
$(wildcard include/config/enable/warn/deprecated.h) \
|
||||
include/linux/compiler-gcc.h \
|
||||
$(wildcard include/config/arch/supports/optimized/inlining.h) \
|
||||
$(wildcard include/config/optimize/inlining.h) \
|
||||
include/linux/compiler-gcc4.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/linkage.h \
|
||||
include/linux/stddef.h \
|
||||
include/linux/types.h \
|
||||
$(wildcard include/config/uid16.h) \
|
||||
$(wildcard include/config/phys/addr/t/64bit.h) \
|
||||
$(wildcard include/config/64bit.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/types.h \
|
||||
$(wildcard include/config/highmem.h) \
|
||||
$(wildcard include/config/64bit/phys/addr.h) \
|
||||
include/asm-generic/int-ll64.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/bitsperlong.h \
|
||||
include/asm-generic/bitsperlong.h \
|
||||
include/linux/posix_types.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/posix_types.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/sgidefs.h \
|
||||
include/linux/bitops.h \
|
||||
$(wildcard include/config/generic/find/first/bit.h) \
|
||||
$(wildcard include/config/generic/find/last/bit.h) \
|
||||
$(wildcard include/config/generic/find/next/bit.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/bitops.h \
|
||||
$(wildcard include/config/cpu/mipsr2.h) \
|
||||
include/linux/irqflags.h \
|
||||
$(wildcard include/config/trace/irqflags.h) \
|
||||
$(wildcard include/config/irqsoff/tracer.h) \
|
||||
$(wildcard include/config/preempt/tracer.h) \
|
||||
$(wildcard include/config/trace/irqflags/support.h) \
|
||||
$(wildcard include/config/x86.h) \
|
||||
include/linux/typecheck.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/irqflags.h \
|
||||
$(wildcard include/config/mips/mt/smtc.h) \
|
||||
$(wildcard include/config/irq/cpu.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/hazards.h \
|
||||
$(wildcard include/config/cpu/cavium/octeon.h) \
|
||||
$(wildcard include/config/cpu/mipsr1.h) \
|
||||
$(wildcard include/config/mach/alchemy.h) \
|
||||
$(wildcard include/config/cpu/loongson2.h) \
|
||||
$(wildcard include/config/cpu/r10000.h) \
|
||||
$(wildcard include/config/cpu/r5500.h) \
|
||||
$(wildcard include/config/cpu/rm9000.h) \
|
||||
$(wildcard include/config/cpu/sb1.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cpu-features.h \
|
||||
$(wildcard include/config/smp.h) \
|
||||
$(wildcard include/config/32bit.h) \
|
||||
$(wildcard include/config/cpu/mipsr2/irq/vi.h) \
|
||||
$(wildcard include/config/cpu/mipsr2/irq/ei.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cpu.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cpu-info.h \
|
||||
$(wildcard include/config/mips/mt/smp.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cache.h \
|
||||
$(wildcard include/config/mips/l1/cache/shift.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/kmalloc.h \
|
||||
$(wildcard include/config/dma/coherent.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/cpu-feature-overrides.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/barrier.h \
|
||||
$(wildcard include/config/cpu/has/sync.h) \
|
||||
$(wildcard include/config/sgi/ip28.h) \
|
||||
$(wildcard include/config/cpu/has/wb.h) \
|
||||
$(wildcard include/config/weak/ordering.h) \
|
||||
$(wildcard include/config/weak/reordering/beyond/llsc.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/bug.h \
|
||||
$(wildcard include/config/bug.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/break.h \
|
||||
include/asm-generic/bug.h \
|
||||
$(wildcard include/config/generic/bug.h) \
|
||||
$(wildcard include/config/generic/bug/relative/pointers.h) \
|
||||
$(wildcard include/config/debug/bugverbose.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/byteorder.h \
|
||||
include/linux/byteorder/little_endian.h \
|
||||
include/linux/swab.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/swab.h \
|
||||
include/linux/byteorder/generic.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/war.h \
|
||||
$(wildcard include/config/cpu/r4000/workarounds.h) \
|
||||
$(wildcard include/config/cpu/r4400/workarounds.h) \
|
||||
$(wildcard include/config/cpu/daddi/workarounds.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-jz4740/war.h \
|
||||
include/asm-generic/bitops/non-atomic.h \
|
||||
include/asm-generic/bitops/fls64.h \
|
||||
include/asm-generic/bitops/ffz.h \
|
||||
include/asm-generic/bitops/find.h \
|
||||
include/asm-generic/bitops/sched.h \
|
||||
include/asm-generic/bitops/hweight.h \
|
||||
include/asm-generic/bitops/ext2-non-atomic.h \
|
||||
include/asm-generic/bitops/le.h \
|
||||
include/asm-generic/bitops/ext2-atomic.h \
|
||||
include/asm-generic/bitops/minix.h \
|
||||
include/linux/log2.h \
|
||||
$(wildcard include/config/arch/has/ilog2/u32.h) \
|
||||
$(wildcard include/config/arch/has/ilog2/u64.h) \
|
||||
include/linux/ratelimit.h \
|
||||
include/linux/param.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/param.h \
|
||||
$(wildcard include/config/hz.h) \
|
||||
include/linux/dynamic_debug.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/div64.h \
|
||||
include/asm-generic/div64.h \
|
||||
include/linux/module.h \
|
||||
$(wildcard include/config/modules.h) \
|
||||
$(wildcard include/config/modversions.h) \
|
||||
$(wildcard include/config/unused/symbols.h) \
|
||||
$(wildcard include/config/kallsyms.h) \
|
||||
$(wildcard include/config/tracepoints.h) \
|
||||
$(wildcard include/config/event/tracing.h) \
|
||||
$(wildcard include/config/module/unload.h) \
|
||||
$(wildcard include/config/constructors.h) \
|
||||
$(wildcard include/config/sysfs.h) \
|
||||
include/linux/list.h \
|
||||
$(wildcard include/config/debug/list.h) \
|
||||
include/linux/poison.h \
|
||||
$(wildcard include/config/illegal/pointer/value.h) \
|
||||
include/linux/prefetch.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/processor.h \
|
||||
$(wildcard include/config/cavium/octeon/cvmseg/size.h) \
|
||||
$(wildcard include/config/mips/mt/fpaff.h) \
|
||||
$(wildcard include/config/cpu/has/prefetch.h) \
|
||||
include/linux/cpumask.h \
|
||||
$(wildcard include/config/cpumask/offstack.h) \
|
||||
$(wildcard include/config/hotplug/cpu.h) \
|
||||
$(wildcard include/config/debug/per/cpu/maps.h) \
|
||||
$(wildcard include/config/disable/obsolete/cpumask/functions.h) \
|
||||
include/linux/threads.h \
|
||||
$(wildcard include/config/nr/cpus.h) \
|
||||
$(wildcard include/config/base/small.h) \
|
||||
include/linux/bitmap.h \
|
||||
include/linux/string.h \
|
||||
$(wildcard include/config/binary/printf.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/string.h \
|
||||
$(wildcard include/config/cpu/r3000.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cachectl.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mipsregs.h \
|
||||
$(wildcard include/config/cpu/vr41xx.h) \
|
||||
$(wildcard include/config/page/size/4kb.h) \
|
||||
$(wildcard include/config/page/size/8kb.h) \
|
||||
$(wildcard include/config/page/size/16kb.h) \
|
||||
$(wildcard include/config/page/size/32kb.h) \
|
||||
$(wildcard include/config/page/size/64kb.h) \
|
||||
$(wildcard include/config/hugetlb/page.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/prefetch.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/system.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/addrspace.h \
|
||||
$(wildcard include/config/cpu/r8000.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/spaces.h \
|
||||
$(wildcard include/config/dma/noncoherent.h) \
|
||||
include/linux/const.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cmpxchg.h \
|
||||
include/asm-generic/cmpxchg-local.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/dsp.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/watch.h \
|
||||
$(wildcard include/config/hardware/watchpoints.h) \
|
||||
include/linux/stat.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/stat.h \
|
||||
include/linux/time.h \
|
||||
$(wildcard include/config/arch/uses/gettimeoffset.h) \
|
||||
include/linux/cache.h \
|
||||
$(wildcard include/config/arch/has/cache/line/size.h) \
|
||||
include/linux/seqlock.h \
|
||||
include/linux/spinlock.h \
|
||||
$(wildcard include/config/debug/spinlock.h) \
|
||||
$(wildcard include/config/generic/lockbreak.h) \
|
||||
$(wildcard include/config/preempt.h) \
|
||||
$(wildcard include/config/debug/lock/alloc.h) \
|
||||
include/linux/preempt.h \
|
||||
$(wildcard include/config/debug/preempt.h) \
|
||||
$(wildcard include/config/preempt/notifiers.h) \
|
||||
include/linux/thread_info.h \
|
||||
$(wildcard include/config/compat.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/thread_info.h \
|
||||
$(wildcard include/config/debug/stack/usage.h) \
|
||||
$(wildcard include/config/mips32/o32.h) \
|
||||
$(wildcard include/config/mips32/n32.h) \
|
||||
include/linux/stringify.h \
|
||||
include/linux/bottom_half.h \
|
||||
include/linux/spinlock_types.h \
|
||||
include/linux/spinlock_types_up.h \
|
||||
include/linux/lockdep.h \
|
||||
$(wildcard include/config/lockdep.h) \
|
||||
$(wildcard include/config/lock/stat.h) \
|
||||
$(wildcard include/config/generic/hardirqs.h) \
|
||||
include/linux/spinlock_up.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/atomic.h \
|
||||
include/asm-generic/atomic-long.h \
|
||||
include/linux/spinlock_api_up.h \
|
||||
include/linux/math64.h \
|
||||
include/linux/kmod.h \
|
||||
include/linux/gfp.h \
|
||||
$(wildcard include/config/kmemcheck.h) \
|
||||
$(wildcard include/config/zone/dma.h) \
|
||||
$(wildcard include/config/zone/dma32.h) \
|
||||
$(wildcard include/config/debug/vm.h) \
|
||||
include/linux/mmzone.h \
|
||||
$(wildcard include/config/force/max/zoneorder.h) \
|
||||
$(wildcard include/config/memory/hotplug.h) \
|
||||
$(wildcard include/config/sparsemem.h) \
|
||||
$(wildcard include/config/arch/populates/node/map.h) \
|
||||
$(wildcard include/config/discontigmem.h) \
|
||||
$(wildcard include/config/flat/node/mem/map.h) \
|
||||
$(wildcard include/config/cgroup/mem/res/ctlr.h) \
|
||||
$(wildcard include/config/have/memory/present.h) \
|
||||
$(wildcard include/config/need/node/memmap/size.h) \
|
||||
$(wildcard include/config/need/multiple/nodes.h) \
|
||||
$(wildcard include/config/have/arch/early/pfn/to/nid.h) \
|
||||
$(wildcard include/config/flatmem.h) \
|
||||
$(wildcard include/config/sparsemem/extreme.h) \
|
||||
$(wildcard include/config/nodes/span/other/nodes.h) \
|
||||
$(wildcard include/config/holes/in/zone.h) \
|
||||
$(wildcard include/config/arch/has/holes/memorymodel.h) \
|
||||
include/linux/wait.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/current.h \
|
||||
include/linux/numa.h \
|
||||
$(wildcard include/config/nodes/shift.h) \
|
||||
include/linux/init.h \
|
||||
$(wildcard include/config/hotplug.h) \
|
||||
include/linux/nodemask.h \
|
||||
include/linux/pageblock-flags.h \
|
||||
$(wildcard include/config/hugetlb/page/size/variable.h) \
|
||||
include/linux/bounds.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/page.h \
|
||||
$(wildcard include/config/cpu/mips32.h) \
|
||||
include/linux/pfn.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/io.h \
|
||||
include/asm-generic/iomap.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/pgtable-bits.h \
|
||||
$(wildcard include/config/cpu/tx39xx.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/ioremap.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/mangle-port.h \
|
||||
$(wildcard include/config/swap/io/space.h) \
|
||||
include/asm-generic/memory_model.h \
|
||||
$(wildcard include/config/sparsemem/vmemmap.h) \
|
||||
include/asm-generic/getorder.h \
|
||||
include/linux/memory_hotplug.h \
|
||||
$(wildcard include/config/have/arch/nodedata/extension.h) \
|
||||
$(wildcard include/config/memory/hotremove.h) \
|
||||
include/linux/notifier.h \
|
||||
include/linux/errno.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/errno.h \
|
||||
include/asm-generic/errno-base.h \
|
||||
include/linux/mutex.h \
|
||||
$(wildcard include/config/debug/mutexes.h) \
|
||||
include/linux/rwsem.h \
|
||||
$(wildcard include/config/rwsem/generic/spinlock.h) \
|
||||
include/linux/rwsem-spinlock.h \
|
||||
include/linux/srcu.h \
|
||||
include/linux/topology.h \
|
||||
$(wildcard include/config/sched/smt.h) \
|
||||
$(wildcard include/config/sched/mc.h) \
|
||||
include/linux/smp.h \
|
||||
$(wildcard include/config/use/generic/smp/helpers.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/topology.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/topology.h \
|
||||
include/asm-generic/topology.h \
|
||||
include/linux/mmdebug.h \
|
||||
$(wildcard include/config/debug/virtual.h) \
|
||||
include/linux/elf.h \
|
||||
include/linux/elf-em.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/elf.h \
|
||||
$(wildcard include/config/mips32/compat.h) \
|
||||
include/linux/kobject.h \
|
||||
include/linux/sysfs.h \
|
||||
include/linux/kref.h \
|
||||
include/linux/moduleparam.h \
|
||||
$(wildcard include/config/alpha.h) \
|
||||
$(wildcard include/config/ia64.h) \
|
||||
$(wildcard include/config/ppc64.h) \
|
||||
include/linux/tracepoint.h \
|
||||
include/linux/rcupdate.h \
|
||||
$(wildcard include/config/tree/preempt/rcu.h) \
|
||||
$(wildcard include/config/tree/rcu.h) \
|
||||
include/linux/completion.h \
|
||||
include/linux/rcutree.h \
|
||||
$(wildcard include/config/no/hz.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/local.h \
|
||||
include/linux/percpu.h \
|
||||
$(wildcard include/config/have/legacy/per/cpu/area.h) \
|
||||
$(wildcard include/config/need/per/cpu/embed/first/chunk.h) \
|
||||
$(wildcard include/config/need/per/cpu/page/first/chunk.h) \
|
||||
$(wildcard include/config/debug/kmemleak.h) \
|
||||
$(wildcard include/config/have/setup/per/cpu/area.h) \
|
||||
include/linux/slab.h \
|
||||
$(wildcard include/config/slab/debug.h) \
|
||||
$(wildcard include/config/debug/objects.h) \
|
||||
$(wildcard include/config/slub.h) \
|
||||
$(wildcard include/config/slob.h) \
|
||||
$(wildcard include/config/debug/slab.h) \
|
||||
include/linux/slab_def.h \
|
||||
$(wildcard include/config/kmemtrace.h) \
|
||||
include/linux/kmemtrace.h \
|
||||
include/trace/events/kmem.h \
|
||||
include/trace/define_trace.h \
|
||||
include/linux/kmalloc_sizes.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/percpu.h \
|
||||
include/asm-generic/percpu.h \
|
||||
include/linux/percpu-defs.h \
|
||||
$(wildcard include/config/debug/force/weak/per/cpu.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/module.h \
|
||||
$(wildcard include/config/cpu/mips32/r1.h) \
|
||||
$(wildcard include/config/cpu/mips32/r2.h) \
|
||||
$(wildcard include/config/cpu/mips64/r1.h) \
|
||||
$(wildcard include/config/cpu/mips64/r2.h) \
|
||||
$(wildcard include/config/cpu/r4300.h) \
|
||||
$(wildcard include/config/cpu/r4x00.h) \
|
||||
$(wildcard include/config/cpu/tx49xx.h) \
|
||||
$(wildcard include/config/cpu/r5000.h) \
|
||||
$(wildcard include/config/cpu/r5432.h) \
|
||||
$(wildcard include/config/cpu/r6000.h) \
|
||||
$(wildcard include/config/cpu/nevada.h) \
|
||||
$(wildcard include/config/cpu/rm7000.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/uaccess.h \
|
||||
include/trace/events/module.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-jz4740/gpio.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-generic/gpio.h \
|
||||
$(wildcard include/config/gpiolib.h) \
|
||||
include/asm-generic/gpio.h \
|
||||
$(wildcard include/config/gpio/sysfs.h) \
|
||||
$(wildcard include/config/have/gpio/lib.h) \
|
||||
include/linux/serial.h \
|
||||
include/linux/serial_core.h \
|
||||
$(wildcard include/config/console/poll.h) \
|
||||
$(wildcard include/config/irq.h) \
|
||||
$(wildcard include/config/serial/core/console.h) \
|
||||
$(wildcard include/config/hard/pps.h) \
|
||||
include/linux/interrupt.h \
|
||||
$(wildcard include/config/pm/sleep.h) \
|
||||
$(wildcard include/config/generic/irq/probe.h) \
|
||||
$(wildcard include/config/proc/fs.h) \
|
||||
$(wildcard include/config/debug/shirq.h) \
|
||||
include/linux/irqreturn.h \
|
||||
include/linux/irqnr.h \
|
||||
include/linux/hardirq.h \
|
||||
$(wildcard include/config/virt/cpu/accounting.h) \
|
||||
include/linux/smp_lock.h \
|
||||
$(wildcard include/config/lock/kernel.h) \
|
||||
include/linux/sched.h \
|
||||
$(wildcard include/config/sched/debug.h) \
|
||||
$(wildcard include/config/detect/softlockup.h) \
|
||||
$(wildcard include/config/detect/hung/task.h) \
|
||||
$(wildcard include/config/core/dump/default/elf/headers.h) \
|
||||
$(wildcard include/config/bsd/process/acct.h) \
|
||||
$(wildcard include/config/taskstats.h) \
|
||||
$(wildcard include/config/audit.h) \
|
||||
$(wildcard include/config/inotify/user.h) \
|
||||
$(wildcard include/config/epoll.h) \
|
||||
$(wildcard include/config/posix/mqueue.h) \
|
||||
$(wildcard include/config/keys.h) \
|
||||
$(wildcard include/config/user/sched.h) \
|
||||
$(wildcard include/config/perf/events.h) \
|
||||
$(wildcard include/config/schedstats.h) \
|
||||
$(wildcard include/config/task/delay/acct.h) \
|
||||
$(wildcard include/config/fair/group/sched.h) \
|
||||
$(wildcard include/config/rt/group/sched.h) \
|
||||
$(wildcard include/config/blk/dev/io/trace.h) \
|
||||
$(wildcard include/config/cc/stackprotector.h) \
|
||||
$(wildcard include/config/sysvipc.h) \
|
||||
$(wildcard include/config/auditsyscall.h) \
|
||||
$(wildcard include/config/rt/mutexes.h) \
|
||||
$(wildcard include/config/task/xacct.h) \
|
||||
$(wildcard include/config/cpusets.h) \
|
||||
$(wildcard include/config/cgroups.h) \
|
||||
$(wildcard include/config/futex.h) \
|
||||
$(wildcard include/config/fault/injection.h) \
|
||||
$(wildcard include/config/latencytop.h) \
|
||||
$(wildcard include/config/function/graph/tracer.h) \
|
||||
$(wildcard include/config/have/unstable/sched/clock.h) \
|
||||
$(wildcard include/config/stack/growsup.h) \
|
||||
$(wildcard include/config/group/sched.h) \
|
||||
$(wildcard include/config/mm/owner.h) \
|
||||
include/linux/capability.h \
|
||||
$(wildcard include/config/security/file/capabilities.h) \
|
||||
include/linux/timex.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/timex.h \
|
||||
include/linux/jiffies.h \
|
||||
include/linux/rbtree.h \
|
||||
include/linux/mm_types.h \
|
||||
$(wildcard include/config/split/ptlock/cpus.h) \
|
||||
$(wildcard include/config/want/page/debug/flags.h) \
|
||||
$(wildcard include/config/mmu.h) \
|
||||
$(wildcard include/config/aio.h) \
|
||||
$(wildcard include/config/mmu/notifier.h) \
|
||||
include/linux/auxvec.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/auxvec.h \
|
||||
include/linux/prio_tree.h \
|
||||
include/linux/page-debug-flags.h \
|
||||
$(wildcard include/config/page/poisoning.h) \
|
||||
$(wildcard include/config/page/debug/something/else.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mmu.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/ptrace.h \
|
||||
$(wildcard include/config/cpu/has/smartmips.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/isadep.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/cputime.h \
|
||||
include/asm-generic/cputime.h \
|
||||
include/linux/sem.h \
|
||||
include/linux/ipc.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/ipcbuf.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/sembuf.h \
|
||||
include/linux/signal.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/signal.h \
|
||||
$(wildcard include/config/trad/signals.h) \
|
||||
include/asm-generic/signal-defs.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/sigcontext.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/siginfo.h \
|
||||
include/asm-generic/siginfo.h \
|
||||
include/linux/path.h \
|
||||
include/linux/pid.h \
|
||||
include/linux/proportions.h \
|
||||
include/linux/percpu_counter.h \
|
||||
include/linux/seccomp.h \
|
||||
$(wildcard include/config/seccomp.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/seccomp.h \
|
||||
include/linux/unistd.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/unistd.h \
|
||||
include/linux/rculist.h \
|
||||
include/linux/rtmutex.h \
|
||||
$(wildcard include/config/debug/rt/mutexes.h) \
|
||||
include/linux/plist.h \
|
||||
$(wildcard include/config/debug/pi/list.h) \
|
||||
include/linux/resource.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/resource.h \
|
||||
include/asm-generic/resource.h \
|
||||
include/linux/timer.h \
|
||||
$(wildcard include/config/timer/stats.h) \
|
||||
$(wildcard include/config/debug/objects/timers.h) \
|
||||
include/linux/ktime.h \
|
||||
$(wildcard include/config/ktime/scalar.h) \
|
||||
include/linux/debugobjects.h \
|
||||
$(wildcard include/config/debug/objects/free.h) \
|
||||
include/linux/hrtimer.h \
|
||||
$(wildcard include/config/high/res/timers.h) \
|
||||
include/linux/task_io_accounting.h \
|
||||
$(wildcard include/config/task/io/accounting.h) \
|
||||
include/linux/latencytop.h \
|
||||
include/linux/cred.h \
|
||||
$(wildcard include/config/debug/credentials.h) \
|
||||
$(wildcard include/config/security.h) \
|
||||
include/linux/key.h \
|
||||
$(wildcard include/config/sysctl.h) \
|
||||
include/linux/sysctl.h \
|
||||
include/linux/selinux.h \
|
||||
$(wildcard include/config/security/selinux.h) \
|
||||
include/linux/aio.h \
|
||||
include/linux/workqueue.h \
|
||||
include/linux/aio_abi.h \
|
||||
include/linux/uio.h \
|
||||
include/linux/ftrace_irq.h \
|
||||
$(wildcard include/config/ftrace/nmi/enter.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/hardirq.h \
|
||||
include/asm-generic/hardirq.h \
|
||||
include/linux/irq.h \
|
||||
$(wildcard include/config/s390.h) \
|
||||
$(wildcard include/config/irq/per/cpu.h) \
|
||||
$(wildcard include/config/irq/release/method.h) \
|
||||
$(wildcard include/config/intr/remap.h) \
|
||||
$(wildcard include/config/generic/pending/irq.h) \
|
||||
$(wildcard include/config/sparse/irq.h) \
|
||||
$(wildcard include/config/numa/irq/desc.h) \
|
||||
$(wildcard include/config/generic/hardirqs/no//do/irq.h) \
|
||||
$(wildcard include/config/cpumasks/offstack.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/irq.h \
|
||||
$(wildcard include/config/i8259.h) \
|
||||
$(wildcard include/config/mips/mt/smtc/irqaff.h) \
|
||||
$(wildcard include/config/mips/mt/smtc/im/backstop.h) \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mipsmtregs.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/mach-jz4740/irq.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/irq_regs.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/hw_irq.h \
|
||||
include/linux/irq_cpustat.h \
|
||||
include/linux/circ_buf.h \
|
||||
include/linux/tty.h \
|
||||
include/linux/fs.h \
|
||||
$(wildcard include/config/dnotify.h) \
|
||||
$(wildcard include/config/quota.h) \
|
||||
$(wildcard include/config/fsnotify.h) \
|
||||
$(wildcard include/config/inotify.h) \
|
||||
$(wildcard include/config/fs/posix/acl.h) \
|
||||
$(wildcard include/config/debug/writecount.h) \
|
||||
$(wildcard include/config/file/locking.h) \
|
||||
$(wildcard include/config/block.h) \
|
||||
$(wildcard include/config/fs/xip.h) \
|
||||
$(wildcard include/config/migration.h) \
|
||||
include/linux/limits.h \
|
||||
include/linux/ioctl.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/ioctl.h \
|
||||
include/asm-generic/ioctl.h \
|
||||
include/linux/kdev_t.h \
|
||||
include/linux/dcache.h \
|
||||
include/linux/radix-tree.h \
|
||||
include/linux/semaphore.h \
|
||||
include/linux/fiemap.h \
|
||||
include/linux/quota.h \
|
||||
include/linux/dqblk_xfs.h \
|
||||
include/linux/dqblk_v1.h \
|
||||
include/linux/dqblk_v2.h \
|
||||
include/linux/dqblk_qtree.h \
|
||||
include/linux/nfs_fs_i.h \
|
||||
include/linux/nfs.h \
|
||||
include/linux/sunrpc/msg_prot.h \
|
||||
include/linux/inet.h \
|
||||
include/linux/fcntl.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/fcntl.h \
|
||||
include/asm-generic/fcntl.h \
|
||||
include/linux/err.h \
|
||||
include/linux/major.h \
|
||||
include/linux/termios.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/termios.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/termbits.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/ioctls.h \
|
||||
include/linux/tty_driver.h \
|
||||
include/linux/cdev.h \
|
||||
include/linux/tty_ldisc.h \
|
||||
include/linux/sysrq.h \
|
||||
$(wildcard include/config/magic/sysrq.h) \
|
||||
include/linux/tty_flip.h \
|
||||
include/linux/delay.h \
|
||||
/home/cain/Embedded/ingenic/sakc/openwrt-xburst/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/arch/mips/include/asm/delay.h \
|
||||
|
||||
/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.o: $(deps_/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.o)
|
||||
|
||||
$(deps_/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.o):
|
||||
2
UART/src/.tmp_versions/8250_fpga.mod
Normal file
2
UART/src/.tmp_versions/8250_fpga.mod
Normal file
@@ -0,0 +1,2 @@
|
||||
/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.ko
|
||||
/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.o
|
||||
185
UART/src/8250_fpga.c
Normal file
185
UART/src/8250_fpga.c
Normal file
@@ -0,0 +1,185 @@
|
||||
/* Driver Para UART tipo 8250 Implementada en FPGA.
|
||||
* Autor: amasprillav - Basado en 'Tiny TTY driver * * Copyright (C) 2002 Greg Kroah-Hartman' y algunas funciones de xuart7350 de la página
|
||||
* http://www.embeddedarm.com, también de http://lkml.org/lkml/2008/8/5/295 y de http://en.wikibooks.org/wiki/Serial_Programming/termios
|
||||
* Fecha: 6/11/2010
|
||||
* Sistemas Embebidos - UNAL 2010-II
|
||||
*/
|
||||
|
||||
#define DEBUG 1
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <asm/mach-jz4740/gpio.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#define FPGA_BASE 0xB5000000
|
||||
/*Registros de la UART*/
|
||||
#define RHR 0x00
|
||||
#define THR 0x00
|
||||
#define IER 0x01
|
||||
#define FCR 0x02
|
||||
#define ISR 0x02
|
||||
#define LCR 0x03
|
||||
#define MCR 0x04
|
||||
#define LSR 0x05
|
||||
#define MSR 0x06
|
||||
#define SCR 0x07
|
||||
/*Registros para la velocidad de transmisión*/
|
||||
#define DIVLSB 0x00 //latch de las cifras más significativas
|
||||
#define DIVMSB 0x01 //latch de las cifras menos significativas
|
||||
|
||||
#define FPGA_IRQ_PIN JZ_GPIO_PORTC(15)
|
||||
#define CS2_PIN JZ_GPIO_PORTB(26)
|
||||
|
||||
struct uart_port port;
|
||||
|
||||
static const char driver_name[] = "ttyFPGA";
|
||||
static const char tty_dev_name[] = "ttyFPGA";
|
||||
|
||||
static void fpga_putc(struct uart_port *port, unsigned char c){outb(c,FPGA_BASE);}
|
||||
|
||||
static irqreturn_t vuart_rxint(int irq,void *dev_id){
|
||||
tty_insert_flip_char(port.state->port.tty, inb(FPGA_BASE), TTY_NORMAL);
|
||||
tty_flip_buffer_push(port.state->port.tty);
|
||||
return IRQ_HANDLED;
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
||||
static unsigned int fpga_tx_empty(struct uart_port *port){return 1;}
|
||||
|
||||
static void fpga_set_mctrl(struct uart_port *port, unsigned int mctrl){}
|
||||
|
||||
static unsigned int fpga_get_mctrl(struct uart_port *port){return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;}
|
||||
|
||||
static void fpga_stop_tx(struct uart_port *port){}
|
||||
|
||||
static void fpga_start_tx(struct uart_port *port){
|
||||
|
||||
while(1){
|
||||
fpga_putc(port,port->state->xmit.buf[port->state->xmit.tail]);
|
||||
printk("enviado: %c\n",port->state->xmit.buf[port->state->xmit.tail]);
|
||||
//Ajustar la cola de la UART Al buffer
|
||||
port->state->xmit.tail=(port->state->xmit.tail+1)&(UART_XMIT_SIZE-1);
|
||||
port->icount.tx++;
|
||||
if(uart_circ_empty(&port->state->xmit))break;
|
||||
}
|
||||
|
||||
}
|
||||
static void fpga_stop_rx(struct uart_port *port){}
|
||||
|
||||
static void fpga_enable_ms(struct uart_port *port){}
|
||||
|
||||
static void fpga_break_ctl(struct uart_port *port, int break_state){}
|
||||
|
||||
static int fpga_startup(struct uart_port *port){
|
||||
int res;
|
||||
printk("fpga_startup\n");
|
||||
res = request_irq(port->irq, vuart_rxint,IRQF_TRIGGER_FALLING, "ttyFPGA",(void*)port);//IRQF_DISABLED |
|
||||
if(res){
|
||||
printk("No se pudo registrar el IRQ!\n");
|
||||
return res;
|
||||
}
|
||||
//Envío los registros de inicialización para la velocidad de transmisión y recepción, también el formato de datos...
|
||||
outb(0x80,FPGA_BASE+LCR);
|
||||
//acá lo coloco a 9600 baudios porque es la velocidad de transmisión (esto es temporal).
|
||||
outb(0x00,FPGA_BASE+DIVMSB);
|
||||
outb(0x0c,FPGA_BASE+DIVLSB);
|
||||
//registro para habilitar las interrupciones...
|
||||
outb(0x03,FPGA_BASE+LCR);
|
||||
outb(0xCF,FPGA_BASE+FCR);
|
||||
outb(0x0B,FPGA_BASE+MCR);
|
||||
outb(0x01,FPGA_BASE+IER);
|
||||
return 0;
|
||||
}
|
||||
static void fpga_shutdown(struct uart_port *port){free_irq(port->irq, (void*)port);}
|
||||
|
||||
static void fpga_set_termios(struct uart_port *port,struct ktermios *termios,struct ktermios *old){}
|
||||
|
||||
static const char *fpga_type(struct uart_port *port){return "ttyfpga";}
|
||||
|
||||
static int fpga_request_port(struct uart_port *port){return 0;}
|
||||
|
||||
static void fpga_config_port(struct uart_port *port, int flags){
|
||||
if (flags & UART_CONFIG_TYPE)
|
||||
port->type = PORT_16550A;
|
||||
}
|
||||
static void fpga_release_port(struct uart_port *port){}
|
||||
|
||||
static int fpga_verify_port(struct uart_port *port, struct serial_struct *ser){return 0;}
|
||||
|
||||
static struct uart_ops fpga_uart_ops = {
|
||||
.tx_empty = fpga_tx_empty,
|
||||
.set_mctrl = fpga_set_mctrl,
|
||||
.get_mctrl = fpga_get_mctrl,
|
||||
.stop_tx = fpga_stop_tx,
|
||||
.start_tx = fpga_start_tx,
|
||||
.stop_rx = fpga_stop_rx,
|
||||
.enable_ms = fpga_enable_ms,
|
||||
.break_ctl = fpga_break_ctl,
|
||||
.startup = fpga_startup,
|
||||
.shutdown = fpga_shutdown,
|
||||
.set_termios = fpga_set_termios,
|
||||
.type = fpga_type,
|
||||
.release_port = fpga_release_port,
|
||||
.request_port = fpga_request_port,
|
||||
.config_port = fpga_config_port,
|
||||
.verify_port = fpga_verify_port,
|
||||
};
|
||||
|
||||
static struct uart_driver fpga_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.driver_name = driver_name,
|
||||
.dev_name = tty_dev_name,
|
||||
.major = 240,
|
||||
.minor = 0,
|
||||
.nr = 2,
|
||||
};
|
||||
static int __init fpga_init (void){
|
||||
int ret;
|
||||
unsigned int irq;
|
||||
|
||||
// Set GPIOB26 as part of External Memory Controller
|
||||
jz_gpio_set_function(CS2_PIN, JZ_GPIO_FUNC1);
|
||||
|
||||
//registrar el driver
|
||||
ret = uart_register_driver(&fpga_driver);
|
||||
if (ret) {
|
||||
pr_err("%s: No se pudo registrar la UART!\n", driver_name);
|
||||
return ret;
|
||||
}
|
||||
//asignar el pin de IRQ al que está conectado a la FPGA (IRQ_F en el esquemático)
|
||||
irq = gpio_to_irq(FPGA_IRQ_PIN);
|
||||
//insertar los valores del puerto
|
||||
port.membase=(u8*)FPGA_BASE;
|
||||
port.line = 0;
|
||||
port.ops = &fpga_uart_ops;
|
||||
port.flags = ASYNC_BOOT_AUTOCONF;
|
||||
port.type = PORT_16550A;
|
||||
port.irq = irq;
|
||||
ret = uart_add_one_port(&fpga_driver, &port);
|
||||
if (ret) {
|
||||
pr_err("%s: No se pudo agregar el puerto ttyFPGA0!\n", driver_name);
|
||||
uart_remove_one_port(&fpga_driver, &port);
|
||||
uart_unregister_driver(&fpga_driver);
|
||||
return ret;
|
||||
}
|
||||
|
||||
printk ("%s: Modulo cargado...\n", driver_name);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit fpga_exit (void){
|
||||
uart_remove_one_port(&fpga_driver, &port);
|
||||
uart_unregister_driver(&fpga_driver);
|
||||
printk ("%s: Modulo descargado...\n", driver_name);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("amasprillav <amasprillav@unal.edu.co>");
|
||||
MODULE_DESCRIPTION("Driver para UART tipo 8250 implementada en Verilog");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
module_init(fpga_init);
|
||||
module_exit(fpga_exit);
|
||||
BIN
UART/src/8250_fpga.ko
Normal file
BIN
UART/src/8250_fpga.ko
Normal file
Binary file not shown.
21
UART/src/8250_fpga.mod.c
Normal file
21
UART/src/8250_fpga.mod.c
Normal file
@@ -0,0 +1,21 @@
|
||||
#include <linux/module.h>
|
||||
#include <linux/vermagic.h>
|
||||
#include <linux/compiler.h>
|
||||
|
||||
MODULE_INFO(vermagic, VERMAGIC_STRING);
|
||||
|
||||
struct module __this_module
|
||||
__attribute__((section(".gnu.linkonce.this_module"))) = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.init = init_module,
|
||||
#ifdef CONFIG_MODULE_UNLOAD
|
||||
.exit = cleanup_module,
|
||||
#endif
|
||||
.arch = MODULE_ARCH_INIT,
|
||||
};
|
||||
|
||||
static const char __module_depends[]
|
||||
__used
|
||||
__attribute__((section(".modinfo"))) =
|
||||
"depends=";
|
||||
|
||||
BIN
UART/src/8250_fpga.mod.o
Normal file
BIN
UART/src/8250_fpga.mod.o
Normal file
Binary file not shown.
BIN
UART/src/8250_fpga.o
Normal file
BIN
UART/src/8250_fpga.o
Normal file
Binary file not shown.
23
UART/src/Makefile
Normal file
23
UART/src/Makefile
Normal file
@@ -0,0 +1,23 @@
|
||||
EXTRA_CFLAGS += -Wall
|
||||
CC = mipsel-openwrt-linux-gcc
|
||||
OPENWRT_BASE = /home/cain/Embedded/ingenic/sakc/openwrt-xburst/
|
||||
KERNEL_SRC = $(OPENWRT_BASE)/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/
|
||||
CROSS_COMPILE = mipsel-openwrt-linux-
|
||||
|
||||
obj-m += 8250_fpga.o
|
||||
all: driver
|
||||
|
||||
driver:
|
||||
make -C $(KERNEL_SRC) M=$(PWD) ARCH=mips CROSS_COMPILE=$(CROSS_COMPILE) modules
|
||||
clean:
|
||||
make -C $(KERNEL_SRC) M=$(PWD) ARCH=mips CROSS_COMPILE=$(CROSS_COMPILE) clean
|
||||
rm -rf *.o main.o main irq.ko Modules.symvers irq_main
|
||||
|
||||
main: main.o
|
||||
|
||||
PREPROCESS.c = $(CC) $(CFLAGS) $(TARGET_ARCH) -E -Wp,-C,-dD,-dI
|
||||
%.pp : %.c FORCE
|
||||
$(PREPROCESS.c) $< > $@
|
||||
|
||||
|
||||
|
||||
0
UART/src/Module.symvers
Normal file
0
UART/src/Module.symvers
Normal file
1
UART/src/modules.order
Normal file
1
UART/src/modules.order
Normal file
@@ -0,0 +1 @@
|
||||
kernel//home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/src/8250_fpga.ko
|
||||
Reference in New Issue
Block a user