qi-hardware/nn-usb-fpga
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Code Activity
143 Commits 1 Branch 0 Tags
32a206d1b00a98d3b9591ae566f0e62028b081eb
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11 Commits

Author SHA1 Message Date
carlos 9b75552c83 Adding bootloader for lm32 2010-10-12 09:05:52 -05:00
carlos 9da569a830 Removing battery circuit 
Adding UMP1: 5V voltage regulator, allowing Input voltages up to 13V

Adding USB - DC jack switching circuit:
When USB cable is plugged in:
USWAA PIN1 = 0V, USWBB PIN2 = 0V, VGate Q2 = 0, VGS Q2 = -USB_5V => Q2 ON VBAT= USB_5V

When DC WALL ADAPTER is pugged in:
USWAA PIN1 = 5V, USWBB PIN2 = 5V, VGate Q2 = 5V, VGS Q2 = 0V ???, => Q2 OFF, VBAT = UMP1 out.

if plugg USB cable and DC wall adapter:

USWAA PIN1 = 5V, USWBB PIN2 = 5V, VGate Q2 = 5V, VGS Q2 = 5V ???, => Q2 OFF, VBAT = UMP1 out.
USB_5V & VBAT are isolated
 2010-10-09 17:37:54 -05:00
carlos 568f2182ef Fixing some errors on SAKC Examples 2010-10-07 11:53:01 -05:00
carlos 46e28e9714 fixing DRC errors 2010-10-05 09:53:32 -05:00
carlos 88081639b0 Adding SPI serial flash component x25x64mb.lib 2010-10-05 06:55:57 -05:00
carlos 70a1465215 Change ADC from Texas to Microchip MCP3008. 
Adding mcp3008 component
Adding SPI seerial flash X25X64MB.
Adding hierarchical label SRAM_CS, we want to use a serial SRAM for FPGA.
 2010-10-05 06:49:18 -05:00
carlos d9b9e52111 Adding serial flash to FPGA 2010-10-02 14:18:17 -05:00
carlos b99e5424cd Merging J6 and J7 in J67 4x2 connector. 2010-10-02 12:05:51 -05:00
carlos 372739573d Connecting FPGA GPIOs to U6 (max3223) allowing RS232 serial communication 
Change J6-J7 layout allowing the creation of a serial communication channel between ingenic CPU and FPGA.
Changing LCD analog ground, according to LCD datasheet
 2010-10-02 11:04:00 -05:00
Carlos Camargo 1f2712e4de Adding evolvable hardware example 2010-10-01 09:03:07 -05:00
Carlos Camargo 0d7ea82eb7 Renaming Kicad and Orcad design files directory, uploading new kicad version 2010-07-29 08:32:39 -05:00