Andres Calderon
|
5c25d1c015
|
DDR0 termaintor placement
|
2010-08-16 23:30:34 -05:00 |
|
Andres Calderon
|
cf1645bb44
|
DDR0 termaintor placement
|
2010-08-16 22:48:30 -05:00 |
|
Andres Calderon
|
8cf60ceb3c
|
PSU controller added
|
2010-08-16 21:49:00 -05:00 |
|
Andres Calderon
|
b05f6ed4b4
|
MLF20m1 fixed
|
2010-08-16 21:35:01 -05:00 |
|
Andres Calderon
|
a1ba8c9c6e
|
PSU sheet added
|
2010-08-16 21:09:50 -05:00 |
|
Andres Calderon
|
2df63e4aea
|
ddr termination placement
|
2010-08-16 20:56:08 -05:00 |
|
Andres Calderon
|
f1c6506b1e
|
terminal resistors placement
|
2010-08-16 19:36:21 -05:00 |
|
Andres Calderon
|
ba734f70bf
|
terminal resistors placement
|
2010-08-16 19:06:33 -05:00 |
|
Juan64Bits
|
6c2e360016
|
Library path fixed
|
2010-08-16 16:49:57 -05:00 |
|
Juan64Bits
|
16026245e7
|
Series resistors (DDR) added
|
2010-08-16 16:32:29 -05:00 |
|
Andres Calderon
|
91cfffd7b4
|
Merge branch 'master' of projects.qi-hardware.com:xue
|
2010-08-16 13:53:41 -05:00 |
|
Andres Calderon
|
43db22445d
|
MLF20m1 footprint added
|
2010-08-16 13:51:36 -05:00 |
|
Andres Calderon
|
263badf95f
|
attiny.lib added
|
2010-08-16 13:13:20 -05:00 |
|
Juan64Bits
|
9202afdec7
|
General issues corrected
|
2010-08-16 11:57:16 -05:00 |
|
Andres Calderon
|
170ed5aa15
|
fix
|
2010-08-14 10:43:33 -05:00 |
|
Andres Calderon
|
4110ee21c8
|
fixed FPGA component bug
|
2010-08-14 08:23:56 -05:00 |
|
Andres Calderon
|
bd8f8b9165
|
fixed xc6slx45fgg484.lib error
|
2010-08-14 08:15:48 -05:00 |
|
Andres Calderon
|
a8ff17c52f
|
fixed xil2kc.py error
|
2010-08-14 08:13:41 -05:00 |
|
Andres Calderon
|
ef72b751a5
|
eth-phy placement
|
2010-08-14 07:42:37 -05:00 |
|
Andres Calderon
|
fae8765d04
|
improved placement
|
2010-08-13 22:09:52 -05:00 |
|
Andres Calderon
|
2161dfcbc2
|
decoupling nand flash added
|
2010-08-13 18:40:09 -05:00 |
|
Andres Calderon
|
e07bc340e0
|
decoupling nand flash added
|
2010-08-13 18:38:38 -05:00 |
|
Andres Calderon
|
8f8f332469
|
decoupling DDR cap. placement
|
2010-08-13 18:20:50 -05:00 |
|
Andres Calderon
|
333097ec1d
|
VCC fixed
|
2010-08-13 17:34:12 -05:00 |
|
Andres Calderon
|
ef75347b57
|
spi memory added
|
2010-08-13 15:42:35 -05:00 |
|
Juan64Bits
|
37912ec628
|
FPGA decoupling capacitors
|
2010-08-13 11:24:39 -05:00 |
|
Andres Calderon
|
35a1b35c7f
|
usb added
|
2010-08-13 09:27:10 -05:00 |
|
Andres Calderon
|
da7ba80fda
|
preliminary placement improved
|
2010-08-13 06:16:55 -05:00 |
|
Andres Calderon
|
e1ce2a9e8f
|
fix
|
2010-08-12 21:12:14 -05:00 |
|
Andres Calderon
|
ada00cd738
|
fix
|
2010-08-12 17:18:08 -05:00 |
|
Andres Calderon
|
e678c0e51a
|
fixed placement
|
2010-08-12 16:12:57 -05:00 |
|
Andres Calderon
|
7a9ae94ba6
|
FB added to USB host
|
2010-08-12 08:12:03 -05:00 |
|
Juan64Bits
|
11bf380cc6
|
Fixing USB connections
|
2010-08-10 21:25:32 -05:00 |
|
Andres Calderon
|
a0ee3f9555
|
VCCs connected
|
2010-08-10 18:51:35 -05:00 |
|
Andres Calderon
|
ef20287ec3
|
only a test
|
2010-08-10 18:27:44 -05:00 |
|
Andres Calderon
|
57948cfc83
|
SD connector attached to th S6
|
2010-08-10 18:09:38 -05:00 |
|
Andres Calderon
|
cac88e3756
|
DDR de-coupling caps. added
|
2010-08-10 17:38:37 -05:00 |
|
Andres Calderon
|
a8fcbf091c
|
early placement
|
2010-08-09 22:25:05 -05:00 |
|
Andres Calderon
|
171e409036
|
annotate
|
2010-08-09 21:55:50 -05:00 |
|
Andres Calderon
|
11ade0f1e8
|
ddr footprint changed
|
2010-08-09 21:29:52 -05:00 |
|
Andres Calderon
|
0130eb37f5
|
DRAM.sch2 deleted
|
2010-08-09 20:21:48 -05:00 |
|
Andres Calderon
|
134f841bb6
|
annotate
|
2010-08-09 20:21:14 -05:00 |
|
Andres Calderon
|
7b759dd425
|
ddr component changed
|
2010-08-09 20:16:50 -05:00 |
|
Juan64Bits
|
5b131afa5c
|
Merge branch 'master' of projects.qi-hardware.com:xue
|
2010-08-09 19:15:07 -05:00 |
|
Juan64Bits
|
4c086528cc
|
Adding librarys.
|
2010-08-09 19:12:59 -05:00 |
|
Andres Calderon
|
095339fb97
|
66-tsop footprint added
|
2010-08-09 19:10:52 -05:00 |
|
Juan64Bits
|
b22aa62b24
|
Ethernet-phy and USB connected to FPGA
|
2010-08-09 15:37:18 -05:00 |
|
Andres Calderon
|
675d06abe3
|
pasive footprint added
|
2010-08-09 07:48:48 -05:00 |
|
Andres Calderon
|
3678b1cf05
|
more fpga ddr lines has been connected
|
2010-08-08 22:53:21 -05:00 |
|
Andres Calderon
|
bd2d314d9c
|
cleanup
|
2010-08-08 21:31:12 -05:00 |
|