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Code
d9912a80e4
xue/kicad/xue-rnc/xue-rnc.cmp

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Revisions, Changing M12 holder.
2010-11-11 21:23:23 +02:00
Cmp-Mod V01 Created by CvPCB (2010-11-03 BZR 2592)-testing date = Thu 11 Nov 2010 02:14:40 PM COT
Phy
2010-08-08 20:15:44 +03:00
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7F9F;
Reference = C1;
ValeurCmp = 1uF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0603;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D80ED;
Reference = C2;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
ValeurCmp = 1uF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7FA1;
Reference = C3;
Phy
2010-08-08 20:15:44 +03:00
ValeurCmp = 100nF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D80F0;
Reference = C4;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
ValeurCmp = 100nF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7FA3;
Reference = C5;
Phy
2010-08-08 20:15:44 +03:00
ValeurCmp = 100nF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D8104;
Reference = C6;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
ValeurCmp = 100nF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
TimeStamp = /4C4320F3/4C5D7FA5;
ddr footprint changed
2010-08-10 05:29:52 +03:00
Reference = C7;
Phy
2010-08-08 20:15:44 +03:00
ValeurCmp = 1uF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0603;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
TimeStamp = /4C4320F3/4C5D7FA7;
ddr footprint changed
2010-08-10 05:29:52 +03:00
Reference = C8;
Phy
2010-08-08 20:15:44 +03:00
ValeurCmp = 100nF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D8114;
Reference = C9;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
ValeurCmp = 100nF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7E41;
Reference = C10;
ValeurCmp = 100nF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7E43;
Reference = C11;
ValeurCmp = 100nF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7DCB;
Reference = C12;
ValeurCmp = 47nF;
Kicad labels problem.
2010-09-10 01:56:28 +03:00
IdModule = 1206;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C5F2033;
ddr footprint changed
2010-08-10 05:29:52 +03:00
Reference = C13;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
ValeurCmp = 1uF;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0603;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C5F2037;
ddr footprint changed
2010-08-10 05:29:52 +03:00
Reference = C14;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
ValeurCmp = 100nF;
IdModule = 0402;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C5F2039;
ddr footprint changed
2010-08-10 05:29:52 +03:00
Reference = C15;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
ValeurCmp = 100nF;
IdModule = 0402;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C5F2D1E;
ddr footprint changed
2010-08-10 05:29:52 +03:00
Reference = C16;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
ValeurCmp = 4.7nF;
Modifying USB H-D
2010-08-31 21:14:56 +03:00
IdModule = 1206;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
EndCmp
usb added
2010-08-13 17:27:10 +03:00
BeginCmp
TimeStamp = /4C421DD3/4C61CC73;
Reference = C17;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CC96;
Reference = C18;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CCE3;
Reference = C19;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CCE2;
Reference = C20;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CF2F;
Reference = C21;
ValeurCmp = 1uF;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CEB9;
Reference = C22;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CEF7;
Reference = C23;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CF17;
Reference = C24;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CF16;
Reference = C25;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CF27;
Reference = C26;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CFA0;
Reference = C27;
ValeurCmp = 1uF;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CFA5;
Reference = C28;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CFA4;
Reference = C29;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CFA2;
Reference = C30;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CFA3;
Reference = C31;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CFA1;
Reference = C32;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61D151;
Reference = C33;
spi memory added
2010-08-13 23:42:35 +03:00
ValeurCmp = 10uF;
IdModule = 1206;
usb added
2010-08-13 17:27:10 +03:00
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61D1D4;
Reference = C34;
spi memory added
2010-08-13 23:42:35 +03:00
ValeurCmp = 10uF;
IdModule = 1206;
usb added
2010-08-13 17:27:10 +03:00
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552BE;
Reference = C35;
ValeurCmp = 1uF;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
IdModule = 0603;
usb added
2010-08-13 17:27:10 +03:00
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552BD;
Reference = C36;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
ValeurCmp = 100nF;
IdModule = 0402;
usb added
2010-08-13 17:27:10 +03:00
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552BC;
Reference = C37;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
ValeurCmp = 100nF;
usb added
2010-08-13 17:27:10 +03:00
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552B7;
Reference = C38;
ValeurCmp = 4.7nF;
Modifying USB H-D
2010-08-31 21:14:56 +03:00
IdModule = 1206;
usb added
2010-08-13 17:27:10 +03:00
EndCmp
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656A80;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C39;
ValeurCmp = 100uF;
IdModule = 1210;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656BF8;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C40;
ValeurCmp = 100uF;
IdModule = 1210;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656CB7;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C41;
ValeurCmp = 100uF;
IdModule = 1210;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656ABD;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C42;
ValeurCmp = 4.7uF;
IdModule = 0805;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656BF9;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C43;
ValeurCmp = 4.7uF;
IdModule = 0805;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656CB9;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C44;
ValeurCmp = 4.7uF;
IdModule = 0805;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656AC0;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C45;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656C16;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C46;
ValeurCmp = 4.7uF;
IdModule = 0805;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656CBA;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C47;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656AC2;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C48;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656C24;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C49;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656CBB;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C50;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656C27;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C51;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656BFA;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C52;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656C49;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C53;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D97;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C54;
ValeurCmp = 100uF;
IdModule = 1210;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D43;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C55;
ValeurCmp = 100uF;
IdModule = 1210;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656CF9;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C56;
ValeurCmp = 100uF;
IdModule = 1210;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D98;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C57;
ValeurCmp = 4.7uF;
IdModule = 0805;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D44;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C58;
ValeurCmp = 4.7uF;
IdModule = 0805;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656CFA;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C59;
ValeurCmp = 4.7uF;
IdModule = 0805;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D99;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C60;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D45;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C61;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656CFB;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C62;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D9A;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C63;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D46;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C64;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656CFC;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C65;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D9D;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C66;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D49;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C67;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D08;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C68;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C656D53;
FPGA decoupling capacitors
2010-08-13 19:24:39 +03:00
Reference = C69;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
eth-phy placement
2010-08-14 15:42:37 +03:00
BeginCmp
TimeStamp = /4C421DD3/4C65D2A9;
Reference = C70;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C65D28E;
Reference = C71;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C4227FE/4C65D661;
Reference = C72;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C4227FE/4C65D67C;
Reference = C73;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C4227FE/4C65D681;
Reference = C74;
ValeurCmp = 1uF;
IdModule = 0603;
EndCmp
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
BeginCmp
TimeStamp = /4C4227FE/4C6969AB;
Reference = C75;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
debug+prog connector added
2010-08-22 21:35:28 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C6B29A3;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = C76;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C6B29DA;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = C77;
ValeurCmp = 470nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2C7C;
Reference = C78;
ValeurCmp = 4.7uF;
IdModule = 0805;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2C7F;
Reference = C79;
ValeurCmp = 22pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2C83;
Reference = C80;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2F0B;
Reference = C81;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2FD7;
Reference = C82;
ValeurCmp = 4.7uF;
IdModule = 0805;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2FD6;
Reference = C83;
ValeurCmp = 22pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2FD5;
Reference = C84;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2FD0;
Reference = C85;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C73D074;
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
Reference = C90;
ValeurCmp = 470nF;
IdModule = 0402;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C73D252;
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
Reference = C91;
ValeurCmp = 470nF;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C748EDB;
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
Reference = C92;
ValeurCmp = 470nF;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C748EDA;
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
Reference = C93;
ValeurCmp = 470nF;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
IdModule = 0402;
EndCmp
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C749A0C;
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
Reference = C94;
ValeurCmp = 470nF;
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
initial import
2010-07-24 14:58:53 +03:00
Making power source
2010-08-31 03:48:29 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C79C99E;
Reference = C95;
ValeurCmp = 4.7uF;
IdModule = 0805;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C79C8AE;
Reference = C96;
ValeurCmp = 22pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C79C8AF;
Reference = C97;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C79C8B2;
Reference = C98;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7C4D8E;
Reference = C99;
ValeurCmp = 22uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7C4D94;
Reference = C100;
ValeurCmp = 220pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7C4CEC;
Reference = C101;
ValeurCmp = 22pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7C4CED;
Reference = C102;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7C4CF1;
Reference = C103;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
PSU Modifying.
2010-09-02 20:55:34 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C7FD266;
Reference = C104;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
Fixing label problems, connecting image sensor.
2010-09-25 21:33:12 +03:00
BeginCmp
TimeStamp = /4C9E2B0F/4C9E28CB;
Reference = C105;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B6C;
Reference = C106;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2BAA;
Reference = C107;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E28C1;
Reference = C108;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B6D;
Reference = C109;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2BA9;
Reference = C110;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2857;
Reference = C111;
ValeurCmp = 22pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B71;
Reference = C112;
ValeurCmp = 22pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2BA5;
Reference = C113;
ValeurCmp = 22pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E286D;
Reference = C114;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B70;
Reference = C115;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2BA6;
Reference = C116;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B86;
Reference = C117;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B90;
Reference = C118;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B85;
Reference = C120;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B91;
Reference = C121;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B81;
Reference = C124;
ValeurCmp = 22pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B95;
Reference = C125;
ValeurCmp = 22pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B82;
Reference = C127;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B94;
Reference = C128;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C00;
Reference = C129;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C04;
Reference = C130;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C27;
Reference = C131;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C26;
Reference = C132;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C32;
Reference = C133;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C2D;
Reference = C134;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C2E;
Reference = C135;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C65;
Reference = C136;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C5D;
Reference = C137;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C5F;
Reference = C138;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C5E;
Reference = C139;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C76;
Reference = C140;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C6E;
Reference = C141;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C71;
Reference = C142;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C6F;
Reference = C143;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3C70;
Reference = C144;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
Adding FTDI to JTAG/PROG schematic page.
2010-10-16 20:56:21 +03:00
BeginCmp
TimeStamp = /4C716A4D/4CB9D312;
Reference = C145;
ValeurCmp = 4.7nF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DE29;
Reference = C146;
ValeurCmp = 47pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DE25;
Reference = C147;
ValeurCmp = 47pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9C9AD;
Reference = C148;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9C965;
Reference = C149;
ValeurCmp = 33nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9D9A7;
Reference = C150;
ValeurCmp = 10uF;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9C996;
Reference = C151;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
Routing VCCO2 source.
2010-10-21 23:27:00 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4CC0947D;
Reference = C152;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4CC0947E;
Reference = C153;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4CC09482;
Reference = C154;
ValeurCmp = 22pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4CC09481;
Reference = C155;
ValeurCmp = 10uF;
IdModule = 1206;
EndCmp
Adding M[0] M[1] configuration and fpga crystal
2010-11-05 04:13:46 +02:00
BeginCmp
TimeStamp = /4C7BC2B2/4CD34D8C;
Reference = C156;
ValeurCmp = 10nF;
IdModule = 0402;
EndCmp
usb added
2010-08-13 17:27:10 +03:00
BeginCmp
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
TimeStamp = /4C5F1EDC/4C5F2B55;
Reference = F1;
usb added
2010-08-13 17:27:10 +03:00
ValeurCmp = MICROSMD075F;
IdModule = 1210;
EndCmp
Adding FTDI to JTAG/PROG schematic page.
2010-10-16 20:56:21 +03:00
BeginCmp
TimeStamp = /4C716A4D/4CB9CA50;
Reference = FB1;
ValeurCmp = FILTER;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9E17F;
Reference = FB2;
ValeurCmp = FILTER;
IdModule = 0402;
EndCmp
Adding M[0] M[1] configuration and fpga crystal
2010-11-05 04:13:46 +02:00
BeginCmp
TimeStamp = /4C9E2B0F/4CD34ACB;
Reference = FB3;
ValeurCmp = FILTER;
IdModule = 0402;
EndCmp
Adding FTDI to JTAG/PROG schematic page.
2010-10-16 20:56:21 +03:00
BeginCmp
TimeStamp = /4C716A4D/4CB9C4D7;
Reference = IC1;
ValeurCmp = FT2232D;
IdModule = LQFP48;
EndCmp
initial import
2010-07-24 14:58:53 +03:00
BeginCmp
TimeStamp = /4C4227FE/4B76F5E2;
Reference = J1;
ValeurCmp = MICROSD;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
IdModule = MICROSD-500901;
initial import
2010-07-24 14:58:53 +03:00
EndCmp
Phy
2010-08-08 20:15:44 +03:00
BeginCmp
TimeStamp = /4C4320F3/4C5D6F5A;
Reference = J4;
ValeurCmp = RJ45-48025;
IdModule = SD-48025;
EndCmp
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
BeginCmp
TimeStamp = /4C5F1EDC/4C5F23DD;
ddr footprint changed
2010-08-10 05:29:52 +03:00
Reference = J5;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
ValeurCmp = USB-48204-0001;
annotate
2010-08-10 05:55:50 +03:00
IdModule = USB-48204;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
EndCmp
debug+prog connector added
2010-08-22 21:35:28 +03:00
BeginCmp
Adding FTDI to JTAG/PROG schematic page.
2010-10-16 20:56:21 +03:00
TimeStamp = /4C5F1EDC/4C75F027;
Reference = J7;
ValeurCmp = ZX62D-B-5P8;
IdModule = ZX62D-B-5P8;
debug+prog connector added
2010-08-22 21:35:28 +03:00
EndCmp
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
BeginCmp
Adding FTDI to JTAG/PROG schematic page.
2010-10-16 20:56:21 +03:00
TimeStamp = /4C716A4D/4CB9D311;
Reference = J8;
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
ValeurCmp = ZX62D-B-5P8;
IdModule = ZX62D-B-5P8;
EndCmp
Phy
2010-08-08 20:15:44 +03:00
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D80F3;
Reference = L1;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
ValeurCmp = FB;
eth-phy placement
2010-08-14 15:42:37 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7FB7;
Reference = L2;
ValeurCmp = FB;
debug+prog connector added
2010-08-22 21:35:28 +03:00
IdModule = 0603;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
TimeStamp = /4C4320F3/4C5D810A;
ddr footprint changed
2010-08-10 05:29:52 +03:00
Reference = L3;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
ValeurCmp = FB;
eth-phy placement
2010-08-14 15:42:37 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
usb added
2010-08-13 17:27:10 +03:00
BeginCmp
TimeStamp = /4C5F1EDC/4C63F252;
Reference = L4;
ValeurCmp = FB;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C63F248;
Reference = L5;
ValeurCmp = FB;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552B1;
Reference = L7;
ValeurCmp = FB;
IdModule = 0603;
EndCmp
debug+prog connector added
2010-08-22 21:35:28 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C6D2E6A;
Reference = L8;
ValeurCmp = 2.2uH;
IdModule = 1210;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2FD1;
Reference = L9;
ValeurCmp = 2.2uH;
IdModule = 1210;
EndCmp
Making power source
2010-08-31 03:48:29 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C79C828;
Reference = L10;
ValeurCmp = 4.7uH;
IdModule = 1210;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7C4CF0;
Reference = L11;
ValeurCmp = 2.2uH;
IdModule = 1210;
EndCmp
Routing image sensor.
2010-10-08 19:42:46 +03:00
BeginCmp
TimeStamp = /4C9E2AF4/4CAF29D5;
Reference = MP1;
ValeurCmp = M12-TU400A;
Revisions, Changing M12 holder.
2010-11-11 21:23:23 +02:00
IdModule = M12-HLD-001;
Routing image sensor.
2010-10-08 19:42:46 +03:00
EndCmp
PSU Modifying.
2010-09-02 20:55:34 +03:00
BeginCmp
Routing VCCO2 source.
2010-10-21 23:27:00 +03:00
TimeStamp = /4CB0D95D/4CBAFE50;
Reference = P1;
ValeurCmp = CONN_25X2;
IdModule = header25x2_smd_2mm;
PSU Modifying.
2010-09-02 20:55:34 +03:00
EndCmp
Phy
2010-08-08 20:15:44 +03:00
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7F39;
Reference = R1;
ValeurCmp = 4.7K;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7ECF;
Reference = R2;
ValeurCmp = 6.65K;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7AFE;
Reference = R3;
Phy
2010-08-08 20:15:44 +03:00
ValeurCmp = 49.9;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7AFC;
Reference = R4;
Phy
2010-08-08 20:15:44 +03:00
ValeurCmp = 49.9;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7AF7;
Reference = R5;
Phy
2010-08-08 20:15:44 +03:00
ValeurCmp = 49.9;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7AF9;
Reference = R6;
Phy
2010-08-08 20:15:44 +03:00
ValeurCmp = 49.9;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D719D;
Reference = R7;
ValeurCmp = 220;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D71DB;
Reference = R8;
ValeurCmp = 220;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0402;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C4320F3/4C5D7DC4;
Reference = R9;
ValeurCmp = 1M;
Kicad labels problem.
2010-09-10 01:56:28 +03:00
IdModule = 1206;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C5F2D27;
ddr footprint changed
2010-08-10 05:29:52 +03:00
Reference = R10;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
ValeurCmp = 1M;
Modifying USB H-D
2010-08-31 21:14:56 +03:00
IdModule = 1206;
Phy
2010-08-08 20:15:44 +03:00
EndCmp
usb added
2010-08-13 17:27:10 +03:00
BeginCmp
TimeStamp = /4C421DD3/4C61CD4A;
Reference = R11;
ValeurCmp = 1K_1%;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CDB5;
Reference = R12;
ValeurCmp = 1K_1%;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CE31;
Reference = R13;
ValeurCmp = 1K_1%;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C421DD3/4C61CE30;
Reference = R14;
ValeurCmp = 1K_1%;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552B6;
Reference = R15;
ValeurCmp = 1M;
Modifying USB H-D
2010-08-31 21:14:56 +03:00
IdModule = 1206;
usb added
2010-08-13 17:27:10 +03:00
EndCmp
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69DF7A;
ddr termination placement
2010-08-17 04:56:08 +03:00
Reference = R16;
ValeurCmp = 120;
IdModule = 0402;
EndCmp
DDR0 termaintor placement
2010-08-17 06:48:30 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69E7F8;
DDR0 termaintor placement
2010-08-17 06:48:30 +03:00
Reference = R17;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69E7C2;
DDR0 termaintor placement
2010-08-17 06:48:30 +03:00
Reference = R18;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69E7DD;
DDR0 termaintor placement
2010-08-17 06:48:30 +03:00
Reference = R19;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69E92D;
DDR0 termaintor placement
2010-08-17 06:48:30 +03:00
Reference = R20;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
debug+prog connector added
2010-08-22 21:35:28 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C6B1B90;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = R21;
ValeurCmp = 120;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C6B216D;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = R22;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C6B216E;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = R23;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C6B216B;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = R24;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2DBC;
Reference = R25;
Making power source
2010-08-31 03:48:29 +03:00
ValeurCmp = 200K;
debug+prog connector added
2010-08-22 21:35:28 +03:00
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2DDD;
Reference = R26;
Making power source
2010-08-31 03:48:29 +03:00
ValeurCmp = 900K;
debug+prog connector added
2010-08-22 21:35:28 +03:00
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2FD3;
Reference = R27;
Making power source
2010-08-31 03:48:29 +03:00
ValeurCmp = 200K;
debug+prog connector added
2010-08-22 21:35:28 +03:00
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2FD2;
Reference = R28;
Making power source
2010-08-31 03:48:29 +03:00
ValeurCmp = 200K;
debug+prog connector added
2010-08-22 21:35:28 +03:00
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C716877;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = R29;
ValeurCmp = 4.7k;
IdModule = 0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C7168DD;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = R30;
ValeurCmp = 330;
IdModule = 0402;
EndCmp
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
BeginCmp
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
TimeStamp = /4C69ED5F/4C77067B;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
Reference = R31;
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C77060E;
Reference = R32;
ValeurCmp = R;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C770712;
Reference = R33;
ValeurCmp = R;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
IdModule = 0402;
EndCmp
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C770713;
Reference = R34;
ValeurCmp = R;
IdModule = 1206;
EndCmp
ddr termination placement
2010-08-17 04:56:08 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C69ED5F/4C79C99C;
Reference = R35;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C79C99B;
Reference = R36;
ValeurCmp = R;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C79C7C0;
Reference = R37;
ValeurCmp = 1M;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C79C8B0;
Reference = R38;
ValeurCmp = 332K;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C79C8B1;
Reference = R39;
ValeurCmp = 1.02M;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7C4D9E;
Reference = R40;
ValeurCmp = 47K;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7C4DAA;
Reference = R41;
ValeurCmp = 160K;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7C4CEE;
Reference = R42;
ValeurCmp = 24K;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7C4CEF;
Reference = R43;
ValeurCmp = 51K;
IdModule = 0402;
EndCmp
Modifying USB H-D
2010-08-31 21:14:56 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C7D02E1;
Reference = R44;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7D02E2;
Reference = R45;
ValeurCmp = R;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C7D3075;
Reference = R46;
ValeurCmp = 15k;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C7D3098;
Reference = R47;
ValeurCmp = 15k;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C7D32A3;
Reference = R48;
ValeurCmp = 15k;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C7D354D;
Reference = R49;
ValeurCmp = 24;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C7D354C;
Reference = R50;
ValeurCmp = 24;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C7D3508;
Reference = R51;
ValeurCmp = 24;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C7D350E;
Reference = R52;
ValeurCmp = 24;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C7D3661;
Reference = R53;
ValeurCmp = 15k;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C7D3660;
Reference = R54;
ValeurCmp = 15k;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C7D365F;
Reference = R55;
ValeurCmp = 15k;
IdModule = 0402;
EndCmp
PSU Modifying.
2010-09-02 20:55:34 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C7FC13A;
Reference = R56;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7FD244;
Reference = R57;
ValeurCmp = 15K;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C7FC041;
Reference = R58;
ValeurCmp = 1M;
IdModule = 0402;
EndCmp
Fixing label problems, connecting image sensor.
2010-09-25 21:33:12 +03:00
BeginCmp
TimeStamp = /4C9E2B0F/4C9E287F;
Reference = R59;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E289D;
Reference = R60;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B6F;
Reference = R61;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B6E;
Reference = R62;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2BA7;
Reference = R63;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2BA8;
Reference = R64;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B83;
Reference = R65;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B84;
Reference = R66;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B93;
Reference = R67;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B92;
Reference = R68;
ValeurCmp = R;
IdModule = 0402;
EndCmp
Adding FTDI to JTAG/PROG schematic page.
2010-10-16 20:56:21 +03:00
BeginCmp
TimeStamp = /4C716A4D/4CB9D313;
Reference = R69;
ValeurCmp = 1M;
IdModule = 1206;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9C8F1;
Reference = R70;
ValeurCmp = 27;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9C8F8;
Reference = R71;
ValeurCmp = 27;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9C8D7;
Reference = R72;
ValeurCmp = 1.5K;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9C8E1;
Reference = R73;
ValeurCmp = 10K;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9C9A3;
Reference = R74;
ValeurCmp = 470;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9C8A1;
Reference = R75;
ValeurCmp = 10K;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9C8AC;
Reference = R76;
ValeurCmp = 10K;
IdModule = 0402;
EndCmp
Routing VCCO2 source.
2010-10-21 23:27:00 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4CC09480;
Reference = R77;
ValeurCmp = R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4CC0947F;
Reference = R78;
ValeurCmp = R;
IdModule = 0402;
EndCmp
Revition...
2010-11-02 00:50:49 +02:00
BeginCmp
TimeStamp = /4C7BC2A2/4CCF27A7;
Reference = R79;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C7BC2A2/4CCF27A9;
Reference = R80;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C7BC2A2/4CCF27AA;
Reference = R81;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C7BC2A2/4CCF27A8;
Reference = R82;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C7BC2A2/4CCF2733;
Reference = R83;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C7BC2A2/4CCF272F;
Reference = R84;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C7BC2A2/4CCF272E;
Reference = R85;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C7BC2A2/4CCF2730;
Reference = R86;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
Making power source
2010-08-31 03:48:29 +03:00
BeginCmp
TimeStamp = /4C7BC2A2/4C69C6B2;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
Reference = RP1;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69CEE8;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
Reference = RP2;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69D3A3;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
Reference = RP4;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69D3A9;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
Reference = RP5;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69DA8A;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
Reference = RP6;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69DC05;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
Reference = RP7;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69E299;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
Reference = RP8;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69E3A6;
ddr termination placement
2010-08-17 04:56:08 +03:00
Reference = RP9;
Series resistors (DDR) added
2010-08-17 00:32:29 +03:00
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
DDR0 termaintor placement
2010-08-17 06:48:30 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69FC19;
DDR0 termaintor placement
2010-08-17 06:48:30 +03:00
Reference = RP10;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
debug+prog connector added
2010-08-22 21:35:28 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69FCE6;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = RP11;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69FCE8;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = RP12;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C69FCE7;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = RP13;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C6A0D58;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = RP14;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C6A0D57;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = RP15;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C6A0D55;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = RP17;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2A2/4C6A0D54;
debug+prog connector added
2010-08-22 21:35:28 +03:00
Reference = RP18;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
Adding FTDI to JTAG/PROG schematic page.
2010-10-16 20:56:21 +03:00
BeginCmp
TimeStamp = /4C716A4D/4CB9DD95;
Reference = TP1;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD94;
Reference = TP2;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD92;
Reference = TP3;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD93;
Reference = TP4;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD99;
Reference = TP5;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD9A;
Reference = TP6;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD9C;
Reference = TP7;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD9B;
Reference = TP8;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD5B;
Reference = TP9;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD67;
Reference = TP10;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD7D;
Reference = TP11;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DD7C;
Reference = TP12;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DDA3;
Reference = TP13;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DDA2;
Reference = TP14;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DDA0;
Reference = TP15;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
BeginCmp
TimeStamp = /4C716A4D/4CB9DDA1;
Reference = TP16;
ValeurCmp = CONN_1;
IdModule = TP40R;
EndCmp
initial import
2010-07-24 14:58:53 +03:00
BeginCmp
Making power source
2010-08-31 03:48:29 +03:00
TimeStamp = /4C7BC2B2/4C431E53;
initial import
2010-07-24 14:58:53 +03:00
Reference = U1;
ValeurCmp = XC6SLX45FGG484;
eth-phy routing startted
2010-08-19 13:40:42 +03:00
IdModule = FGG484BGA-P10;
initial import
2010-07-24 14:58:53 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C421DD3/4C609B99;
initial import
2010-07-24 14:58:53 +03:00
Reference = U2;
ddr footprint changed
2010-08-10 05:29:52 +03:00
ValeurCmp = MT46V32M16TG;
IdModule = TSOP-66;
initial import
2010-07-24 14:58:53 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C421DD3/4C609C8E;
initial import
2010-07-24 14:58:53 +03:00
Reference = U3;
ddr footprint changed
2010-08-10 05:29:52 +03:00
ValeurCmp = MT46V32M16TG;
IdModule = TSOP-66;
initial import
2010-07-24 14:58:53 +03:00
EndCmp
BeginCmp
TimeStamp = /4C4320F3/4C432132;
Reference = U4;
ValeurCmp = K8001;
IdModule = LQFP48;
EndCmp
BeginCmp
TimeStamp = /4C4227FE/4B76F108;
Reference = U5;
ValeurCmp = NAND;
IdModule = NAND-48TSOP;
EndCmp
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
BeginCmp
USB phy component has been changed
2010-08-23 03:06:02 +03:00
TimeStamp = /4C5F1EDC/4C71BA1D;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
Reference = U6;
USB phy component has been changed
2010-08-23 03:06:02 +03:00
ValeurCmp = MIC2550-MLF;
IdModule = MLF16;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
EndCmp
usb added
2010-08-13 17:27:10 +03:00
BeginCmp
USB phy component has been changed
2010-08-23 03:06:02 +03:00
TimeStamp = /4C5F1EDC/4C71BA25;
usb added
2010-08-13 17:27:10 +03:00
Reference = U7;
USB phy component has been changed
2010-08-23 03:06:02 +03:00
ValeurCmp = MIC2550-MLF;
IdModule = MLF16;
usb added
2010-08-13 17:27:10 +03:00
EndCmp
spi memory added
2010-08-13 23:42:35 +03:00
BeginCmp
TimeStamp = /4C4227FE/4C65A75D;
Reference = U8;
ValeurCmp = X25X64MB;
IdModule = SO8E;
EndCmp
DDR0 termaintor placement
2010-08-17 06:48:30 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C69EE11;
Reference = U9;
ValeurCmp = ATTINY24A-MLF;
IdModule = MLF20m1;
EndCmp
debug+prog connector added
2010-08-22 21:35:28 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C6C9DB9;
Reference = U10;
ValeurCmp = A7130;
IdModule = DFN10;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2AA5;
Reference = U11;
ValeurCmp = A7108;
IdModule = SOT23-5;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C6D2AE0;
Reference = U12;
ValeurCmp = A7108;
IdModule = SOT23-5;
EndCmp
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
BeginCmp
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
TimeStamp = /4C69ED5F/4C7705B0;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
Reference = U13;
FAN4010 initial placement
2010-08-27 04:25:21 +03:00
ValeurCmp = FAN4010;
IdModule = MLP6;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C770714;
Reference = U14;
ValeurCmp = FAN4010;
IdModule = MLP6;
USB A Phy has been routed
2010-08-24 14:59:29 +03:00
EndCmp
Making power source
2010-08-31 03:48:29 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C79C65B;
Reference = U15;
ValeurCmp = A7117;
IdModule = SOT23_6;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C79C99A;
Reference = U16;
ValeurCmp = FAN4010;
IdModule = MLP6;
EndCmp
Modifying USB H-D
2010-08-31 21:14:56 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4C7D02E3;
Reference = U17;
ValeurCmp = FAN4010;
IdModule = MLP6;
EndCmp
Fixing label problems, connecting image sensor.
2010-09-25 21:33:12 +03:00
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2848;
Reference = U18;
ValeurCmp = TPS793XX;
IdModule = SOT23_6;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B72;
Reference = U19;
ValeurCmp = TPS793XX;
IdModule = SOT23_6;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2BA4;
Reference = U20;
ValeurCmp = TPS793XX;
IdModule = SOT23_6;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B80;
Reference = U22;
ValeurCmp = TPS793XX;
IdModule = SOT23_6;
EndCmp
BeginCmp
TimeStamp = /4C9E2B0F/4C9E2B96;
Reference = U23;
ValeurCmp = TPS793XX;
IdModule = SOT23_6;
EndCmp
BeginCmp
TimeStamp = /4C9E2AF4/4C9E3B7C;
Reference = U24;
ValeurCmp = MT9M033;
Connecting image sensor.
2010-09-26 03:08:24 +03:00
IdModule = iLCC-48;
Fixing label problems, connecting image sensor.
2010-09-25 21:33:12 +03:00
EndCmp
Routing VCCO2 source.
2010-10-21 23:27:00 +03:00
BeginCmp
TimeStamp = /4C69ED5F/4CC09483;
Reference = U25;
ValeurCmp = TPS793XX;
IdModule = SOT23_6;
EndCmp
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C5F1EDC/4C5F2CA7;
Reference = V1;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
ValeurCmp = V0402MHS03;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0603;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
EndCmp
BeginCmp
ddr footprint changed
2010-08-10 05:29:52 +03:00
TimeStamp = /4C5F1EDC/4C5F2CA3;
Reference = V2;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
ValeurCmp = V0402MHS03;
annotate
2010-08-10 05:55:50 +03:00
IdModule = 0603;
Ethernet-phy and USB connected to FPGA
2010-08-09 23:37:18 +03:00
EndCmp
usb added
2010-08-13 17:27:10 +03:00
BeginCmp
TimeStamp = /4C5F1EDC/4C6552B8;
Reference = V3;
ValeurCmp = V0402MHS03;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C6552B9;
Reference = V4;
ValeurCmp = V0402MHS03;
IdModule = 0603;
EndCmp
Adding FTDI to JTAG/PROG schematic page.
2010-10-16 20:56:21 +03:00
BeginCmp
Adding M[0] M[1] configuration and fpga crystal
2010-11-05 04:13:46 +02:00
TimeStamp = /4C716A4D/4CD349DF;
Adding FTDI to JTAG/PROG schematic page.
2010-10-16 20:56:21 +03:00
Reference = X1;
Adding M[0] M[1] configuration and fpga crystal
2010-11-05 04:13:46 +02:00
ValeurCmp = FXO-HC536R;
IdModule = CRYSTAL;
EndCmp
BeginCmp
TimeStamp = /4C7BC2B2/4CD34D72;
Reference = X2;
ValeurCmp = FXO-HC536R;
Adding FTDI to JTAG/PROG schematic page.
2010-10-16 20:56:21 +03:00
IdModule = CRYSTAL;
EndCmp
initial import
2010-07-24 14:58:53 +03:00
EndListe
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