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xue/kicad/xue-rnc/xue-rnc.brd

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2010-08-19 16:51:56 +03:00
PCBNEW-BOARD Version 1 date Thu 19 Aug 2010 08:38:11 AM COT
2010-08-17 03:06:33 +03:00
2010-08-19 16:51:56 +03:00
# Created by Pcbnew(2010-07-15 BZR 2414)-unstable
2010-07-24 14:58:53 +03:00
$GENERAL
2010-08-13 14:16:55 +03:00
LayerCount 6
Ly 1FFF801F
2010-08-19 04:15:48 +03:00
EnabledLayers 13FF801F
2010-08-19 16:51:56 +03:00
Links 675
NoConn 650
2010-08-19 04:15:48 +03:00
Di 45200 13470 70189 50668
2010-08-14 18:43:33 +03:00
Ndraw 7
2010-08-19 13:40:42 +03:00
Ntrack 271
2010-07-24 14:58:53 +03:00
Nzone 0
2010-08-17 03:06:33 +03:00
BoardThickness 630
2010-08-19 16:51:56 +03:00
Nmodule 161
Nnets 252
2010-07-24 14:58:53 +03:00
$EndGENERAL
$SHEETDESCR
Sheet A4 11700 8267
Title ""
2010-08-19 04:15:48 +03:00
Date "19 aug 2010"
2010-07-24 14:58:53 +03:00
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndSHEETDESCR
$SETUP
InternalUnit 0.000100 INCH
ZoneGridSize 250
2010-08-13 14:16:55 +03:00
Layers 6
2010-07-24 14:58:53 +03:00
Layer[0] Back signal
2010-08-19 04:15:48 +03:00
Layer[1] Inner2 power
2010-07-24 14:58:53 +03:00
Layer[2] Inner3 signal
2010-08-13 14:16:55 +03:00
Layer[3] Inner4 signal
2010-08-19 04:15:48 +03:00
Layer[4] Inner5 power
2010-07-24 14:58:53 +03:00
Layer[15] Front signal
2010-08-17 05:49:00 +03:00
TrackWidth 39
2010-08-19 04:15:48 +03:00
TrackClearence 59
2010-07-24 14:58:53 +03:00
ZoneClearence 200
2010-08-17 05:49:00 +03:00
TrackMinWidth 39
2010-07-24 14:58:53 +03:00
DrawSegmWidth 150
EdgeSegmWidth 150
2010-08-19 06:09:52 +03:00
ViaSize 157
2010-08-17 05:49:00 +03:00
ViaDrill 79
2010-08-19 06:09:52 +03:00
ViaMinSize 157
2010-08-17 05:49:00 +03:00
ViaMinDrill 79
MicroViaSize 197
MicroViaDrill 79
2010-07-24 14:58:53 +03:00
MicroViasAllowed 0
2010-08-19 06:09:52 +03:00
MicroViaMinSize 157
2010-08-17 05:49:00 +03:00
MicroViaMinDrill 59
2010-07-24 14:58:53 +03:00
TextPcbWidth 120
2010-08-18 03:04:05 +03:00
TextPcbSize 394 591
2010-08-17 00:32:29 +03:00
EdgeModWidth 59
2010-07-24 14:58:53 +03:00
TextModSize 600 600
TextModWidth 120
2010-08-17 00:32:29 +03:00
PadSize 197 157
2010-08-14 06:09:52 +03:00
PadDrill 0
2010-08-17 03:06:33 +03:00
Pad2MaskClearance 100
2010-07-24 14:58:53 +03:00
AuxiliaryAxisOrg 0 0
$EndSETUP
$EQUIPOT
Na 0 ""
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-17 03:06:33 +03:00
Na 1 "+1.2V"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-17 03:06:33 +03:00
Na 2 "+1.8V"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-17 03:06:33 +03:00
Na 3 "+2.5V"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-17 03:06:33 +03:00
Na 4 "+3.3V"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-17 03:06:33 +03:00
Na 5 "+5V"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 6 "/DDR_Banks/M0_A0"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 7 "/DDR_Banks/M0_CKE"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 8 "/DDR_Banks/M0_CLK"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 9 "/DDR_Banks/M0_CLK#"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 10 "/DDR_Banks/M0_DQ1"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 11 "/DDR_Banks/M0_DQ10"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 12 "/DDR_Banks/M0_DQ11"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 13 "/DDR_Banks/M0_DQ12"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 14 "/DDR_Banks/M0_DQ13"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 15 "/DDR_Banks/M0_DQ14"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 16 "/DDR_Banks/M0_LDM"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 17 "/DDR_Banks/M0_LDQS"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 18 "/DDR_Banks/M0_RAS#"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 06:09:52 +03:00
Na 19 "/DDR_Banks/M0_UDQS"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 06:09:52 +03:00
Na 20 "/DDR_Banks/M1_A10"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 21 "/DDR_Banks/M1_A12"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 22 "/DDR_Banks/M1_A6"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 23 "/DDR_Banks/M1_A8"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 24 "/DDR_Banks/M1_BA0"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 25 "/DDR_Banks/M1_BA1"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 26 "/DDR_Banks/M1_CLK#"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 27 "/DDR_Banks/M1_CS#"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 28 "/DDR_Banks/M1_DQ1"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 29 "/DDR_Banks/M1_DQ10"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 30 "/DDR_Banks/M1_DQ11"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 31 "/DDR_Banks/M1_DQ12"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 32 "/DDR_Banks/M1_DQ13"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 33 "/DDR_Banks/M1_DQ3"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 34 "/DDR_Banks/M1_LDQS"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 35 "/DDR_Banks/M1_WE#"
2010-08-09 23:37:18 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 36 "/Ethernet_Phy/ETH_A1.8V"
2010-08-10 05:55:50 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 37 "/Ethernet_Phy/ETH_A3.3V"
2010-08-10 05:55:50 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 38 "/Ethernet_Phy/ETH_CLK"
2010-08-10 05:55:50 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 39 "/Ethernet_Phy/ETH_CRS"
2010-08-10 06:25:05 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 40 "/Ethernet_Phy/ETH_LED0"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 41 "/Ethernet_Phy/ETH_LED1"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 42 "/Ethernet_Phy/ETH_MDC"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 43 "/Ethernet_Phy/ETH_PLL1.8V"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 44 "/Ethernet_Phy/ETH_RXD0"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 45 "/Ethernet_Phy/ETH_RXD1"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 46 "/Ethernet_Phy/ETH_RXD2"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 47 "/Ethernet_Phy/ETH_RXD3"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 48 "/Ethernet_Phy/ETH_RXDV"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 49 "/Ethernet_Phy/ETH_RXER"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 50 "/Ethernet_Phy/ETH_TXD1"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 51 "/Ethernet_Phy/ETH_TXEN"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 52 "/Ethernet_Phy/ETH_TXER"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 53 "/FPGA_Spartan6/ETH_COL"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 54 "/FPGA_Spartan6/ETH_INT"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 55 "/FPGA_Spartan6/ETH_MDIO"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 56 "/FPGA_Spartan6/ETH_RESET_N"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 57 "/FPGA_Spartan6/ETH_RXC"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 58 "/FPGA_Spartan6/ETH_TXC"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 59 "/FPGA_Spartan6/ETH_TXD0"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 60 "/FPGA_Spartan6/ETH_TXD2"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 61 "/FPGA_Spartan6/ETH_TXD3"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 62 "/FPGA_Spartan6/M0_A1"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 63 "/FPGA_Spartan6/M0_A10"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 64 "/FPGA_Spartan6/M0_A11"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 65 "/FPGA_Spartan6/M0_A12"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 66 "/FPGA_Spartan6/M0_A2"
2010-08-11 01:38:37 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 67 "/FPGA_Spartan6/M0_A3"
2010-08-11 02:09:38 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 68 "/FPGA_Spartan6/M0_A4"
2010-08-11 02:09:38 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 69 "/FPGA_Spartan6/M0_A5"
2010-08-11 02:09:38 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 70 "/FPGA_Spartan6/M0_A6"
2010-08-11 02:09:38 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 71 "/FPGA_Spartan6/M0_A7"
2010-08-11 02:09:38 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 72 "/FPGA_Spartan6/M0_A8"
2010-08-11 02:09:38 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 73 "/FPGA_Spartan6/M0_A9"
2010-08-11 05:25:32 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 74 "/FPGA_Spartan6/M0_BA0"
2010-08-11 05:25:32 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 75 "/FPGA_Spartan6/M0_BA1"
2010-07-24 14:58:53 +03:00
St ~
$EndEQUIPOT
2010-08-13 00:12:57 +03:00
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 76 "/FPGA_Spartan6/M0_CAS#"
2010-08-13 00:12:57 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 77 "/FPGA_Spartan6/M0_DQ0"
2010-08-13 00:12:57 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 78 "/FPGA_Spartan6/M0_DQ15"
2010-08-13 05:12:14 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 79 "/FPGA_Spartan6/M0_DQ2"
2010-08-13 05:12:14 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 80 "/FPGA_Spartan6/M0_DQ3"
2010-08-13 05:12:14 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 81 "/FPGA_Spartan6/M0_DQ4"
2010-08-13 05:12:14 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 82 "/FPGA_Spartan6/M0_DQ5"
2010-08-13 05:12:14 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 83 "/FPGA_Spartan6/M0_DQ6"
2010-08-13 05:12:14 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 84 "/FPGA_Spartan6/M0_DQ7"
2010-08-13 05:12:14 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 85 "/FPGA_Spartan6/M0_DQ8"
2010-08-13 05:12:14 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 86 "/FPGA_Spartan6/M0_DQ9"
2010-08-13 17:27:10 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 87 "/FPGA_Spartan6/M0_UDM"
2010-08-13 17:27:10 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 88 "/FPGA_Spartan6/M0_WE#"
2010-08-13 17:27:10 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 89 "/FPGA_Spartan6/M1_A0"
2010-08-13 17:27:10 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 90 "/FPGA_Spartan6/M1_A1"
2010-08-13 17:27:10 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 91 "/FPGA_Spartan6/M1_A11"
2010-08-14 01:34:12 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 92 "/FPGA_Spartan6/M1_A2"
2010-08-14 01:34:12 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 93 "/FPGA_Spartan6/M1_A3"
2010-08-14 01:34:12 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 94 "/FPGA_Spartan6/M1_A4"
2010-08-14 01:34:12 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 95 "/FPGA_Spartan6/M1_A5"
2010-08-14 01:34:12 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 96 "/FPGA_Spartan6/M1_A7"
2010-08-14 01:34:12 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 97 "/FPGA_Spartan6/M1_A9"
2010-08-13 00:12:57 +03:00
St ~
$EndEQUIPOT
2010-08-14 02:20:50 +03:00
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 98 "/FPGA_Spartan6/M1_CAS#"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 99 "/FPGA_Spartan6/M1_CKE"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 100 "/FPGA_Spartan6/M1_CLK"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 101 "/FPGA_Spartan6/M1_DQ0"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 102 "/FPGA_Spartan6/M1_DQ14"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 103 "/FPGA_Spartan6/M1_DQ15"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 104 "/FPGA_Spartan6/M1_DQ2"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 105 "/FPGA_Spartan6/M1_DQ4"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 106 "/FPGA_Spartan6/M1_DQ5"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 107 "/FPGA_Spartan6/M1_DQ6"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 108 "/FPGA_Spartan6/M1_DQ7"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 109 "/FPGA_Spartan6/M1_DQ8"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 110 "/FPGA_Spartan6/M1_DQ9"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 111 "/FPGA_Spartan6/M1_LDM"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 112 "/FPGA_Spartan6/M1_RAS#"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 113 "/FPGA_Spartan6/M1_UDM"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 06:09:52 +03:00
Na 114 "/FPGA_Spartan6/M1_UDQS"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 115 "/FPGA_Spartan6/NF_CLE"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 116 "/FPGA_Spartan6/NF_CS1_N"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 06:09:52 +03:00
Na 117 "/FPGA_Spartan6/NF_D0"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 06:09:52 +03:00
Na 118 "/FPGA_Spartan6/NF_D1"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 119 "/FPGA_Spartan6/NF_D5"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 120 "/FPGA_Spartan6/NF_D7"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 121 "/FPGA_Spartan6/PROG_CCLK"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 122 "/FPGA_Spartan6/PROG_CSO"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 123 "/FPGA_Spartan6/PROG_MISO0"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 124 "/FPGA_Spartan6/PROG_MISO1"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 125 "/FPGA_Spartan6/PROG_MISO2"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 126 "/FPGA_Spartan6/PROG_MISO3"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 127 "/FPGA_Spartan6/R_M0_A0"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 128 "/FPGA_Spartan6/R_M0_A1"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 129 "/FPGA_Spartan6/R_M0_A10"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 130 "/FPGA_Spartan6/R_M0_A11"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 131 "/FPGA_Spartan6/R_M0_A12"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 132 "/FPGA_Spartan6/R_M0_A2"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 133 "/FPGA_Spartan6/R_M0_A3"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 134 "/FPGA_Spartan6/R_M0_A4"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 135 "/FPGA_Spartan6/R_M0_A5"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 136 "/FPGA_Spartan6/R_M0_A6"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 137 "/FPGA_Spartan6/R_M0_A7"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 138 "/FPGA_Spartan6/R_M0_A8"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 139 "/FPGA_Spartan6/R_M0_A9"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 140 "/FPGA_Spartan6/R_M0_BA0"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 141 "/FPGA_Spartan6/R_M0_BA1"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 142 "/FPGA_Spartan6/R_M0_CAS#"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 143 "/FPGA_Spartan6/R_M0_CKE"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 144 "/FPGA_Spartan6/R_M0_DQ0"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 145 "/FPGA_Spartan6/R_M0_DQ1"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 146 "/FPGA_Spartan6/R_M0_DQ10"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 147 "/FPGA_Spartan6/R_M0_DQ11"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 148 "/FPGA_Spartan6/R_M0_DQ12"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 149 "/FPGA_Spartan6/R_M0_DQ13"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 150 "/FPGA_Spartan6/R_M0_DQ14"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 151 "/FPGA_Spartan6/R_M0_DQ15"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 152 "/FPGA_Spartan6/R_M0_DQ2"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 153 "/FPGA_Spartan6/R_M0_DQ3"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 154 "/FPGA_Spartan6/R_M0_DQ4"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 155 "/FPGA_Spartan6/R_M0_DQ5"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 156 "/FPGA_Spartan6/R_M0_DQ6"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 157 "/FPGA_Spartan6/R_M0_DQ7"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 158 "/FPGA_Spartan6/R_M0_DQ8"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 159 "/FPGA_Spartan6/R_M0_DQ9"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 160 "/FPGA_Spartan6/R_M0_LDM"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 161 "/FPGA_Spartan6/R_M0_LDQS"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 162 "/FPGA_Spartan6/R_M0_RAS#"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 163 "/FPGA_Spartan6/R_M0_UDM"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 164 "/FPGA_Spartan6/R_M0_UDQS"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 165 "/FPGA_Spartan6/R_M0_WE#"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 166 "/FPGA_Spartan6/R_M1_A0"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 167 "/FPGA_Spartan6/R_M1_A1"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 168 "/FPGA_Spartan6/R_M1_A10"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 169 "/FPGA_Spartan6/R_M1_A11"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 170 "/FPGA_Spartan6/R_M1_A12"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 171 "/FPGA_Spartan6/R_M1_A2"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 172 "/FPGA_Spartan6/R_M1_A3"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 173 "/FPGA_Spartan6/R_M1_A5"
2010-08-17 00:32:29 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 174 "/FPGA_Spartan6/R_M1_A6"
2010-08-17 03:36:21 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 175 "/FPGA_Spartan6/R_M1_A7"
2010-08-17 03:36:21 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 176 "/FPGA_Spartan6/R_M1_A8"
2010-08-17 03:36:21 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 177 "/FPGA_Spartan6/R_M1_A9"
2010-08-17 03:36:21 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 178 "/FPGA_Spartan6/R_M1_BA0"
2010-08-17 03:36:21 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 179 "/FPGA_Spartan6/R_M1_BA1"
2010-08-17 03:36:21 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 180 "/FPGA_Spartan6/R_M1_CAS#"
2010-08-17 03:36:21 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 181 "/FPGA_Spartan6/R_M1_CKE"
2010-08-17 03:36:21 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 182 "/FPGA_Spartan6/R_M1_CS#"
2010-08-17 03:36:21 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 183 "/FPGA_Spartan6/R_M1_DQ0"
2010-08-17 03:36:21 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 184 "/FPGA_Spartan6/R_M1_DQ1"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 185 "/FPGA_Spartan6/R_M1_DQ10"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 186 "/FPGA_Spartan6/R_M1_DQ11"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 187 "/FPGA_Spartan6/R_M1_DQ12"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 188 "/FPGA_Spartan6/R_M1_DQ13"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 189 "/FPGA_Spartan6/R_M1_DQ14"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 190 "/FPGA_Spartan6/R_M1_DQ15"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 191 "/FPGA_Spartan6/R_M1_DQ2"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 192 "/FPGA_Spartan6/R_M1_DQ3"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 193 "/FPGA_Spartan6/R_M1_DQ4"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 194 "/FPGA_Spartan6/R_M1_DQ5"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 195 "/FPGA_Spartan6/R_M1_DQ6"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 196 "/FPGA_Spartan6/R_M1_DQ7"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 197 "/FPGA_Spartan6/R_M1_DQ8"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 198 "/FPGA_Spartan6/R_M1_DQ9"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 199 "/FPGA_Spartan6/R_M1_LDM"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 200 "/FPGA_Spartan6/R_M1_LDQS"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 201 "/FPGA_Spartan6/R_M1_RAS#"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 202 "/FPGA_Spartan6/R_M1_UDM"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 203 "/FPGA_Spartan6/R_M1_UDQS"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 204 "/FPGA_Spartan6/R_M1_WE#"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 205 "/FPGA_Spartan6/SD_DAT3"
2010-08-17 04:56:08 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 206 "/FPGA_Spartan6/USBA_OE_N"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 207 "/FPGA_Spartan6/USBA_SPD"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 208 "/Non_volatile_memories/NF_ALE"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 209 "/Non_volatile_memories/NF_D2"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 210 "/Non_volatile_memories/NF_D3"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 211 "/Non_volatile_memories/NF_D4"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 212 "/Non_volatile_memories/NF_D6"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 213 "/Non_volatile_memories/NF_RE_N"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 214 "/Non_volatile_memories/NF_RNB"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 215 "/Non_volatile_memories/NF_WE_N"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 216 "/Non_volatile_memories/SD_CLK"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 217 "/Non_volatile_memories/SD_CMD"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 218 "/Non_volatile_memories/SD_DAT0"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 219 "/Non_volatile_memories/SD_DAT1"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 06:09:52 +03:00
Na 220 "/Non_volatile_memories/SD_DAT2"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 221 "/USB/USBA_RCV"
2010-08-17 06:48:30 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 222 "/USB/USBA_VM"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 06:09:52 +03:00
Na 223 "/USB/USBA_VP"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-18 03:04:05 +03:00
Na 224 "GND"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-18 03:04:05 +03:00
Na 225 "N-000058"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-18 03:04:05 +03:00
Na 226 "N-000059"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 227 "N-000395"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 228 "N-000396"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 229 "N-000397"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 230 "N-000402"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 231 "N-000403"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 232 "N-000404"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 233 "N-000405"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 234 "N-000406"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 235 "N-000422"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 236 "N-000424"
2010-08-17 07:30:34 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 237 "N-000425"
2010-08-18 03:04:05 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 238 "N-000426"
2010-08-18 03:04:05 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 239 "N-000427"
2010-08-18 03:04:05 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 240 "N-000429"
2010-08-18 03:04:05 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 241 "N-000430"
2010-08-18 03:04:05 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 242 "N-000431"
2010-08-18 03:04:05 +03:00
St ~
$EndEQUIPOT
$EQUIPOT
Na 243 "N-000432"
St ~
$EndEQUIPOT
$EQUIPOT
Na 244 "N-000433"
St ~
$EndEQUIPOT
$EQUIPOT
2010-08-19 16:51:56 +03:00
Na 245 "N-000434"
St ~
$EndEQUIPOT
$EQUIPOT
Na 246 "N-000435"
St ~
$EndEQUIPOT
$EQUIPOT
Na 247 "N-000436"
St ~
$EndEQUIPOT
$EQUIPOT
Na 248 "N-000437"
St ~
$EndEQUIPOT
$EQUIPOT
Na 249 "N-000447"
St ~
$EndEQUIPOT
$EQUIPOT
Na 250 "N-000466"
St ~
$EndEQUIPOT
$EQUIPOT
Na 251 "VCCO2"
2010-08-14 02:20:50 +03:00
St ~
$EndEQUIPOT
2010-08-17 03:06:33 +03:00
$NCLASS
Name "Default"
Desc "This is the default net class."
2010-08-19 04:15:48 +03:00
Clearance 59
2010-08-17 05:49:00 +03:00
TrackWidth 39
2010-08-19 06:09:52 +03:00
ViaDia 157
2010-08-17 05:49:00 +03:00
ViaDrill 79
uViaDia 197
uViaDrill 79
2010-08-17 03:06:33 +03:00
AddNet ""
AddNet "+1.2V"
AddNet "+1.8V"
AddNet "+2.5V"
AddNet "+3.3V"
AddNet "+5V"
2010-08-19 16:51:56 +03:00
AddNet "/DDR_Banks/M0_A0"
AddNet "/DDR_Banks/M0_CKE"
2010-08-18 03:04:05 +03:00
AddNet "/DDR_Banks/M0_CLK"
2010-08-19 16:51:56 +03:00
AddNet "/DDR_Banks/M0_CLK#"
AddNet "/DDR_Banks/M0_DQ1"
AddNet "/DDR_Banks/M0_DQ10"
AddNet "/DDR_Banks/M0_DQ11"
2010-08-19 16:51:56 +03:00
AddNet "/DDR_Banks/M0_DQ12"
AddNet "/DDR_Banks/M0_DQ13"
2010-08-19 06:09:52 +03:00
AddNet "/DDR_Banks/M0_DQ14"
2010-08-19 16:51:56 +03:00
AddNet "/DDR_Banks/M0_LDM"
2010-08-19 06:09:52 +03:00
AddNet "/DDR_Banks/M0_LDQS"
2010-08-19 16:51:56 +03:00
AddNet "/DDR_Banks/M0_RAS#"
2010-08-19 06:09:52 +03:00
AddNet "/DDR_Banks/M0_UDQS"
AddNet "/DDR_Banks/M1_A10"
2010-08-19 16:51:56 +03:00
AddNet "/DDR_Banks/M1_A12"
AddNet "/DDR_Banks/M1_A6"
AddNet "/DDR_Banks/M1_A8"
AddNet "/DDR_Banks/M1_BA0"
2010-08-19 06:09:52 +03:00
AddNet "/DDR_Banks/M1_BA1"
AddNet "/DDR_Banks/M1_CLK#"
2010-08-19 16:51:56 +03:00
AddNet "/DDR_Banks/M1_CS#"
AddNet "/DDR_Banks/M1_DQ1"
AddNet "/DDR_Banks/M1_DQ10"
AddNet "/DDR_Banks/M1_DQ11"
AddNet "/DDR_Banks/M1_DQ12"
AddNet "/DDR_Banks/M1_DQ13"
2010-08-18 03:04:05 +03:00
AddNet "/DDR_Banks/M1_DQ3"
2010-08-19 06:09:52 +03:00
AddNet "/DDR_Banks/M1_LDQS"
AddNet "/DDR_Banks/M1_WE#"
2010-08-17 07:30:34 +03:00
AddNet "/Ethernet_Phy/ETH_CLK"
AddNet "/Ethernet_Phy/ETH_CRS"
AddNet "/Ethernet_Phy/ETH_MDC"
2010-08-19 16:51:56 +03:00
AddNet "/Ethernet_Phy/ETH_RXD0"
2010-08-17 03:06:33 +03:00
AddNet "/Ethernet_Phy/ETH_RXD1"
2010-08-19 16:51:56 +03:00
AddNet "/Ethernet_Phy/ETH_RXD2"
2010-08-18 03:04:05 +03:00
AddNet "/Ethernet_Phy/ETH_RXD3"
2010-08-19 16:51:56 +03:00
AddNet "/Ethernet_Phy/ETH_RXDV"
AddNet "/Ethernet_Phy/ETH_RXER"
AddNet "/Ethernet_Phy/ETH_TXD1"
AddNet "/Ethernet_Phy/ETH_TXEN"
AddNet "/Ethernet_Phy/ETH_TXER"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/ETH_COL"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/ETH_INT"
AddNet "/FPGA_Spartan6/ETH_MDIO"
2010-08-17 03:06:33 +03:00
AddNet "/FPGA_Spartan6/ETH_RESET_N"
AddNet "/FPGA_Spartan6/ETH_RXC"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/ETH_TXC"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/ETH_TXD0"
AddNet "/FPGA_Spartan6/ETH_TXD2"
AddNet "/FPGA_Spartan6/ETH_TXD3"
2010-08-17 06:48:30 +03:00
AddNet "/FPGA_Spartan6/M0_A1"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/M0_A10"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M0_A11"
AddNet "/FPGA_Spartan6/M0_A12"
AddNet "/FPGA_Spartan6/M0_A2"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/M0_A3"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/M0_A4"
2010-08-17 06:48:30 +03:00
AddNet "/FPGA_Spartan6/M0_A5"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M0_A6"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/M0_A7"
AddNet "/FPGA_Spartan6/M0_A8"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M0_A9"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/M0_BA0"
2010-08-17 07:30:34 +03:00
AddNet "/FPGA_Spartan6/M0_BA1"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M0_CAS#"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/M0_DQ0"
AddNet "/FPGA_Spartan6/M0_DQ15"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/M0_DQ2"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M0_DQ3"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/M0_DQ4"
AddNet "/FPGA_Spartan6/M0_DQ5"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M0_DQ6"
AddNet "/FPGA_Spartan6/M0_DQ7"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/M0_DQ8"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M0_DQ9"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/M0_UDM"
2010-08-17 07:30:34 +03:00
AddNet "/FPGA_Spartan6/M0_WE#"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/M1_A0"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/M1_A1"
2010-08-17 03:36:21 +03:00
AddNet "/FPGA_Spartan6/M1_A11"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M1_A2"
AddNet "/FPGA_Spartan6/M1_A3"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M1_A4"
2010-08-17 07:30:34 +03:00
AddNet "/FPGA_Spartan6/M1_A5"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M1_A7"
AddNet "/FPGA_Spartan6/M1_A9"
AddNet "/FPGA_Spartan6/M1_CAS#"
AddNet "/FPGA_Spartan6/M1_CKE"
AddNet "/FPGA_Spartan6/M1_CLK"
AddNet "/FPGA_Spartan6/M1_DQ0"
AddNet "/FPGA_Spartan6/M1_DQ14"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/M1_DQ15"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M1_DQ2"
2010-08-17 05:49:00 +03:00
AddNet "/FPGA_Spartan6/M1_DQ4"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/M1_DQ5"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M1_DQ6"
AddNet "/FPGA_Spartan6/M1_DQ7"
AddNet "/FPGA_Spartan6/M1_DQ8"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/M1_DQ9"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/M1_LDM"
AddNet "/FPGA_Spartan6/M1_RAS#"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/M1_UDM"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/M1_UDQS"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/NF_CLE"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/NF_CS1_N"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/NF_D0"
AddNet "/FPGA_Spartan6/NF_D1"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/NF_D5"
AddNet "/FPGA_Spartan6/NF_D7"
2010-08-17 03:06:33 +03:00
AddNet "/FPGA_Spartan6/PROG_CCLK"
AddNet "/FPGA_Spartan6/PROG_CSO"
AddNet "/FPGA_Spartan6/PROG_MISO0"
AddNet "/FPGA_Spartan6/PROG_MISO1"
AddNet "/FPGA_Spartan6/PROG_MISO2"
AddNet "/FPGA_Spartan6/PROG_MISO3"
2010-08-17 07:30:34 +03:00
AddNet "/FPGA_Spartan6/R_M0_A0"
AddNet "/FPGA_Spartan6/R_M0_A1"
AddNet "/FPGA_Spartan6/R_M0_A10"
AddNet "/FPGA_Spartan6/R_M0_A11"
AddNet "/FPGA_Spartan6/R_M0_A12"
AddNet "/FPGA_Spartan6/R_M0_A2"
AddNet "/FPGA_Spartan6/R_M0_A3"
AddNet "/FPGA_Spartan6/R_M0_A4"
AddNet "/FPGA_Spartan6/R_M0_A5"
AddNet "/FPGA_Spartan6/R_M0_A6"
AddNet "/FPGA_Spartan6/R_M0_A7"
AddNet "/FPGA_Spartan6/R_M0_A8"
AddNet "/FPGA_Spartan6/R_M0_A9"
AddNet "/FPGA_Spartan6/R_M0_BA0"
AddNet "/FPGA_Spartan6/R_M0_BA1"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/R_M0_CAS#"
AddNet "/FPGA_Spartan6/R_M0_CKE"
2010-08-17 06:48:30 +03:00
AddNet "/FPGA_Spartan6/R_M0_DQ0"
AddNet "/FPGA_Spartan6/R_M0_DQ1"
AddNet "/FPGA_Spartan6/R_M0_DQ10"
AddNet "/FPGA_Spartan6/R_M0_DQ11"
AddNet "/FPGA_Spartan6/R_M0_DQ12"
AddNet "/FPGA_Spartan6/R_M0_DQ13"
AddNet "/FPGA_Spartan6/R_M0_DQ14"
AddNet "/FPGA_Spartan6/R_M0_DQ15"
AddNet "/FPGA_Spartan6/R_M0_DQ2"
AddNet "/FPGA_Spartan6/R_M0_DQ3"
AddNet "/FPGA_Spartan6/R_M0_DQ4"
AddNet "/FPGA_Spartan6/R_M0_DQ5"
AddNet "/FPGA_Spartan6/R_M0_DQ6"
AddNet "/FPGA_Spartan6/R_M0_DQ7"
AddNet "/FPGA_Spartan6/R_M0_DQ8"
AddNet "/FPGA_Spartan6/R_M0_DQ9"
2010-08-18 03:04:05 +03:00
AddNet "/FPGA_Spartan6/R_M0_LDM"
AddNet "/FPGA_Spartan6/R_M0_LDQS"
AddNet "/FPGA_Spartan6/R_M0_RAS#"
AddNet "/FPGA_Spartan6/R_M0_UDM"
AddNet "/FPGA_Spartan6/R_M0_UDQS"
AddNet "/FPGA_Spartan6/R_M0_WE#"
2010-08-17 03:06:33 +03:00
AddNet "/FPGA_Spartan6/R_M1_A0"
AddNet "/FPGA_Spartan6/R_M1_A1"
2010-08-17 04:56:08 +03:00
AddNet "/FPGA_Spartan6/R_M1_A10"
AddNet "/FPGA_Spartan6/R_M1_A11"
AddNet "/FPGA_Spartan6/R_M1_A12"
2010-08-17 03:06:33 +03:00
AddNet "/FPGA_Spartan6/R_M1_A2"
AddNet "/FPGA_Spartan6/R_M1_A3"
2010-08-17 04:56:08 +03:00
AddNet "/FPGA_Spartan6/R_M1_A5"
AddNet "/FPGA_Spartan6/R_M1_A6"
AddNet "/FPGA_Spartan6/R_M1_A7"
AddNet "/FPGA_Spartan6/R_M1_A8"
AddNet "/FPGA_Spartan6/R_M1_A9"
2010-08-17 03:06:33 +03:00
AddNet "/FPGA_Spartan6/R_M1_BA0"
AddNet "/FPGA_Spartan6/R_M1_BA1"
AddNet "/FPGA_Spartan6/R_M1_CAS#"
2010-08-17 04:56:08 +03:00
AddNet "/FPGA_Spartan6/R_M1_CKE"
AddNet "/FPGA_Spartan6/R_M1_CS#"
2010-08-17 03:36:21 +03:00
AddNet "/FPGA_Spartan6/R_M1_DQ0"
AddNet "/FPGA_Spartan6/R_M1_DQ1"
2010-08-17 04:56:08 +03:00
AddNet "/FPGA_Spartan6/R_M1_DQ10"
AddNet "/FPGA_Spartan6/R_M1_DQ11"
AddNet "/FPGA_Spartan6/R_M1_DQ12"
AddNet "/FPGA_Spartan6/R_M1_DQ13"
AddNet "/FPGA_Spartan6/R_M1_DQ14"
AddNet "/FPGA_Spartan6/R_M1_DQ15"
2010-08-17 03:36:21 +03:00
AddNet "/FPGA_Spartan6/R_M1_DQ2"
AddNet "/FPGA_Spartan6/R_M1_DQ3"
AddNet "/FPGA_Spartan6/R_M1_DQ4"
AddNet "/FPGA_Spartan6/R_M1_DQ5"
AddNet "/FPGA_Spartan6/R_M1_DQ6"
AddNet "/FPGA_Spartan6/R_M1_DQ7"
2010-08-17 04:56:08 +03:00
AddNet "/FPGA_Spartan6/R_M1_DQ8"
AddNet "/FPGA_Spartan6/R_M1_DQ9"
2010-08-17 03:36:21 +03:00
AddNet "/FPGA_Spartan6/R_M1_LDM"
AddNet "/FPGA_Spartan6/R_M1_LDQS"
2010-08-17 03:06:33 +03:00
AddNet "/FPGA_Spartan6/R_M1_RAS#"
2010-08-17 04:56:08 +03:00
AddNet "/FPGA_Spartan6/R_M1_UDM"
AddNet "/FPGA_Spartan6/R_M1_UDQS"
2010-08-17 03:36:21 +03:00
AddNet "/FPGA_Spartan6/R_M1_WE#"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/SD_DAT3"
2010-08-19 06:09:52 +03:00
AddNet "/FPGA_Spartan6/USBA_OE_N"
2010-08-19 16:51:56 +03:00
AddNet "/FPGA_Spartan6/USBA_SPD"
AddNet "/Non_volatile_memories/NF_ALE"
AddNet "/Non_volatile_memories/NF_D2"
2010-08-19 16:51:56 +03:00
AddNet "/Non_volatile_memories/NF_D3"
AddNet "/Non_volatile_memories/NF_D4"
AddNet "/Non_volatile_memories/NF_D6"
AddNet "/Non_volatile_memories/NF_RE_N"
AddNet "/Non_volatile_memories/NF_RNB"
AddNet "/Non_volatile_memories/NF_WE_N"
AddNet "/Non_volatile_memories/SD_CLK"
AddNet "/Non_volatile_memories/SD_CMD"
2010-08-19 06:09:52 +03:00
AddNet "/Non_volatile_memories/SD_DAT0"
2010-08-19 16:51:56 +03:00
AddNet "/Non_volatile_memories/SD_DAT1"
2010-08-19 06:09:52 +03:00
AddNet "/Non_volatile_memories/SD_DAT2"
2010-08-19 16:51:56 +03:00
AddNet "/USB/USBA_RCV"
AddNet "/USB/USBA_VM"
2010-08-19 06:09:52 +03:00
AddNet "/USB/USBA_VP"
2010-08-17 03:06:33 +03:00
AddNet "GND"
AddNet "N-000058"
2010-08-17 04:56:08 +03:00
AddNet "N-000059"
2010-08-19 16:51:56 +03:00
AddNet "N-000395"
AddNet "N-000396"
AddNet "N-000397"
AddNet "N-000402"
AddNet "N-000403"
AddNet "N-000404"
AddNet "N-000405"
AddNet "N-000406"
2010-08-17 07:30:34 +03:00
AddNet "N-000422"
2010-08-18 03:04:05 +03:00
AddNet "N-000424"
2010-08-17 07:30:34 +03:00
AddNet "N-000425"
2010-08-19 06:09:52 +03:00
AddNet "N-000426"
AddNet "N-000427"
2010-08-19 16:51:56 +03:00
AddNet "N-000429"
AddNet "N-000430"
AddNet "N-000431"
2010-08-18 03:04:05 +03:00
AddNet "N-000432"
AddNet "N-000433"
2010-08-19 16:51:56 +03:00
AddNet "N-000434"
AddNet "N-000435"
AddNet "N-000436"
AddNet "N-000437"
AddNet "N-000447"
AddNet "N-000466"
2010-08-17 03:06:33 +03:00
AddNet "VCCO2"
$EndNCLASS
2010-08-19 04:15:48 +03:00
$NCLASS
Name "ADDRESS/DDR"
Desc ""
Clearance 59
TrackWidth 39
2010-08-19 06:09:52 +03:00
ViaDia 157
2010-08-19 04:15:48 +03:00
ViaDrill 79
uViaDia 197
uViaDrill 79
$EndNCLASS
$NCLASS
Name "CLK#CLK/DDR"
Desc ""
Clearance 39
TrackWidth 39
2010-08-19 06:09:52 +03:00
ViaDia 157
2010-08-19 04:15:48 +03:00
ViaDrill 79
uViaDia 197
uViaDrill 79
$EndNCLASS
$NCLASS
Name "DATA/DDR"
Desc ""
Clearance 79
TrackWidth 39
2010-08-19 06:09:52 +03:00
ViaDia 157
2010-08-19 04:15:48 +03:00
ViaDrill 79
uViaDia 197
uViaDrill 79
$EndNCLASS
2010-08-19 13:40:42 +03:00
$NCLASS
Name "ETH/ANALOG"
Desc ""
Clearance 59
TrackWidth 79
ViaDia 157
ViaDrill 79
uViaDia 197
uViaDrill 79
AddNet "/Ethernet_Phy/ETH_LED0"
AddNet "/Ethernet_Phy/ETH_LED1"
$EndNCLASS
$NCLASS
Name "ETH/POWER"
Desc ""
Clearance 59
TrackWidth 118
ViaDia 157
ViaDrill 79
uViaDia 197
uViaDrill 79
AddNet "/Ethernet_Phy/ETH_A1.8V"
AddNet "/Ethernet_Phy/ETH_A3.3V"
AddNet "/Ethernet_Phy/ETH_PLL1.8V"
$EndNCLASS
2010-08-04 05:23:17 +03:00
$MODULE FGG484bga-p10
2010-08-19 13:40:42 +03:00
Po 56269 34378 0 15 4C6D0021 4C6A0A06 ~~
2010-08-04 05:23:17 +03:00
Li FGG484bga-p10
2010-08-17 07:30:34 +03:00
Sc 4C6A0A06
2010-08-04 05:23:17 +03:00
AR /4C431A63/4C431E53
2010-07-24 14:58:53 +03:00
Op 0 0 0
At SMD
2010-08-04 05:23:17 +03:00
T0 0 -150 200 200 0 40 N V 25 N"U1"
T1 0 150 200 200 0 40 N I 25 N"XC6SLX45FGG484"
DS -4527 4527 -4527 -4527 39 21
DS -4527 -4527 4527 -4527 39 21
DS 4527 -4527 4527 4527 39 21
DS 4527 4527 -4527 4527 39 21
DS -4527 -4527 -4527 -4842 39 21
DS -4527 -4842 -4842 -4842 39 21
DS -4842 -4842 -4842 -4527 39 21
DS -4842 -4527 -4527 -4527 39 21
2010-07-24 14:58:53 +03:00
$PAD
2010-08-04 05:23:17 +03:00
Sh "A1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -4133 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -3739 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -3346 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 38 "/Ethernet_Phy/ETH_CLK"
2010-08-04 05:23:17 +03:00
Po -2952 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 56 "/FPGA_Spartan6/ETH_RESET_N"
2010-08-04 05:23:17 +03:00
Po -2558 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 44 "/Ethernet_Phy/ETH_RXD0"
2010-08-04 05:23:17 +03:00
Po -2165 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 49 "/Ethernet_Phy/ETH_RXER"
2010-08-04 05:23:17 +03:00
Po -1771 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 51 "/Ethernet_Phy/ETH_TXEN"
2010-08-04 05:23:17 +03:00
Po -1377 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 61 "/FPGA_Spartan6/ETH_TXD3"
2010-08-04 05:23:17 +03:00
Po -983 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 54 "/FPGA_Spartan6/ETH_INT"
2010-08-04 05:23:17 +03:00
Po -590 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 120 "/FPGA_Spartan6/NF_D7"
2010-08-04 05:23:17 +03:00
Po -196 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 210 "/Non_volatile_memories/NF_D3"
2010-08-04 05:23:17 +03:00
Po 196 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 06:09:52 +03:00
Ne 118 "/FPGA_Spartan6/NF_D1"
2010-08-04 05:23:17 +03:00
Po 590 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 983 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 208 "/Non_volatile_memories/NF_ALE"
2010-08-04 05:23:17 +03:00
Po 1377 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 214 "/Non_volatile_memories/NF_RNB"
2010-08-04 05:23:17 +03:00
Po 1771 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 06:09:52 +03:00
Ne 220 "/Non_volatile_memories/SD_DAT2"
2010-08-04 05:23:17 +03:00
Po 2165 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 218 "/Non_volatile_memories/SD_DAT0"
2010-08-04 05:23:17 +03:00
Po 2558 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2952 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 3346 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 3739 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "A22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 4133 -4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -4133 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -3739 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -3346 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-04 05:23:17 +03:00
Po -2952 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -2558 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 45 "/Ethernet_Phy/ETH_RXD1"
2010-08-04 05:23:17 +03:00
Po -2165 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-04 05:23:17 +03:00
Po -1771 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 52 "/Ethernet_Phy/ETH_TXER"
2010-08-04 05:23:17 +03:00
Po -1377 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -983 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 53 "/FPGA_Spartan6/ETH_COL"
2010-08-04 05:23:17 +03:00
Po -590 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-04 05:23:17 +03:00
Po -196 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 211 "/Non_volatile_memories/NF_D4"
2010-08-04 05:23:17 +03:00
Po 196 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 590 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 983 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-04 05:23:17 +03:00
Po 1377 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 213 "/Non_volatile_memories/NF_RE_N"
2010-08-04 05:23:17 +03:00
Po 1771 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 2165 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 219 "/Non_volatile_memories/SD_DAT1"
2010-08-04 05:23:17 +03:00
Po 2558 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-04 05:23:17 +03:00
Po 2952 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 3346 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 3739 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "B22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-07-28 04:09:20 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 4133 -3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C1" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 130 "/FPGA_Spartan6/R_M0_A11"
2010-08-04 05:23:17 +03:00
Po -4133 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C2" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -3739 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C3" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -3346 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C4" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2952 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C5" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 55 "/FPGA_Spartan6/ETH_MDIO"
2010-08-04 05:23:17 +03:00
Po -2558 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C6" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 46 "/Ethernet_Phy/ETH_RXD2"
2010-08-04 05:23:17 +03:00
Po -2165 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C7" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 48 "/Ethernet_Phy/ETH_RXDV"
2010-08-04 05:23:17 +03:00
Po -1771 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C8" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 50 "/Ethernet_Phy/ETH_TXD1"
2010-08-04 05:23:17 +03:00
Po -1377 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C9" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 60 "/FPGA_Spartan6/ETH_TXD2"
2010-08-04 05:23:17 +03:00
Po -983 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C10" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 39 "/Ethernet_Phy/ETH_CRS"
2010-08-04 05:23:17 +03:00
Po -590 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C11" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -196 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C12" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 119 "/FPGA_Spartan6/NF_D5"
2010-08-04 05:23:17 +03:00
Po 196 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C13" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 209 "/Non_volatile_memories/NF_D2"
2010-08-04 05:23:17 +03:00
Po 590 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C14" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 983 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C15" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 215 "/Non_volatile_memories/NF_WE_N"
2010-08-04 05:23:17 +03:00
Po 1377 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C16" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 116 "/FPGA_Spartan6/NF_CS1_N"
2010-08-04 05:23:17 +03:00
Po 1771 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C17" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 205 "/FPGA_Spartan6/SD_DAT3"
2010-08-04 05:23:17 +03:00
Po 2165 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C18" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2558 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C19" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2952 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C20" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 176 "/FPGA_Spartan6/R_M1_A8"
2010-08-04 05:23:17 +03:00
Po 3346 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C21" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 3739 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "C22" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 177 "/FPGA_Spartan6/R_M1_A9"
2010-08-04 05:23:17 +03:00
Po 4133 -3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 131 "/FPGA_Spartan6/R_M0_A12"
2010-08-04 05:23:17 +03:00
Po -4133 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 143 "/FPGA_Spartan6/R_M0_CKE"
2010-08-04 05:23:17 +03:00
Po -3739 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -3346 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -2952 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2558 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 47 "/Ethernet_Phy/ETH_RXD3"
2010-08-04 05:23:17 +03:00
Po -2165 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 58 "/FPGA_Spartan6/ETH_TXC"
2010-08-04 05:23:17 +03:00
Po -1771 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 57 "/FPGA_Spartan6/ETH_RXC"
2010-08-04 05:23:17 +03:00
Po -1377 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 59 "/FPGA_Spartan6/ETH_TXD0"
2010-08-04 05:23:17 +03:00
Po -983 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 42 "/Ethernet_Phy/ETH_MDC"
2010-08-04 05:23:17 +03:00
Po -590 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 212 "/Non_volatile_memories/NF_D6"
2010-08-04 05:23:17 +03:00
Po -196 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 196 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 590 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 06:09:52 +03:00
Ne 117 "/FPGA_Spartan6/NF_D0"
2010-08-04 05:23:17 +03:00
Po 983 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 115 "/FPGA_Spartan6/NF_CLE"
2010-08-04 05:23:17 +03:00
Po 1377 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 1771 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 217 "/Non_volatile_memories/SD_CMD"
2010-08-04 05:23:17 +03:00
Po 2165 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 2558 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2952 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 3346 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 181 "/FPGA_Spartan6/R_M1_CKE"
2010-08-04 05:23:17 +03:00
Po 3739 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "D22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 170 "/FPGA_Spartan6/R_M1_A12"
2010-08-04 05:23:17 +03:00
Po 4133 -2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 139 "/FPGA_Spartan6/R_M0_A9"
2010-08-04 05:23:17 +03:00
Po -4133 -2558
$EndPAD
2010-07-24 14:58:53 +03:00
$PAD
2010-08-04 05:23:17 +03:00
Sh "E2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -3739 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 138 "/FPGA_Spartan6/R_M0_A8"
2010-08-04 05:23:17 +03:00
Po -3346 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -2952 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -2558 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -2165 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -1771 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-04 05:23:17 +03:00
Po -983 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -590 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -196 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 196 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-04 05:23:17 +03:00
Po 590 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 983 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 1377 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 216 "/Non_volatile_memories/SD_CLK"
2010-08-04 05:23:17 +03:00
Po 1771 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-04 05:23:17 +03:00
Po 2165 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2558 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 2952 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 175 "/FPGA_Spartan6/R_M1_A7"
2010-08-04 05:23:17 +03:00
Po 3346 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 3739 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "E22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 171 "/FPGA_Spartan6/R_M1_A2"
2010-08-04 05:23:17 +03:00
Po 4133 -2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F1" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -4133 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F2" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 165 "/FPGA_Spartan6/R_M0_WE#"
2010-08-04 05:23:17 +03:00
Po -3739 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F3" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 134 "/FPGA_Spartan6/R_M0_A4"
2010-08-04 05:23:17 +03:00
Po -3346 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F4" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -2952 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F5" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -2558 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F6" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -2165 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F7" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -1771 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F8" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -1377 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F9" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -983 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F10" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -590 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F11" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -196 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F12" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 196 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F13" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 590 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F14" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 983 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F15" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1377 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F16" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1771 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F17" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2165 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F18" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2558 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F19" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 169 "/FPGA_Spartan6/R_M1_A11"
2010-08-04 05:23:17 +03:00
Po 2952 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F20" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 04:56:08 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 3346 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F21" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 166 "/FPGA_Spartan6/R_M1_A0"
2010-08-04 05:23:17 +03:00
Po 3739 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "F22" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 167 "/FPGA_Spartan6/R_M1_A1"
2010-08-04 05:23:17 +03:00
Po 4133 -2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G1" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 141 "/FPGA_Spartan6/R_M0_BA1"
2010-08-04 05:23:17 +03:00
Po -4133 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G2" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -3739 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G3" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 140 "/FPGA_Spartan6/R_M0_BA0"
2010-08-04 05:23:17 +03:00
Po -3346 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G4" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 129 "/FPGA_Spartan6/R_M0_A10"
2010-08-04 05:23:17 +03:00
Po -2952 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G5" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -2558 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G6" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G7" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G8" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G9" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -983 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G10" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-04 05:23:17 +03:00
Po -590 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G11" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -196 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G12" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 196 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G13" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 590 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G14" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-04 05:23:17 +03:00
Po 983 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G15" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1377 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G16" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1771 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G17" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2165 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G18" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 2558 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G19" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 168 "/FPGA_Spartan6/R_M1_A10"
2010-08-04 05:23:17 +03:00
Po 2952 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G20" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 172 "/FPGA_Spartan6/R_M1_A3"
2010-08-04 05:23:17 +03:00
Po 3346 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G21" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 3739 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "G22" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 4133 -1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 128 "/FPGA_Spartan6/R_M0_A1"
2010-08-04 05:23:17 +03:00
Po -4133 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 127 "/FPGA_Spartan6/R_M0_A0"
2010-08-04 05:23:17 +03:00
Po -3739 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 9 "/DDR_Banks/M0_CLK#"
2010-08-04 05:23:17 +03:00
Po -3346 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 8 "/DDR_Banks/M0_CLK"
2010-08-04 05:23:17 +03:00
Po -2952 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 132 "/FPGA_Spartan6/R_M0_A2"
2010-08-04 05:23:17 +03:00
Po -2558 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 137 "/FPGA_Spartan6/R_M0_A7"
2010-08-04 05:23:17 +03:00
Po -2165 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -1771 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-07-28 04:09:20 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -983 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -590 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -196 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 196 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 590 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 983 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 1377 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 182 "/FPGA_Spartan6/R_M1_CS#"
2010-08-04 05:23:17 +03:00
Po 1771 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2165 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2558 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 204 "/FPGA_Spartan6/R_M1_WE#"
2010-08-04 05:23:17 +03:00
Po 2952 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 100 "/FPGA_Spartan6/M1_CLK"
2010-08-04 05:23:17 +03:00
Po 3346 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 201 "/FPGA_Spartan6/R_M1_RAS#"
2010-08-04 05:23:17 +03:00
Po 3739 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "H22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 180 "/FPGA_Spartan6/R_M1_CAS#"
2010-08-04 05:23:17 +03:00
Po 4133 -1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 155 "/FPGA_Spartan6/R_M0_DQ5"
2010-08-04 05:23:17 +03:00
Po -4133 -983
$EndPAD
$PAD
Sh "J2" O 157 157 0 0 0
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -3739 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 154 "/FPGA_Spartan6/R_M0_DQ4"
2010-08-04 05:23:17 +03:00
Po -3346 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 136 "/FPGA_Spartan6/R_M0_A6"
2010-08-04 05:23:17 +03:00
Po -2952 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -2558 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po -1377 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -983 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po -590 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -196 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po 196 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 590 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po 983 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 1377 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1771 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 178 "/FPGA_Spartan6/R_M1_BA0"
2010-08-04 05:23:17 +03:00
Po 2165 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 2558 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 26 "/DDR_Banks/M1_CLK#"
2010-08-04 05:23:17 +03:00
Po 2952 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 193 "/FPGA_Spartan6/R_M1_DQ4"
2010-08-04 05:23:17 +03:00
Po 3346 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "J21" O 157 157 0 0 0
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 3739 -983
$EndPAD
$PAD
Sh "J22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 194 "/FPGA_Spartan6/R_M1_DQ5"
2010-08-04 05:23:17 +03:00
Po 4133 -983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K1" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 157 "/FPGA_Spartan6/R_M0_DQ7"
2010-08-04 05:23:17 +03:00
Po -4133 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K2" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 156 "/FPGA_Spartan6/R_M0_DQ6"
2010-08-04 05:23:17 +03:00
Po -3739 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K3" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 135 "/FPGA_Spartan6/R_M0_A5"
2010-08-04 05:23:17 +03:00
Po -3346 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K4" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 142 "/FPGA_Spartan6/R_M0_CAS#"
2010-08-04 05:23:17 +03:00
Po -2952 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K5" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 162 "/FPGA_Spartan6/R_M0_RAS#"
2010-08-04 05:23:17 +03:00
Po -2558 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K6" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 133 "/FPGA_Spartan6/R_M0_A3"
2010-08-04 05:23:17 +03:00
Po -2165 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K7" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-07-28 04:09:20 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K8" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K9" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po -983 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K10" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -590 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K11" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po -196 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K12" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 196 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K13" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po 590 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K14" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 983 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K15" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 1377 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K16" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1771 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K17" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 179 "/FPGA_Spartan6/R_M1_BA1"
2010-08-04 05:23:17 +03:00
Po 2165 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K18" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2558 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K19" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 174 "/FPGA_Spartan6/R_M1_A6"
2010-08-04 05:23:17 +03:00
Po 2952 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K20" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 173 "/FPGA_Spartan6/R_M1_A5"
2010-08-04 05:23:17 +03:00
Po 3346 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K21" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 195 "/FPGA_Spartan6/R_M1_DQ6"
2010-08-04 05:23:17 +03:00
Po 3739 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "K22" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 196 "/FPGA_Spartan6/R_M1_DQ7"
2010-08-04 05:23:17 +03:00
Po 4133 -590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -4133 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -3739 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 161 "/FPGA_Spartan6/R_M0_LDQS"
2010-08-04 05:23:17 +03:00
Po -3346 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 160 "/FPGA_Spartan6/R_M0_LDM"
2010-08-04 05:23:17 +03:00
Po -2952 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -2558 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -1771 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -1377 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -983 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po -590 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -196 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po 196 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 590 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po 983 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1377 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 1771 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2165 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 2558 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 199 "/FPGA_Spartan6/R_M1_LDM"
2010-08-04 05:23:17 +03:00
Po 2952 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 200 "/FPGA_Spartan6/R_M1_LDQS"
2010-08-04 05:23:17 +03:00
Po 3346 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 3739 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "L22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 4133 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 153 "/FPGA_Spartan6/R_M0_DQ3"
2010-08-04 05:23:17 +03:00
Po -4133 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 152 "/FPGA_Spartan6/R_M0_DQ2"
2010-08-04 05:23:17 +03:00
Po -3739 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 163 "/FPGA_Spartan6/R_M0_UDM"
2010-08-04 05:23:17 +03:00
Po -3346 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -2952 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2558 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M9" O 157 157 0 0 0
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po -983 196
$EndPAD
$PAD
Sh "M10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -590 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po -196 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 196 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po 590 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 983 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 1377 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1771 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2165 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 222 "/USB/USBA_VM"
2010-08-04 05:23:17 +03:00
Po 2558 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2952 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 202 "/FPGA_Spartan6/R_M1_UDM"
2010-08-04 05:23:17 +03:00
Po 3346 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 191 "/FPGA_Spartan6/R_M1_DQ2"
2010-08-04 05:23:17 +03:00
Po 3739 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "M22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 192 "/FPGA_Spartan6/R_M1_DQ3"
2010-08-04 05:23:17 +03:00
Po 4133 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N1" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 145 "/FPGA_Spartan6/R_M0_DQ1"
2010-08-04 05:23:17 +03:00
Po -4133 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N2" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -3739 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N3" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 144 "/FPGA_Spartan6/R_M0_DQ0"
2010-08-04 05:23:17 +03:00
Po -3346 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N4" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2952 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N5" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -2558 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N6" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N7" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N8" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -1377 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N9" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -983 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N10" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po -590 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N11" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -196 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N12" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po 196 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N13" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 590 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N14" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po 983 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N15" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1377 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N16" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 221 "/USB/USBA_RCV"
2010-08-04 05:23:17 +03:00
Po 1771 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N17" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 2165 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N18" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 2558 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N19" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2952 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N20" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 183 "/FPGA_Spartan6/R_M1_DQ0"
2010-08-04 05:23:17 +03:00
Po 3346 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N21" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 3739 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "N22" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 184 "/FPGA_Spartan6/R_M1_DQ1"
2010-08-04 05:23:17 +03:00
Po 4133 590
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 159 "/FPGA_Spartan6/R_M0_DQ9"
2010-08-04 05:23:17 +03:00
Po -4133 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 158 "/FPGA_Spartan6/R_M0_DQ8"
2010-08-04 05:23:17 +03:00
Po -3739 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -3346 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2952 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2558 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po -983 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -590 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po -196 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 196 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po 590 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 983 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1377 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1771 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 06:09:52 +03:00
Ne 223 "/USB/USBA_VP"
2010-08-04 05:23:17 +03:00
Po 2165 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 206 "/FPGA_Spartan6/USBA_OE_N"
2010-08-04 05:23:17 +03:00
Po 2558 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2952 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 3346 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 197 "/FPGA_Spartan6/R_M1_DQ8"
2010-08-04 05:23:17 +03:00
Po 3739 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "P22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 198 "/FPGA_Spartan6/R_M1_DQ9"
2010-08-04 05:23:17 +03:00
Po 4133 983
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 147 "/FPGA_Spartan6/R_M0_DQ11"
2010-08-04 05:23:17 +03:00
Po -4133 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -3739 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 146 "/FPGA_Spartan6/R_M0_DQ10"
2010-08-04 05:23:17 +03:00
Po -3346 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2952 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -2558 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -2165 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -1377 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -983 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -590 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -196 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 196 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-07-28 04:09:20 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 590 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 1 "+1.2V"
2010-08-04 05:23:17 +03:00
Po 983 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1377 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1771 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2165 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 2558 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 207 "/FPGA_Spartan6/USBA_SPD"
2010-08-04 05:23:17 +03:00
Po 2952 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 185 "/FPGA_Spartan6/R_M1_DQ10"
2010-08-04 05:23:17 +03:00
Po 3346 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 3739 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "R22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 186 "/FPGA_Spartan6/R_M1_DQ11"
2010-08-04 05:23:17 +03:00
Po 4133 1377
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T1" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -4133 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T2" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 164 "/FPGA_Spartan6/R_M0_UDQS"
2010-08-04 05:23:17 +03:00
Po -3739 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T3" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -3346 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T4" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2952 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T5" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 122 "/FPGA_Spartan6/PROG_CSO"
2010-08-04 05:23:17 +03:00
Po -2558 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T6" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T7" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T8" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T9" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po -983 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T10" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -590 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T11" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -196 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T12" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 196 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T13" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po 590 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T14" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-07-28 04:09:20 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 983 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T15" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1377 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T16" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 1771 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T17" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2165 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T18" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2558 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T19" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 2952 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T20" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 3346 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T21" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 203 "/FPGA_Spartan6/R_M1_UDQS"
2010-08-04 05:23:17 +03:00
Po 3739 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "T22" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 4133 1771
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U1" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 149 "/FPGA_Spartan6/R_M0_DQ13"
2010-08-04 05:23:17 +03:00
Po -4133 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U2" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -3739 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U3" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 148 "/FPGA_Spartan6/R_M0_DQ12"
2010-08-04 05:23:17 +03:00
Po -3346 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U4" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2952 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U5" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -2558 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U6" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U7" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -1771 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U8" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -1377 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U9" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -983 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U10" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -590 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U11" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -196 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U12" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 196 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U13" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 126 "/FPGA_Spartan6/PROG_MISO3"
2010-08-04 05:23:17 +03:00
Po 590 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U14" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 125 "/FPGA_Spartan6/PROG_MISO2"
2010-08-04 05:23:17 +03:00
Po 983 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U15" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1377 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U16" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1771 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U17" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2165 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U18" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 2558 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U19" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2952 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U20" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 187 "/FPGA_Spartan6/R_M1_DQ12"
2010-08-04 05:23:17 +03:00
Po 3346 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U21" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 3739 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "U22" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 188 "/FPGA_Spartan6/R_M1_DQ13"
2010-08-04 05:23:17 +03:00
Po 4133 2165
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 151 "/FPGA_Spartan6/R_M0_DQ15"
2010-08-04 05:23:17 +03:00
Po -4133 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 150 "/FPGA_Spartan6/R_M0_DQ14"
2010-08-04 05:23:17 +03:00
Po -3739 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -3346 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -2952 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2558 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -2165 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po -1377 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -983 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -590 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -196 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po 196 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 590 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 983 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1377 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po 1771 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2165 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2558 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2952 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 3346 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 189 "/FPGA_Spartan6/R_M1_DQ14"
2010-08-04 05:23:17 +03:00
Po 3739 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "V22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 190 "/FPGA_Spartan6/R_M1_DQ15"
2010-08-04 05:23:17 +03:00
Po 4133 2558
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -4133 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po -3739 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-09 23:37:18 +03:00
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -3346 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2952 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po -2558 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -1771 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -983 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -590 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -196 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 196 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 590 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 983 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1377 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 1771 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2165 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2558 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 2952 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 3346 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-04 05:23:17 +03:00
Po 3739 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "W22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 4133 2952
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y1" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -4133 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y2" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -3739 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y3" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -3346 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y4" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -2952 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y5" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2558 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y6" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y7" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y8" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y9" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -983 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y10" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -590 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y11" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -196 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y12" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 196 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y13" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 590 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y14" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 983 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y15" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1377 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y16" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1771 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y17" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2165 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y18" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2558 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y19" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2952 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y20" O 158 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 3346 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y21" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 3739 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "Y22" O 157 158 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 4133 3346
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -4133 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -3739 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po -3346 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2952 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -2558 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po -1771 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA9" O 157 157 0 0 0
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -983 3739
$EndPAD
$PAD
Sh "AA10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -590 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po -196 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 196 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 590 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 983 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po 1377 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1771 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 2165 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2558 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-04 05:23:17 +03:00
Po 2952 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 124 "/FPGA_Spartan6/PROG_MISO1"
2010-08-04 05:23:17 +03:00
Po 3346 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 121 "/FPGA_Spartan6/PROG_CCLK"
2010-08-04 05:23:17 +03:00
Po 3739 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AA22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 4133 3739
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB1" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po -4133 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB2" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -3739 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB3" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -3346 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB4" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2952 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB5" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po -2558 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB6" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -2165 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB7" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1771 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB8" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -1377 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB9" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -983 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB10" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -590 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB11" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po -196 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB12" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 196 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB13" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 590 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB14" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 983 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB15" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1377 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB16" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 1771 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB17" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2165 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB18" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2558 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB19" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
Po 2952 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB20" O 158 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 123 "/FPGA_Spartan6/PROG_MISO0"
2010-08-04 05:23:17 +03:00
Po 3346 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB21" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-04 05:23:17 +03:00
Po 3739 4133
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-04 05:23:17 +03:00
Sh "AB22" O 157 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-04 05:23:17 +03:00
Po 4133 4133
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-04 05:23:17 +03:00
$EndMODULE FGG484bga-p10
2010-08-19 13:40:42 +03:00
$MODULE DFN10
Po 65354 43898 0 15 4C6C9E22 4C6C9ECB ~~
Li DFN10
Sc 4C6C9ECB
AR /4C69ED5F/4C6C9DB9
2010-08-04 05:23:17 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 0 40 N V 25 N"U10"
T1 0 150 200 200 0 40 N I 25 N"A7130"
DC -629 629 -629 590 39 21
DS -590 590 -590 -590 39 21
DS -590 -590 590 -590 39 21
DS 590 -590 590 590 39 21
DS 590 590 -590 590 39 21
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "PAD" R 904 628 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 0 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po -393 491
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "10" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po -393 -491
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 99 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po -196 491
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "9" R 99 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po -196 -491
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 0 491
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 0 -491
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 99 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 196 491
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 99 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 196 -491
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 393 491
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 393 -491
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE DFN10
$MODULE 0402
Po 55100 33400 1350 0 4C5FF890 4C6B2A04 ~~
Li 0402
Sc 4C6B2A04
AR /4C431A63/4C6B29DA
Op 0 0 0
At SMD
T0 0 150 200 200 1350 40 M V 20 N"C77"
T1 0 -150 200 200 1350 40 M I 20 N"470nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1350
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 3 "+2.5V"
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1350
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 56300 34400 0 0 4C5FF890 4C6B2A02 ~~
Li 0402
Sc 4C6B2A02
AR /4C431A63/4C6B29A3
Op 0 0 0
At SMD
T0 0 150 200 200 0 40 M V 20 N"C76"
T1 0 -150 200 200 0 40 M I 20 N"470nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 1 "+1.2V"
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 48100 33900 1800 0 4C5FF890 4C6B21D8 ~~
Li 0402
Sc 4C6B21D8
AR /4C431A63/4C6B216E
Op 0 0 0
At SMD
T0 0 150 200 200 1800 40 M V 20 N"R23"
T1 0 -150 200 200 1800 40 M I 20 N"33"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 163 "/FPGA_Spartan6/R_M0_UDM"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 87 "/FPGA_Spartan6/M0_UDM"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 48100 34600 1800 0 4C5FF890 4C6B21D6 ~~
Li 0402
Sc 4C6B21D6
AR /4C431A63/4C6B216D
Op 0 0 0
At SMD
T0 0 150 200 200 1800 40 M V 20 N"R22"
T1 0 -150 200 200 1800 40 M I 20 N"33"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 164 "/FPGA_Spartan6/R_M0_UDQS"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 19 "/DDR_Banks/M0_UDQS"
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 48100 33200 1800 0 4C5FF890 4C6B21D2 ~~
Li 0402
Sc 4C6B21D2
AR /4C431A63/4C6B216B
Op 0 0 0
At SMD
T0 0 150 200 200 1800 40 M V 20 N"R24"
T1 0 -150 200 200 1800 40 M I 20 N"33"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 143 "/FPGA_Spartan6/R_M0_CKE"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 7 "/DDR_Banks/M0_CKE"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 51370 33417 900 0 4C5FF890 4C6B1F81 ~~
Li 0402
Sc 4C6B1F81
AR /4C431A63/4C6B1B90
Op 0 0 0
At SMD
T0 0 150 200 200 900 40 M V 20 N"R21"
T1 0 -150 200 200 900 40 M I 20 N"120"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 8 "/DDR_Banks/M0_CLK"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 9 "/DDR_Banks/M0_CLK#"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE R_PACK4-0402
Po 50000 31400 900 0 4C69A686 4C6A0EC8 ~~
Li R_PACK4-0402
Sc 4C6A0EC8
AR /4C431A63/4C6A0D58
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP14"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 127 "/FPGA_Spartan6/R_M0_A0"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 128 "/FPGA_Spartan6/R_M0_A1"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 132 "/FPGA_Spartan6/R_M0_A2"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 133 "/FPGA_Spartan6/R_M0_A3"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 67 "/FPGA_Spartan6/M0_A3"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 66 "/FPGA_Spartan6/M0_A2"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 62 "/FPGA_Spartan6/M0_A1"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 6 "/DDR_Banks/M0_A0"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 50000 32400 900 0 4C69A686 4C6A0EC6 ~~
Li R_PACK4-0402
Sc 4C6A0EC6
AR /4C431A63/4C6A0D57
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP15"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 162 "/FPGA_Spartan6/R_M0_RAS#"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 140 "/FPGA_Spartan6/R_M0_BA0"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 141 "/FPGA_Spartan6/R_M0_BA1"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 129 "/FPGA_Spartan6/R_M0_A10"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 63 "/FPGA_Spartan6/M0_A10"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 75 "/FPGA_Spartan6/M0_BA1"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 74 "/FPGA_Spartan6/M0_BA0"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 18 "/DDR_Banks/M0_RAS#"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 50000 33465 900 0 4C69A686 4C6A0EC4 ~~
Li R_PACK4-0402
Sc 4C6A0EC4
AR /4C431A63/4C6A0D56
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP16"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 161 "/FPGA_Spartan6/R_M0_LDQS"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 160 "/FPGA_Spartan6/R_M0_LDM"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 165 "/FPGA_Spartan6/R_M0_WE#"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 142 "/FPGA_Spartan6/R_M0_CAS#"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 76 "/FPGA_Spartan6/M0_CAS#"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 88 "/FPGA_Spartan6/M0_WE#"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 16 "/DDR_Banks/M0_LDM"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 17 "/DDR_Banks/M0_LDQS"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 48200 32200 1800 0 4C69A686 4C6A0EC2 ~~
Li R_PACK4-0402
Sc 4C6A0EC2
AR /4C431A63/4C6A0D55
Op 0 0 0
T0 117 451 197 197 1800 49 M V 20 N"RP17"
T1 68 -436 157 157 1800 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 137 "/FPGA_Spartan6/R_M0_A7"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$PAD
Sh "2" R 118 157 0 0 0
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 136 "/FPGA_Spartan6/R_M0_A6"
2010-08-19 13:40:42 +03:00
Po -98 -177
$EndPAD
$PAD
Sh "3" R 118 157 0 0 0
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 135 "/FPGA_Spartan6/R_M0_A5"
2010-08-19 13:40:42 +03:00
Po 98 -177
$EndPAD
$PAD
Sh "4" R 118 157 0 0 0
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 134 "/FPGA_Spartan6/R_M0_A4"
2010-08-19 13:40:42 +03:00
Po 295 -177
$EndPAD
$PAD
Sh "5" R 118 157 0 0 1800
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 68 "/FPGA_Spartan6/M0_A4"
2010-08-19 13:40:42 +03:00
Po 295 177
$EndPAD
$PAD
Sh "6" R 118 157 0 0 1800
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 69 "/FPGA_Spartan6/M0_A5"
2010-08-19 13:40:42 +03:00
Po 98 177
$EndPAD
$PAD
Sh "7" R 118 157 0 0 1800
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 70 "/FPGA_Spartan6/M0_A6"
2010-08-19 13:40:42 +03:00
Po -98 177
$EndPAD
$PAD
Sh "8" R 118 157 0 0 1800
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 71 "/FPGA_Spartan6/M0_A7"
2010-08-19 13:40:42 +03:00
Po -295 177
$EndPAD
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 48100 30800 1800 0 4C69A686 4C6A0EC0 ~~
Li R_PACK4-0402
Sc 4C6A0EC0
AR /4C431A63/4C6A0D54
2010-08-04 05:23:17 +03:00
Op 0 0 0
2010-08-19 13:40:42 +03:00
T0 117 451 197 197 1800 49 M V 20 N"RP18"
T1 68 -436 157 157 1800 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 131 "/FPGA_Spartan6/R_M0_A12"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 130 "/FPGA_Spartan6/R_M0_A11"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 139 "/FPGA_Spartan6/R_M0_A9"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 138 "/FPGA_Spartan6/R_M0_A8"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 72 "/FPGA_Spartan6/M0_A8"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 73 "/FPGA_Spartan6/M0_A9"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 64 "/FPGA_Spartan6/M0_A11"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 65 "/FPGA_Spartan6/M0_A12"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 50100 36100 900 0 4C69A686 4C6A039A ~~
Li R_PACK4-0402
Sc 4C6A039A
AR /4C431A63/4C69FCE8
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP12"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 154 "/FPGA_Spartan6/R_M0_DQ4"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 155 "/FPGA_Spartan6/R_M0_DQ5"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 156 "/FPGA_Spartan6/R_M0_DQ6"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 157 "/FPGA_Spartan6/R_M0_DQ7"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 84 "/FPGA_Spartan6/M0_DQ7"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 83 "/FPGA_Spartan6/M0_DQ6"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 82 "/FPGA_Spartan6/M0_DQ5"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 81 "/FPGA_Spartan6/M0_DQ4"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 50100 37200 900 0 4C69A686 4C6A0398 ~~
Li R_PACK4-0402
Sc 4C6A0398
AR /4C431A63/4C69FCE7
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP13"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 144 "/FPGA_Spartan6/R_M0_DQ0"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 145 "/FPGA_Spartan6/R_M0_DQ1"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 152 "/FPGA_Spartan6/R_M0_DQ2"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 153 "/FPGA_Spartan6/R_M0_DQ3"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 80 "/FPGA_Spartan6/M0_DQ3"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 79 "/FPGA_Spartan6/M0_DQ2"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 10 "/DDR_Banks/M0_DQ1"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 77 "/FPGA_Spartan6/M0_DQ0"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 48100 36100 2700 0 4C69A686 4C6A0396 ~~
Li R_PACK4-0402
Sc 4C6A0396
AR /4C431A63/4C69FCE6
Op 0 0 0
T0 117 451 197 197 2700 49 M V 20 N"RP11"
T1 68 -436 157 157 2700 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 158 "/FPGA_Spartan6/R_M0_DQ8"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 159 "/FPGA_Spartan6/R_M0_DQ9"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 146 "/FPGA_Spartan6/R_M0_DQ10"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 147 "/FPGA_Spartan6/R_M0_DQ11"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 12 "/DDR_Banks/M0_DQ11"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 11 "/DDR_Banks/M0_DQ10"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 86 "/FPGA_Spartan6/M0_DQ9"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 85 "/FPGA_Spartan6/M0_DQ8"
2010-08-19 13:40:42 +03:00
Po -295 177
$EndPAD
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 48100 37200 2700 0 4C69A686 4C6A0394 ~~
Li R_PACK4-0402
Sc 4C6A0394
AR /4C431A63/4C69FC19
Op 0 0 0
T0 117 451 197 197 2700 49 M V 20 N"RP10"
T1 68 -436 157 157 2700 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
$PAD
Sh "1" R 118 157 0 0 900
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 148 "/FPGA_Spartan6/R_M0_DQ12"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 149 "/FPGA_Spartan6/R_M0_DQ13"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 150 "/FPGA_Spartan6/R_M0_DQ14"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 151 "/FPGA_Spartan6/R_M0_DQ15"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 78 "/FPGA_Spartan6/M0_DQ15"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 15 "/DDR_Banks/M0_DQ14"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 14 "/DDR_Banks/M0_DQ13"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 13 "/DDR_Banks/M0_DQ12"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE MLF20m1
Po 65551 41732 0 15 4C69F3CC 4C69F729 ~~
Li MLF20m1
Sc 4C69F729
AR /4C69ED5F/4C69EE11
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"U9"
T1 0 150 200 200 0 40 N I 25 N"ATTINY24A-MLF"
DC -866 -866 -866 -944 39 21
DS -787 787 -787 -787 39 21
DS -787 -787 787 -787 39 21
DS 787 -787 787 787 39 21
DS 787 787 -787 787 39 21
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "PAD" R 433 433 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po -235 235
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "PAD" R 433 433 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po -235 -235
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "PAD" R 433 433 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 235 235
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "PAD" R 433 433 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 235 -235
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "15" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po -393 688
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -393 -688
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "14" R 99 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -196 688
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 99 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-04 05:23:17 +03:00
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -196 -688
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "13" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po 0 688
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-13 23:42:35 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 98 157 0 0 0
2010-08-13 23:42:35 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 0 -688
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "12" R 99 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 196 688
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 99 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 196 -688
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "11" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 393 688
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 98 157 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 393 -688
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "20" R 157 98 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -688 -393
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 157 98 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 688 -393
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "19" R 157 99 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -688 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 157 99 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 688 -196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "18" R 157 98 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -688 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 157 98 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 688 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "17" R 157 99 0 0 0
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -688 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "9" R 157 99 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 688 196
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "16" R 157 98 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -688 393
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "10" R 157 98 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 688 393
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE MLF20m1
$MODULE 0402
Po 61024 35236 900 0 4C5FF890 4C69EB29 ~~
Li 0402
Sc 4C69EB29
AR /4C431A63/4C69E7DD
Op 0 0 0
At SMD
T0 0 150 200 200 900 40 M V 20 N"R19"
T1 0 -150 200 200 900 40 M I 20 N"33"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 900
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 203 "/FPGA_Spartan6/R_M1_UDQS"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 900
Dr 0 0 0
At SMD N 00440001
Ne 114 "/FPGA_Spartan6/M1_UDQS"
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 62598 32677 0 0 4C5FF890 4C69EB27 ~~
Li 0402
Sc 4C69EB27
AR /4C431A63/4C69E92D
Op 0 0 0
At SMD
T0 0 150 200 200 0 40 M V 20 N"R20"
T1 0 -150 200 200 0 40 M I 20 N"33"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 182 "/FPGA_Spartan6/R_M1_CS#"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 27 "/DDR_Banks/M1_CS#"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 61024 32283 2700 0 4C5FF890 4C69EB25 ~~
Li 0402
Sc 4C69EB25
AR /4C431A63/4C69E7F8
Op 0 0 0
At SMD
T0 0 150 200 200 2700 40 M V 20 N"R17"
T1 0 -150 200 200 2700 40 M I 20 N"33"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 181 "/FPGA_Spartan6/R_M1_CKE"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 99 "/FPGA_Spartan6/M1_CKE"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 61024 34252 900 0 4C5FF890 4C69EB23 ~~
Li 0402
Sc 4C69EB23
AR /4C431A63/4C69E7C2
Op 0 0 0
At SMD
T0 0 150 200 200 900 40 M V 20 N"R18"
T1 0 -150 200 200 900 40 M I 20 N"33"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 900
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 202 "/FPGA_Spartan6/R_M1_UDM"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 900
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 113 "/FPGA_Spartan6/M1_UDM"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE R_PACK4-0402
Po 62598 38189 900 0 4C69A686 4C69E3ED ~~
Li R_PACK4-0402
Sc 4C69E3ED
AR /4C431A63/4C69E299
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP8"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 190 "/FPGA_Spartan6/R_M1_DQ15"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 189 "/FPGA_Spartan6/R_M1_DQ14"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 188 "/FPGA_Spartan6/R_M1_DQ13"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 187 "/FPGA_Spartan6/R_M1_DQ12"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 31 "/DDR_Banks/M1_DQ12"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 32 "/DDR_Banks/M1_DQ13"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 102 "/FPGA_Spartan6/M1_DQ14"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 103 "/FPGA_Spartan6/M1_DQ15"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 62598 36614 900 0 4C69A686 4C69E3EE ~~
Li R_PACK4-0402
Sc 4C69E3EE
AR /4C431A63/4C69E3A6
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP9"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 186 "/FPGA_Spartan6/R_M1_DQ11"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 185 "/FPGA_Spartan6/R_M1_DQ10"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 198 "/FPGA_Spartan6/R_M1_DQ9"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 197 "/FPGA_Spartan6/R_M1_DQ8"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 109 "/FPGA_Spartan6/M1_DQ8"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 110 "/FPGA_Spartan6/M1_DQ9"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 29 "/DDR_Banks/M1_DQ10"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 30 "/DDR_Banks/M1_DQ11"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE 0402
Po 61024 33268 2700 0 4C5FF890 4C69E066 ~~
Li 0402
Sc 4C69E066
AR /4C431A63/4C69DF7A
2010-08-10 05:29:52 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 2700 40 M V 20 N"R16"
T1 0 -150 200 200 2700 40 M I 20 N"120"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 26 "/DDR_Banks/M1_CLK#"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 100 "/FPGA_Spartan6/M1_CLK"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE R_PACK4-0402
Po 62598 31890 900 0 4C69A686 4C69DCB4 ~~
Li R_PACK4-0402
Sc 4C69DCB4
AR /4C431A63/4C69DC05
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP7"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 170 "/FPGA_Spartan6/R_M1_A12"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-08-04 05:23:17 +03:00
$EndPAD
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 169 "/FPGA_Spartan6/R_M1_A11"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 177 "/FPGA_Spartan6/R_M1_A9"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 176 "/FPGA_Spartan6/R_M1_A8"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 23 "/DDR_Banks/M1_A8"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 97 "/FPGA_Spartan6/M1_A9"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 91 "/FPGA_Spartan6/M1_A11"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 21 "/DDR_Banks/M1_A12"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 62598 30906 900 0 4C69A686 4C69DB1A ~~
Li R_PACK4-0402
Sc 4C69DB1A
AR /4C431A63/4C69DA8A
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP6"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 175 "/FPGA_Spartan6/R_M1_A7"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 174 "/FPGA_Spartan6/R_M1_A6"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 173 "/FPGA_Spartan6/R_M1_A5"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-10 05:29:52 +03:00
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 94 "/FPGA_Spartan6/M1_A4"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 95 "/FPGA_Spartan6/M1_A5"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 22 "/DDR_Banks/M1_A6"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 96 "/FPGA_Spartan6/M1_A7"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 64961 37402 900 0 4C69A686 4C69D4B9 ~~
Li R_PACK4-0402
Sc 4C69D4B9
AR /4C431A63/4C69D3A9
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP5"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 183 "/FPGA_Spartan6/R_M1_DQ0"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 184 "/FPGA_Spartan6/R_M1_DQ1"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 191 "/FPGA_Spartan6/R_M1_DQ2"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 192 "/FPGA_Spartan6/R_M1_DQ3"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 33 "/DDR_Banks/M1_DQ3"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 104 "/FPGA_Spartan6/M1_DQ2"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 28 "/DDR_Banks/M1_DQ1"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 101 "/FPGA_Spartan6/M1_DQ0"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-08-04 05:23:17 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 64961 34055 900 0 4C69A686 4C69D4B7 ~~
Li R_PACK4-0402
Sc 4C69D4B7
AR /4C431A63/4C69D3A4
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP3"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-08-04 05:23:17 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 200 "/FPGA_Spartan6/R_M1_LDQS"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 199 "/FPGA_Spartan6/R_M1_LDM"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 204 "/FPGA_Spartan6/R_M1_WE#"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 180 "/FPGA_Spartan6/R_M1_CAS#"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 98 "/FPGA_Spartan6/M1_CAS#"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 35 "/DDR_Banks/M1_WE#"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 111 "/FPGA_Spartan6/M1_LDM"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 34 "/DDR_Banks/M1_LDQS"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-08-04 05:23:17 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 64961 36024 900 0 4C69A686 4C69D4B5 ~~
Li R_PACK4-0402
Sc 4C69D4B5
AR /4C431A63/4C69D3A3
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP4"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-08-04 05:23:17 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 193 "/FPGA_Spartan6/R_M1_DQ4"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 194 "/FPGA_Spartan6/R_M1_DQ5"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 195 "/FPGA_Spartan6/R_M1_DQ6"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 196 "/FPGA_Spartan6/R_M1_DQ7"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 108 "/FPGA_Spartan6/M1_DQ7"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 107 "/FPGA_Spartan6/M1_DQ6"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 106 "/FPGA_Spartan6/M1_DQ5"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 105 "/FPGA_Spartan6/M1_DQ4"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-08-04 05:23:17 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 64961 32677 900 0 4C69A686 4C69D012 ~~
Li R_PACK4-0402
Sc 4C69D012
AR /4C431A63/4C69CEE8
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP2"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-08-04 05:23:17 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 201 "/FPGA_Spartan6/R_M1_RAS#"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 178 "/FPGA_Spartan6/R_M1_BA0"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 179 "/FPGA_Spartan6/R_M1_BA1"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 168 "/FPGA_Spartan6/R_M1_A10"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 20 "/DDR_Banks/M1_A10"
Po 295 177
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 25 "/DDR_Banks/M1_BA1"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 24 "/DDR_Banks/M1_BA0"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 112 "/FPGA_Spartan6/M1_RAS#"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE R_PACK4-0402
Po 64961 31496 900 0 4C69A686 4C69CDBA ~~
Li R_PACK4-0402
Sc 4C69CDBA
AR /4C431A63/4C69C6B2
Op 0 0 0
T0 117 451 197 197 900 49 M V 20 N"RP1"
T1 68 -436 157 157 900 39 M I 20 N"R_PACK4"
DS -394 -276 -394 275 59 20
DS 394 -277 394 276 59 20
DS -354 0 354 0 59 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 166 "/FPGA_Spartan6/R_M1_A0"
2010-08-19 13:40:42 +03:00
Po -295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 167 "/FPGA_Spartan6/R_M1_A1"
2010-08-19 13:40:42 +03:00
Po -98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 171 "/FPGA_Spartan6/R_M1_A2"
2010-08-19 13:40:42 +03:00
Po 98 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 118 157 0 0 2700
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 172 "/FPGA_Spartan6/R_M1_A3"
2010-08-19 13:40:42 +03:00
Po 295 -177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 93 "/FPGA_Spartan6/M1_A3"
2010-08-19 13:40:42 +03:00
Po 295 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 92 "/FPGA_Spartan6/M1_A2"
2010-08-19 13:40:42 +03:00
Po 98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 90 "/FPGA_Spartan6/M1_A1"
2010-08-19 13:40:42 +03:00
Po -98 177
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 118 157 0 0 900
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 89 "/FPGA_Spartan6/M1_A0"
2010-08-19 13:40:42 +03:00
Po -295 177
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE R_PACK4-0402
$MODULE 0402
Po 61260 17100 1800 15 4C5FF890 4C6969AB ~~
Li 0402
Sc 4C6969AB
AR /4C4227FE/4C6969AB
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"C75"
T1 0 150 200 200 1800 40 N I 25 N"100nF"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 47691 26665 1800 0 4C5FF890 4C5D810A ~~
Li 0402
Sc 4C5D810A
AR /4C4320F3/4C5D810A
Op 0 0 0
At SMD
T0 0 150 200 200 1800 40 M V 20 N"L3"
T1 0 -150 200 200 1800 40 M I 20 N"FB"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 36 "/Ethernet_Phy/ETH_A1.8V"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 43 "/Ethernet_Phy/ETH_PLL1.8V"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 48675 25878 1800 0 4C5FF890 4C5D80F3 ~~
Li 0402
Sc 4C5D80F3
AR /4C4320F3/4C5D80F3
Op 0 0 0
At SMD
T0 0 150 200 200 1800 40 M V 20 N"L1"
T1 0 -150 200 200 1800 40 M I 20 N"FB"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 2 "+1.8V"
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 36 "/Ethernet_Phy/ETH_A1.8V"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 51200 25300 1800 0 4C5FF890 4C5D7FB7 ~~
Li 0402
Sc 4C5D7FB7
AR /4C4320F3/4C5D7FB7
Op 0 0 0
At SMD
T0 0 150 200 200 1800 40 M V 20 N"L2"
T1 0 -150 200 200 1800 40 M I 20 N"FB"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-07-24 14:58:53 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-07-24 14:58:53 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 4 "+3.3V"
Po -176 0
2010-07-24 14:58:53 +03:00
$EndPAD
2010-08-04 05:23:17 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-04 05:23:17 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 37 "/Ethernet_Phy/ETH_A3.3V"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-08-04 05:23:17 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0603
Po 54528 24803 900 15 4C5FF890 4C65D681 ~~
Li 0603
Sc 4C65D681
AR /4C4227FE/4C65D681
2010-08-10 05:29:52 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 900 40 N V 25 N"C74"
T1 0 150 200 200 900 40 N I 25 N"1uF"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
2010-08-04 05:23:17 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 900
2010-08-04 05:23:17 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
Po -294 0
2010-08-04 05:23:17 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 900
2010-08-04 05:23:17 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 294 0
2010-08-04 05:23:17 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0603
$MODULE 0402
Po 63780 26575 2700 15 4C5FF890 4C65D67C ~~
Li 0402
Sc 4C65D67C
AR /4C4227FE/4C65D67C
Op 0 0 0
At SMD
T0 0 -150 200 200 2700 40 N V 25 N"C73"
T1 0 150 200 200 2700 40 N I 25 N"100nF"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
2010-08-04 05:23:17 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 2700
2010-08-04 05:23:17 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
Po -176 0
2010-08-04 05:23:17 +03:00
$EndPAD
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 176 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 54528 26181 900 15 4C5FF890 4C65D661 ~~
Li 0402
Sc 4C65D661
AR /4C4227FE/4C65D661
Op 0 0 0
At SMD
T0 0 -150 200 200 900 40 N V 25 N"C72"
T1 0 150 200 200 900 40 N I 25 N"100nF"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 900
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
Po -176 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 900
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 50014 35166 1800 0 4C5FF890 4C65D2A9 ~~
Li 0402
Sc 4C65D2A9
AR /4C421DD3/4C65D2A9
Op 0 0 0
At SMD
T0 0 150 200 200 1800 40 M V 20 N"C70"
T1 0 -150 200 200 1800 40 M I 20 N"10nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 3 "+2.5V"
Po -176 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 176 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 65354 30512 1800 0 4C5FF890 4C65D28E ~~
Li 0402
Sc 4C65D28E
AR /4C421DD3/4C65D28E
Op 0 0 0
At SMD
T0 0 150 200 200 1800 40 M V 20 N"C71"
T1 0 -150 200 200 1800 40 M I 20 N"10nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 176 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE SO8E
Po 58516 40232 2700 15 42806F54 4C65A75D ~~
Li SO8E
Cd module CMS SOJ 8 pins etroit
Kw CMS SOJ
Sc 4C65A75D
AR /4C4227FE/4C65A75D
Op 0 0 0
At SMD
T0 0 -350 450 450 2700 60 N V 21 N"U8"
T1 0 400 350 350 2700 60 N V 21 N"X25X64MB"
DS -1050 700 -1050 750 50 21
DS -1050 750 1050 750 50 21
DS 1050 -750 -1050 -750 50 21
DS -1050 -750 -1050 700 50 21
DS -1050 -200 -850 -200 50 21
DS -850 -200 -850 200 50 21
DS -850 200 -1050 200 50 21
DS 1050 -750 1050 750 50 21
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 200 450 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-19 13:40:42 +03:00
Po -750 -1050
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 200 450 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 122 "/FPGA_Spartan6/PROG_CSO"
2010-08-19 13:40:42 +03:00
Po -750 1050
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 200 450 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 126 "/FPGA_Spartan6/PROG_MISO3"
2010-08-19 13:40:42 +03:00
Po -250 -1050
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 200 450 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 121 "/FPGA_Spartan6/PROG_CCLK"
2010-08-19 13:40:42 +03:00
Po 250 -1050
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 200 450 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 123 "/FPGA_Spartan6/PROG_MISO0"
2010-08-19 13:40:42 +03:00
Po 750 -1050
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 200 450 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 124 "/FPGA_Spartan6/PROG_MISO1"
2010-08-19 13:40:42 +03:00
Po -250 1050
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 200 450 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 125 "/FPGA_Spartan6/PROG_MISO2"
2010-08-19 13:40:42 +03:00
Po 250 1050
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 200 450 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 750 1050
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$SHAPE3D
Na "smd/cms_so8.wrl"
Sc 0.500000 0.320000 0.500000
Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000
$EndSHAPE3D
$EndMODULE SO8E
$MODULE 1206
Po 48986 39693 1800 15 4C5FF890 4C61D151 ~~
Li 1206
Sc 4C61D151
AR /4C421DD3/4C61D151
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"C33"
T1 0 150 200 200 1800 40 N I 25 N"10uF"
DS -798 384 -798 -384 50 21
DS -798 -384 798 -384 50 21
DS 798 -384 798 384 50 21
DS 798 384 -798 384 50 21
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 355 668 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
Po -570 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 355 668 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 570 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 1206
$MODULE 0402
Po 56300 35700 2700 0 4C5FF890 4C656AC0 ~~
Li 0402
Sc 4C656AC0
AR /4C431A63/4C656AC0
Op 0 0 0
At SMD
T0 0 150 200 200 2700 40 M V 20 N"C45"
T1 0 -150 200 200 2700 40 M I 20 N"470nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 1 "+1.2V"
Po -176 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 176 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 1210
Po 54480 39590 1800 15 4C5FF890 4C656A80 ~~
Li 1210
Sc 4C656A80
AR /4C431A63/4C656A80
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"C39"
T1 0 150 200 200 1800 40 N I 25 N"100uF"
DS -798 542 -798 -542 50 21
DS -798 -542 798 -542 50 21
DS 798 -542 798 542 50 21
DS 798 542 -798 542 50 21
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 355 984 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 1 "+1.2V"
Po -570 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 355 984 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 570 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 1210
$MODULE 1210
Po 62900 29400 0 15 4C5FF890 4C656BF8 ~~
Li 1210
Sc 4C656BF8
AR /4C431A63/4C656BF8
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"C40"
T1 0 150 200 200 0 40 N I 25 N"100uF"
DS -798 542 -798 -542 50 21
DS -798 -542 798 -542 50 21
DS 798 -542 798 542 50 21
DS 798 542 -798 542 50 21
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 355 984 0 0 0
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
Po -570 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 355 984 0 0 0
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 570 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 1210
$MODULE 1210
Po 62500 27900 1800 15 4C5FF890 4C656CB7 ~~
Li 1210
Sc 4C656CB7
AR /4C431A63/4C656CB7
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"C41"
T1 0 150 200 200 1800 40 N I 25 N"100uF"
DS -798 542 -798 -542 50 21
DS -798 -542 798 -542 50 21
DS 798 -542 798 542 50 21
DS 798 542 -798 542 50 21
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 355 984 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
Po -570 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 355 984 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 570 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 1210
$MODULE 1210
Po 61654 39882 0 15 4C5FF890 4C656D97 ~~
Li 1210
Sc 4C656D97
AR /4C431A63/4C656D97
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"C54"
T1 0 150 200 200 0 40 N I 25 N"100uF"
DS -798 542 -798 -542 50 21
DS -798 -542 798 -542 50 21
DS 798 -542 798 542 50 21
DS 798 542 -798 542 50 21
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 355 984 0 0 0
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
Po -570 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 355 984 0 0 0
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 570 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 1210
$MODULE 1210
Po 52700 39580 1800 15 4C5FF890 4C656D43 ~~
Li 1210
Sc 4C656D43
AR /4C431A63/4C656D43
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"C55"
T1 0 150 200 200 1800 40 N I 25 N"100uF"
DS -798 542 -798 -542 50 21
DS -798 -542 798 -542 50 21
DS 798 -542 798 542 50 21
DS 798 542 -798 542 50 21
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 355 984 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-19 13:40:42 +03:00
Po -570 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 355 984 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 570 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 1210
$MODULE 1210
Po 47000 29400 0 15 4C5FF890 4C656CF9 ~~
Li 1210
Sc 4C656CF9
AR /4C431A63/4C656CF9
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"C56"
T1 0 150 200 200 0 40 N I 25 N"100uF"
DS -798 542 -798 -542 50 21
DS -798 -542 798 -542 50 21
DS 798 -542 798 542 50 21
DS 798 542 -798 542 50 21
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 355 984 0 0 0
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
Po -570 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 355 984 0 0 0
2010-08-09 23:37:18 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 570 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 1210
$MODULE 0805
Po 55512 39370 2700 0 4C5FF890 4C656ABD ~~
Li 0805
Sc 4C656ABD
AR /4C431A63/4C656ABD
Op 0 0 0
At SMD
T0 0 150 200 200 2700 40 M V 20 N"C42"
T1 0 -150 200 200 2700 40 M I 20 N"4.7uF"
DS -561 -305 -561 305 50 20
DS -561 305 561 305 50 20
DS 561 305 561 -305 50 20
DS 561 -305 -561 -305 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 275 510 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 1 "+1.2V"
Po -373 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 275 510 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 373 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0805
$MODULE 0805
Po 61000 30600 2700 0 4C5FF890 4C656BF9 ~~
Li 0805
Sc 4C656BF9
AR /4C431A63/4C656BF9
Op 0 0 0
At SMD
T0 0 150 200 200 2700 40 M V 20 N"C43"
T1 0 -150 200 200 2700 40 M I 20 N"4.7uF"
DS -561 -305 -561 305 50 20
DS -561 305 561 305 50 20
DS 561 305 561 -305 50 20
DS 561 -305 -561 -305 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 275 510 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 3 "+2.5V"
Po -373 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 275 510 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 373 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0805
$MODULE 0805
Po 60000 29700 0 0 4C5FF890 4C656CB9 ~~
Li 0805
Sc 4C656CB9
AR /4C431A63/4C656CB9
Op 0 0 0
At SMD
T0 0 150 200 200 0 40 M V 20 N"C44"
T1 0 -150 200 200 0 40 M I 20 N"4.7uF"
DS -561 -305 -561 305 50 20
DS -561 305 561 305 50 20
DS 561 305 561 -305 50 20
DS 561 -305 -561 -305 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 275 510 0 0 0
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 4 "+3.3V"
Po -373 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 275 510 0 0 0
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 373 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0805
$MODULE 0805
Po 51358 30382 900 0 4C5FF890 4C656C16 ~~
Li 0805
Sc 4C656C16
AR /4C431A63/4C656C16
Op 0 0 0
At SMD
T0 0 150 200 200 900 40 M V 20 N"C46"
T1 0 -150 200 200 900 40 M I 20 N"4.7uF"
DS -561 -305 -561 305 50 20
DS -561 305 561 305 50 20
DS 561 305 561 -305 50 20
DS 561 -305 -561 -305 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 275 510 0 0 900
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 3 "+2.5V"
Po -373 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 275 510 0 0 900
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 373 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0805
$MODULE 0805
Po 61000 38900 2700 0 4C5FF890 4C656D98 ~~
Li 0805
Sc 4C656D98
AR /4C431A63/4C656D98
Op 0 0 0
At SMD
T0 0 150 200 200 2700 40 M V 20 N"C57"
T1 0 -150 200 200 2700 40 M I 20 N"4.7uF"
DS -561 -305 -561 305 50 20
DS -561 305 561 305 50 20
DS 561 305 561 -305 50 20
DS 561 -305 -561 -305 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 275 510 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 3 "+2.5V"
Po -373 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 275 510 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 373 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0805
$MODULE 0805
Po 51600 38500 2700 0 4C5FF890 4C656D44 ~~
Li 0805
Sc 4C656D44
AR /4C431A63/4C656D44
Op 0 0 0
At SMD
T0 0 150 200 200 2700 40 M V 20 N"C58"
T1 0 -150 200 200 2700 40 M I 20 N"4.7uF"
DS -561 -305 -561 305 50 20
DS -561 305 561 305 50 20
DS 561 305 561 -305 50 20
DS 561 -305 -561 -305 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 275 510 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-19 13:40:42 +03:00
Po -373 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 275 510 0 0 2700
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 373 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0805
$MODULE 0805
Po 48945 29921 1800 0 4C5FF890 4C656CFA ~~
Li 0805
Sc 4C656CFA
AR /4C431A63/4C656CFA
Op 0 0 0
At SMD
T0 0 150 200 200 1800 40 M V 20 N"C59"
T1 0 -150 200 200 1800 40 M I 20 N"4.7uF"
DS -561 -305 -561 305 50 20
DS -561 305 561 305 50 20
DS 561 305 561 -305 50 20
DS 561 -305 -561 -305 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 275 510 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 3 "+2.5V"
Po -373 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 275 510 0 0 1800
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 373 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0805
$MODULE 0402
Po 56300 30000 900 0 4C5FF890 4C656CBA ~~
Li 0402
Sc 4C656CBA
AR /4C431A63/4C656CBA
Op 0 0 0
At SMD
T0 0 150 200 200 900 40 M V 20 N"C47"
T1 0 -150 200 200 900 40 M I 20 N"470nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-09 23:37:18 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 900
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 4 "+3.3V"
Po -176 0
2010-08-09 23:37:18 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 900
2010-08-09 23:37:18 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-08-09 23:37:18 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
2010-08-10 05:55:50 +03:00
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 56300 33300 900 0 4C5FF890 4C656AC2 ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656AC2
AR /4C431A63/4C656AC2
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 900 40 M V 20 N"C48"
T1 0 -150 200 200 900 40 M I 20 N"470nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 1 "+1.2V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 57200 33500 2250 0 4C5FF890 4C656C24 ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656C24
AR /4C431A63/4C656C24
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 2250 40 M V 20 N"C49"
T1 0 -150 200 200 2250 40 M I 20 N"470nF"
2010-08-14 02:38:38 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 2250
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 2250
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 59100 30000 900 0 4C5FF890 4C656CBB ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656CBB
AR /4C431A63/4C656CBB
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 900 40 M V 20 N"C50"
T1 0 -150 200 200 900 40 M I 20 N"470nF"
2010-08-13 14:16:55 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 57700 34400 1800 0 4C5FF890 4C656C27 ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656C27
AR /4C431A63/4C656C27
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C51"
T1 0 -150 200 200 1800 40 M I 20 N"470nF"
2010-08-13 14:16:55 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 56300 31900 900 0 4C5FF890 4C656BFA ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656BFA
AR /4C431A63/4C656BFA
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 900 40 M V 20 N"C52"
T1 0 -150 200 200 900 40 M I 20 N"470nF"
2010-08-14 02:38:38 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 54600 34400 1800 0 4C5FF890 4C656C49 ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656C49
AR /4C431A63/4C656C49
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C53"
T1 0 -150 200 200 1800 40 M I 20 N"470nF"
2010-08-13 14:16:55 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 60800 37100 0 0 4C5FF890 4C656D99 ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656D99
AR /4C431A63/4C656D99
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C60"
T1 0 -150 200 200 0 40 M I 20 N"470nF"
2010-08-14 02:38:38 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 56300 38500 2700 0 4C5FF890 4C656D45 ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656D45
AR /4C431A63/4C656D45
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 2700 40 M V 20 N"C61"
T1 0 -150 200 200 2700 40 M I 20 N"470nF"
2010-08-14 02:38:38 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 2700
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 2700
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 51800 31200 1800 0 4C5FF890 4C656CFB ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656CFB
AR /4C431A63/4C656CFB
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C62"
T1 0 -150 200 200 1800 40 M I 20 N"470nF"
2010-08-13 14:16:55 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-14 02:38:38 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-14 02:38:38 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 57600 35300 1350 0 4C5FF890 4C656D9A ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656D9A
AR /4C431A63/4C656D9A
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1350 40 M V 20 N"C63"
T1 0 -150 200 200 1350 40 M I 20 N"470nF"
2010-08-14 02:38:38 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1350
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1350
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 53300 38800 0 0 4C5FF890 4C656D46 ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656D46
AR /4C431A63/4C656D46
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C64"
T1 0 -150 200 200 0 40 M I 20 N"470nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 55200 35500 450 0 4C5FF890 4C656CFC ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656CFC
AR /4C431A63/4C656CFC
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 450 40 M V 20 N"C65"
T1 0 -150 200 200 450 40 M I 20 N"470nF"
2010-08-14 02:38:38 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 450
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 450
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 59600 34400 1800 0 4C5FF890 4C656D9D ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656D9D
AR /4C431A63/4C656D9D
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C66"
T1 0 -150 200 200 1800 40 M I 20 N"470nF"
2010-08-14 02:38:38 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-14 15:42:37 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-14 15:42:37 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 58900 38900 1800 0 4C5FF890 4C656D49 ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656D49
AR /4C431A63/4C656D49
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C67"
T1 0 -150 200 200 1800 40 M I 20 N"470nF"
2010-08-14 02:38:38 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-14 15:42:37 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-14 15:42:37 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 02:38:38 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 52900 34400 0 0 4C5FF890 4C656D08 ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656D08
AR /4C431A63/4C656D08
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C68"
T1 0 -150 200 200 0 40 M I 20 N"470nF"
2010-08-14 16:23:56 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-14 16:23:56 +03:00
Sh "1" R 157 236 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 16:23:56 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-14 16:23:56 +03:00
Sh "2" R 157 236 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 16:23:56 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 56300 37000 900 0 4C5FF890 4C656D53 ~~
2010-08-10 05:55:50 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C656D53
AR /4C431A63/4C656D53
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 900 40 M V 20 N"C69"
T1 0 -150 200 200 900 40 M I 20 N"470nF"
2010-08-13 14:16:55 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 251 "VCCO2"
2010-08-10 05:55:50 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-13 14:16:55 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
2010-08-19 13:40:42 +03:00
$MODULE TSSOP-14
Po 63080 25950 2700 0 4C5F22BD 4C6552BF ~~
Li TSSOP-14
Sc 4C6552BF
AR /4C5F1EDC/4C6552BF
2010-08-10 05:55:50 +03:00
Op 0 0 0
2010-08-19 13:40:42 +03:00
T0 50 1822 276 276 2700 69 M V 20 N"U7"
T1 70 -1848 276 276 2700 69 M V 20 N"MIC2550AYTS"
DC -738 -409 -666 -418 150 20
DS 987 -634 -984 -628 150 20
DS -984 -628 -984 -187 150 20
DS -984 -187 -726 -187 150 20
DS -726 -187 -726 185 150 20
DS -726 185 -987 188 150 20
DS -987 188 -984 649 150 20
DS -984 649 982 650 150 20
DS 982 650 986 -634 150 20
DS -984 787 984 787 1 20
DS 984 787 984 -787 1 20
DS -984 -787 984 -787 1 20
DS -984 787 -984 -787 1 20
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 137 570 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 15:42:37 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
Po -767 -1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 137 570 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 15:42:37 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po -511 -1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 137 570 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 18:43:33 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po -255 -1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 137 570 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 18:43:33 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 0 -1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 137 570 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 15:42:37 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 255 -1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 137 570 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 15:42:37 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 511 -1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 137 570 0 0 900
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 18:43:33 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 767 -1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 137 570 0 0 2700
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 18:43:33 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 767 1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "9" R 137 570 0 0 2700
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 15:42:37 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 511 1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "10" R 137 570 0 0 2700
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-14 15:42:37 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 242 "N-000431"
2010-08-19 13:40:42 +03:00
Po 255 1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "11" R 137 570 0 0 2700
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 243 "N-000432"
Po 0 1112
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "12" R 137 570 0 0 2700
2010-08-10 05:55:50 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 4 "+3.3V"
Po -255 1112
2010-08-10 05:55:50 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$PAD
Sh "13" R 137 570 0 0 2700
Dr 0 0 0
At SMD N 00440001
Ne 0 ""
Po -511 1112
$EndPAD
$PAD
Sh "14" R 137 570 0 0 2700
Dr 0 0 0
At SMD N 00440001
Ne 4 "+3.3V"
Po -767 1112
$EndPAD
$EndMODULE TSSOP-14
$MODULE 1210
Po 67160 19800 1800 15 4C5FF890 4C6552BA ~~
Li 1210
Sc 4C6552BA
AR /4C5F1EDC/4C6552BA
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"F2"
T1 0 150 200 200 1800 40 N I 25 N"MICROSMD075F"
DS -798 542 -798 -542 50 21
DS -798 -542 798 -542 50 21
DS 798 -542 798 542 50 21
DS 798 542 -798 542 50 21
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 355 984 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 235 "N-000422"
2010-08-19 13:40:42 +03:00
Po -570 0
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 355 984 0 0 1800
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 5 "+5V"
Po 570 0
2010-08-10 05:55:50 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 1210
$MODULE 0805
Po 66130 25290 0 15 4C5FF890 4C6552BE ~~
Li 0805
Sc 4C6552BE
AR /4C5F1EDC/4C6552BE
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 0 40 N V 25 N"C35"
T1 0 150 200 200 0 40 N I 25 N"1uF"
DS -561 305 -561 -305 50 21
DS -561 -305 561 -305 50 21
DS 561 -305 561 305 50 21
DS 561 305 -561 305 50 21
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 275 510 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
Po -373 0
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 275 510 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 373 0
2010-08-10 05:55:50 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0805
$MODULE 0805
Po 68490 25410 0 15 4C5FF890 4C6552BD ~~
Li 0805
Sc 4C6552BD
AR /4C5F1EDC/4C6552BD
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 0 40 N V 25 N"C36"
T1 0 150 200 200 0 40 N I 25 N"1uF"
DS -561 305 -561 -305 50 21
DS -561 -305 561 -305 50 21
DS 561 -305 561 305 50 21
DS 561 305 -561 305 50 21
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 275 510 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-19 13:40:42 +03:00
Po -373 0
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 275 510 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 373 0
2010-08-10 05:55:50 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0805
2010-08-10 05:55:50 +03:00
$MODULE 0603
2010-08-19 13:40:42 +03:00
Po 68330 28770 0 15 4C5FF890 4C6552B8 ~~
2010-08-10 05:55:50 +03:00
Li 0603
2010-08-19 13:40:42 +03:00
Sc 4C6552B8
AR /4C5F1EDC/4C6552B8
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 0 40 N V 25 N"V3"
T1 0 150 200 200 0 40 N I 25 N"V0402MHS03"
2010-08-10 05:55:50 +03:00
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 243 "N-000432"
2010-08-10 05:55:50 +03:00
Po -294 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
2010-08-19 13:40:42 +03:00
Po 68250 27490 0 15 4C5FF890 4C6552B9 ~~
2010-08-10 05:55:50 +03:00
Li 0603
2010-08-19 13:40:42 +03:00
Sc 4C6552B9
AR /4C5F1EDC/4C6552B9
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 0 40 N V 25 N"V4"
T1 0 150 200 200 0 40 N I 25 N"V0402MHS03"
2010-08-10 05:55:50 +03:00
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 242 "N-000431"
2010-08-10 05:55:50 +03:00
Po -294 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-10 05:55:50 +03:00
Po 294 0
$EndPAD
$EndMODULE 0603
2010-08-19 13:40:42 +03:00
$MODULE 0402
Po 65600 23720 0 15 4C5FF890 4C6552BC ~~
Li 0402
Sc 4C6552BC
AR /4C5F1EDC/4C6552BC
2010-08-10 05:55:50 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 0 40 N V 25 N"C37"
T1 0 150 200 200 0 40 N I 25 N"470nF"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
2010-08-10 05:55:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
Po -176 0
2010-08-10 05:55:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-10 05:55:50 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-08-10 05:55:50 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 67770 21890 0 15 4C5FF890 4C6552B7 ~~
Li 0402
Sc 4C6552B7
AR /4C5F1EDC/4C6552B7
2010-08-10 06:25:05 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 0 40 N V 25 N"C38"
T1 0 150 200 200 0 40 N I 25 N"4.7nF"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
2010-08-10 06:25:05 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-10 06:25:05 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 244 "N-000433"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-08-10 06:25:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-10 06:25:05 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 176 0
2010-08-10 06:25:05 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 69610 22370 0 15 4C5FF890 4C6552B6 ~~
Li 0402
Sc 4C6552B6
AR /4C5F1EDC/4C6552B6
2010-08-10 06:25:05 +03:00
Op 0 0 0
2010-08-19 13:40:42 +03:00
At SMD
T0 0 -150 200 200 0 40 N V 25 N"R15"
T1 0 150 200 200 0 40 N I 25 N"1M"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
2010-08-10 06:25:05 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 244 "N-000433"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-08-10 06:25:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 176 0
2010-08-10 06:25:05 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0603
Po 67040 22310 0 15 4C5FF890 4C6552B1 ~~
Li 0603
Sc 4C6552B1
AR /4C5F1EDC/4C6552B1
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"L7"
T1 0 150 200 200 0 40 N I 25 N"FB"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
2010-08-10 06:25:05 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -294 0
2010-08-10 06:25:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 294 0
2010-08-10 06:25:05 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0603
$MODULE 0603
Po 65770 21890 0 15 4C5FF890 4C6552B0 ~~
Li 0603
Sc 4C6552B0
AR /4C5F1EDC/4C6552B0
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"L6"
T1 0 150 200 200 0 40 N I 25 N"FB"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
2010-08-10 06:25:05 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 235 "N-000422"
2010-08-19 13:40:42 +03:00
Po -294 0
2010-08-10 06:25:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 294 0
2010-08-10 06:25:05 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0603
$MODULE 0603
Po 63977 19488 0 15 4C5FF890 4C63F252 ~~
Li 0603
Sc 4C63F252
AR /4C5F1EDC/4C63F252
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"L4"
T1 0 150 200 200 0 40 N I 25 N"FB"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
2010-08-10 06:25:05 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 240 "N-000429"
2010-08-19 13:40:42 +03:00
Po -294 0
2010-08-10 06:25:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 239 "N-000427"
2010-08-19 13:40:42 +03:00
Po 294 0
2010-08-10 06:25:05 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0603
$MODULE 0603
Po 58920 19610 0 15 4C5FF890 4C63F248 ~~
Li 0603
Sc 4C63F248
AR /4C5F1EDC/4C63F248
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 0 40 N V 25 N"L5"
T1 0 150 200 200 0 40 N I 25 N"FB"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 237 "N-000425"
2010-08-19 13:40:42 +03:00
Po -294 0
2010-08-11 01:38:37 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po 294 0
2010-08-11 01:38:37 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0603
2010-08-11 01:38:37 +03:00
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 62205 34055 0 0 4C5FF890 4C61CE30 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CE30
AR /4C421DD3/4C61CE30
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"R14"
T1 0 -150 200 200 0 40 M I 20 N"1K_1%"
2010-08-14 06:09:52 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-18 03:04:05 +03:00
Sh "1" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 225 "N-000058"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-18 03:04:05 +03:00
Sh "2" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
2010-08-19 13:40:42 +03:00
$MODULE 0603
Po 66309 29851 0 15 4C5FF890 4C61CFA0 ~~
Li 0603
Sc 4C61CFA0
AR /4C421DD3/4C61CFA0
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"C27"
T1 0 150 200 200 0 40 N I 25 N"1uF"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 3 "+2.5V"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 47061 30638 0 0 4C5FF890 4C61CF2F ~~
Li 0603
Sc 4C61CF2F
AR /4C421DD3/4C61CF2F
Op 0 0 0
At SMD
T0 0 150 200 200 0 40 M V 20 N"C21"
T1 0 -150 200 200 0 40 M I 20 N"1uF"
DS -443 -227 -443 227 50 20
DS -443 227 443 227 50 20
DS 443 227 443 -227 50 20
DS 443 -227 -443 -227 50 20
$PAD
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00440001
Ne 3 "+2.5V"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00440001
Ne 224 "GND"
Po 294 0
$EndPAD
$EndMODULE 0603
2010-08-11 01:38:37 +03:00
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 62402 35827 0 0 4C5FF890 4C61CFA5 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CFA5
AR /4C421DD3/4C61CFA5
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C28"
2010-08-14 06:09:52 +03:00
T1 0 -150 200 200 0 40 M I 20 N"100nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
Sh "1" R 157 236 0 0 0
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 0
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 62402 37402 0 0 4C5FF890 4C61CFA4 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CFA4
AR /4C421DD3/4C61CFA4
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C29"
T1 0 -150 200 200 0 40 M I 20 N"10nF"
2010-08-14 06:09:52 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 65354 38189 1800 0 4C5FF890 4C61CFA3 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CFA3
AR /4C421DD3/4C61CFA3
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C31"
T1 0 -150 200 200 1800 40 M I 20 N"10nF"
2010-08-14 06:09:52 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-17 06:48:30 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-17 06:48:30 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 66142 34646 2700 0 4C5FF890 4C61CFA2 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CFA2
AR /4C421DD3/4C61CFA2
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 2700 40 M V 20 N"C30"
T1 0 -150 200 200 2700 40 M I 20 N"10nF"
2010-08-14 06:09:52 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 2700
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 2700
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 65354 38780 1800 0 4C5FF890 4C61CFA1 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CFA1
AR /4C421DD3/4C61CFA1
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C32"
T1 0 -150 200 200 1800 40 M I 20 N"10nF"
2010-08-14 06:09:52 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-14 06:09:52 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-14 06:09:52 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 46864 35756 0 0 4C5FF890 4C61CF27 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CF27
AR /4C421DD3/4C61CF27
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C26"
T1 0 -150 200 200 0 40 M I 20 N"10nF"
2010-08-14 02:20:50 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 46260 37402 0 0 4C5FF890 4C61CF17 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CF17
AR /4C421DD3/4C61CF17
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C24"
T1 0 -150 200 200 0 40 M I 20 N"10nF"
2010-08-14 02:20:50 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-17 00:32:29 +03:00
Po 50014 30441 1800 0 4C5FF890 4C61CF16 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-11 05:25:32 +03:00
Sc 4C61CF16
2010-08-11 01:38:37 +03:00
AR /4C421DD3/4C61CF16
Op 0 0 0
At SMD
2010-08-14 02:20:50 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C25"
T1 0 -150 200 200 1800 40 M I 20 N"10nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-14 02:20:50 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-14 02:20:50 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 50014 38709 1800 0 4C5FF890 4C61CEF7 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CEF7
AR /4C421DD3/4C61CEF7
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C23"
T1 0 -150 200 200 1800 40 M I 20 N"10nF"
2010-08-14 02:20:50 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 50014 38118 1800 0 4C5FF890 4C61CEB9 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CEB9
AR /4C421DD3/4C61CEB9
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C22"
T1 0 -150 200 200 1800 40 M I 20 N"100nF"
2010-08-14 02:20:50 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 62205 33268 1800 0 4C5FF890 4C61CE31 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CE31
AR /4C421DD3/4C61CE31
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"R13"
T1 0 -150 200 200 1800 40 M I 20 N"1K_1%"
2010-08-14 02:20:50 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-14 02:20:50 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-14 02:20:50 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 225 "N-000058"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 46200 34200 0 0 4C5FF890 4C61CDB5 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CDB5
AR /4C421DD3/4C61CDB5
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"R12"
T1 0 -150 200 200 0 40 M I 20 N"1K_1%"
2010-08-14 02:20:50 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 226 "N-000059"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 46200 33000 1800 0 4C5FF890 4C61CD4A ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CD4A
AR /4C421DD3/4C61CD4A
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"R11"
T1 0 -150 200 200 1800 40 M I 20 N"1K_1%"
2010-08-14 02:20:50 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-14 02:20:50 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-14 02:20:50 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 226 "N-000059"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 62205 33661 1800 0 4C5FF890 4C61CCE3 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CCE3
AR /4C421DD3/4C61CCE3
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C19"
T1 0 -150 200 200 1800 40 M I 20 N"100nF"
2010-08-14 02:20:50 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 225 "N-000058"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 62205 34449 0 0 4C5FF890 4C61CCE2 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CCE2
AR /4C421DD3/4C61CCE2
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C20"
2010-08-14 02:20:50 +03:00
T1 0 -150 200 200 0 40 M I 20 N"100nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
Sh "1" R 157 236 0 0 0
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 225 "N-000058"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 0
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
2010-08-19 13:40:42 +03:00
$MODULE 0402
Po 46200 33800 0 0 4C5FF890 4C61CC96 ~~
Li 0402
Sc 4C61CC96
AR /4C421DD3/4C61CC96
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C18"
T1 0 -150 200 200 0 40 M I 20 N"100nF"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 226 "N-000059"
Po -176 0
2010-08-11 01:38:37 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 02:20:50 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-08-11 01:38:37 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
2010-08-11 01:38:37 +03:00
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 46200 33400 1800 0 4C5FF890 4C61CC73 ~~
2010-08-11 01:38:37 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C61CC73
AR /4C421DD3/4C61CC73
2010-08-11 01:38:37 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C17"
T1 0 -150 200 200 1800 40 M I 20 N"100nF"
2010-08-14 06:09:52 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-11 01:38:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
2010-08-11 01:38:37 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-11 01:38:37 +03:00
Dr 0 0 0
2010-08-14 06:09:52 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 226 "N-000059"
2010-08-11 01:38:37 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
2010-08-19 13:40:42 +03:00
$MODULE USB-48204
Po 56200 18910 1800 15 4C5F28A8 4C5F23DD ~~
Li USB-48204
Sc 4C5F23DD
AR /4C5F1EDC/4C5F23DD
2010-08-13 00:12:57 +03:00
Op 0 0 0
2010-08-19 13:40:42 +03:00
T0 120 -3162 157 157 1800 20 N V 21 N"J5"
T1 0 118 118 118 0 20 N I 21 N"USB-48204-0001"
DS -1499 5299 -1704 5299 60 21
DS -1704 5299 -1704 5178 60 21
DS -1704 5178 -1502 5178 60 21
DS 1500 5298 1708 5298 60 21
DS 1708 5298 1707 5180 60 21
DS 1707 5180 1499 5181 60 21
DS -1500 -3000 -1500 5300 60 21
DS -1500 -3000 1500 -3000 60 21
DS 1500 -3000 1500 5300 60 21
DS -1500 5300 1500 5300 60 21
2010-08-13 00:12:57 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 470 470 0 0 1800
Dr 360 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 239 "N-000427"
2010-08-19 13:40:42 +03:00
Po 0 -2362
2010-08-13 00:12:57 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$PAD
Sh "2" C 470 470 0 0 1800
Dr 360 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 238 "N-000426"
2010-08-19 13:40:42 +03:00
Po 0 -1575
$EndPAD
$PAD
Sh "3" C 470 470 0 0 1800
Dr 360 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 241 "N-000430"
2010-08-19 13:40:42 +03:00
Po 0 -787
$EndPAD
$PAD
Sh "3" C 470 470 0 0 1800
Dr 360 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 241 "N-000430"
2010-08-19 13:40:42 +03:00
Po 0 0
$EndPAD
$PAD
Sh "S1" C 670 670 0 0 1800
Dr 532 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 236 "N-000424"
2010-08-19 13:40:42 +03:00
Po 1077 287
$EndPAD
$PAD
Sh "S2" C 670 670 0 0 1800
Dr 532 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 236 "N-000424"
2010-08-19 13:40:42 +03:00
Po -1077 287
$EndPAD
$PAD
Sh "S3" C 670 670 0 0 1800
Dr 532 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 236 "N-000424"
2010-08-19 13:40:42 +03:00
Po 1077 -2468
$EndPAD
$PAD
Sh "S4" C 670 670 0 0 1800
Dr 532 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 236 "N-000424"
2010-08-19 13:40:42 +03:00
Po -1077 -2468
$EndPAD
$EndMODULE USB-48204
$MODULE 1210
Po 67126 18110 1800 15 4C5FF890 4C5F2B55 ~~
Li 1210
Sc 4C5F2B55
AR /4C5F1EDC/4C5F2B55
2010-08-13 00:12:57 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"F1"
T1 0 150 200 200 1800 40 N I 25 N"MICROSMD075F"
DS -798 542 -798 -542 50 21
DS -798 -542 798 -542 50 21
DS 798 -542 798 542 50 21
DS 798 542 -798 542 50 21
2010-08-13 00:12:57 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 355 984 0 0 1800
2010-08-13 00:12:57 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 240 "N-000429"
2010-08-19 13:40:42 +03:00
Po -570 0
2010-08-13 00:12:57 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 355 984 0 0 1800
2010-08-13 00:12:57 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 5 "+5V"
Po 570 0
2010-08-13 00:12:57 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 1210
2010-08-13 17:27:10 +03:00
$MODULE 0603
2010-08-19 13:40:42 +03:00
Po 51200 24400 1800 15 4C5FF890 4C5D7F9F ~~
2010-08-13 17:27:10 +03:00
Li 0603
2010-08-19 13:40:42 +03:00
Sc 4C5D7F9F
AR /4C4320F3/4C5D7F9F
2010-08-13 17:27:10 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"C1"
T1 0 150 200 200 1800 40 N I 25 N"1uF"
2010-08-13 17:27:10 +03:00
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
2010-08-13 17:27:10 +03:00
Po -294 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
2010-08-13 17:27:10 +03:00
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
2010-08-19 13:40:42 +03:00
Po 63674 20567 1800 15 4C5FF890 4C5D7FA5 ~~
2010-08-13 17:27:10 +03:00
Li 0603
2010-08-19 13:40:42 +03:00
Sc 4C5D7FA5
AR /4C4320F3/4C5D7FA5
2010-08-13 17:27:10 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"C7"
T1 0 150 200 200 1800 40 N I 25 N"1uF"
2010-08-13 17:27:10 +03:00
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 37 "/Ethernet_Phy/ETH_A3.3V"
2010-08-13 17:27:10 +03:00
Po -294 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 17:27:10 +03:00
Po 294 0
$EndPAD
$EndMODULE 0603
2010-08-19 13:40:42 +03:00
$MODULE 0603
Po 63976 23031 1800 15 4C5FF890 4C5F2033 ~~
Li 0603
Sc 4C5F2033
AR /4C5F1EDC/4C5F2033
2010-08-13 17:27:10 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"C13"
T1 0 150 200 200 1800 40 N I 25 N"1uF"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
2010-08-13 17:27:10 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
Po -294 0
2010-08-13 17:27:10 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 294 0
2010-08-13 17:27:10 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0603
$MODULE 0603
Po 58465 22441 1800 15 4C5FF890 4C5F2037 ~~
Li 0603
Sc 4C5F2037
AR /4C5F1EDC/4C5F2037
2010-08-13 17:27:10 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"C14"
T1 0 150 200 200 1800 40 N I 25 N"1uF"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
2010-08-13 17:27:10 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
Po -294 0
2010-08-13 17:27:10 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 294 0
2010-08-13 17:27:10 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0603
$MODULE 0603
Po 59843 22638 1800 15 4C5FF890 4C5F2039 ~~
Li 0603
Sc 4C5F2039
AR /4C5F1EDC/4C5F2039
2010-08-13 17:27:10 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"C15"
T1 0 150 200 200 1800 40 N I 25 N"470nF"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
2010-08-13 17:27:10 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-19 13:40:42 +03:00
Po -294 0
2010-08-13 17:27:10 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 294 0
2010-08-13 17:27:10 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0603
2010-08-13 17:27:10 +03:00
$MODULE 0603
2010-08-19 13:40:42 +03:00
Po 61280 20050 1800 15 4C5FF890 4C5F2CA7 ~~
2010-08-13 17:27:10 +03:00
Li 0603
2010-08-19 13:40:42 +03:00
Sc 4C5F2CA7
AR /4C5F1EDC/4C5F2CA7
2010-08-13 17:27:10 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"V1"
T1 0 150 200 200 1800 40 N I 25 N"V0402MHS03"
2010-08-13 17:27:10 +03:00
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 241 "N-000430"
2010-08-13 17:27:10 +03:00
Po -294 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 17:27:10 +03:00
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
2010-08-19 13:40:42 +03:00
Po 60918 22141 1800 15 4C5FF890 4C5F2CA3 ~~
2010-08-13 17:27:10 +03:00
Li 0603
2010-08-19 13:40:42 +03:00
Sc 4C5F2CA3
AR /4C5F1EDC/4C5F2CA3
2010-08-13 17:27:10 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"V2"
T1 0 150 200 200 1800 40 N I 25 N"V0402MHS03"
2010-08-13 17:27:10 +03:00
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 238 "N-000426"
2010-08-13 17:27:10 +03:00
Po -294 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 197 354 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 17:27:10 +03:00
Po 294 0
$EndPAD
$EndMODULE 0603
2010-08-13 19:24:39 +03:00
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 49659 27453 1800 0 4C5FF890 4C5D80ED ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D80ED
AR /4C4320F3/4C5D80ED
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C2"
T1 0 -150 200 200 1800 40 M I 20 N"1uF"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 17:27:10 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 2 "+1.8V"
2010-08-13 19:24:39 +03:00
Po -176 0
2010-08-13 17:27:10 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
2010-08-13 17:27:10 +03:00
$EndPAD
2010-08-13 19:24:39 +03:00
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 51200 24900 1800 0 4C5FF890 4C5D7FA1 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7FA1
AR /4C4320F3/4C5D7FA1
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C3"
T1 0 -150 200 200 1800 40 M I 20 N"100nF"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 17:27:10 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
2010-08-13 19:24:39 +03:00
Po -176 0
2010-08-13 17:27:10 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
2010-08-13 17:27:10 +03:00
$EndPAD
2010-08-13 19:24:39 +03:00
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 48675 26272 1800 0 4C5FF890 4C5D80F0 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D80F0
AR /4C4320F3/4C5D80F0
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C4"
T1 0 -150 200 200 1800 40 M I 20 N"100nF"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 17:27:10 +03:00
$PAD
Sh "1" R 157 236 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 2 "+1.8V"
2010-08-13 19:24:39 +03:00
Po -176 0
2010-08-13 17:27:10 +03:00
$EndPAD
$PAD
Sh "2" R 157 236 0 0 1800
2010-08-13 17:27:10 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
2010-08-13 17:27:10 +03:00
$EndPAD
2010-08-13 19:24:39 +03:00
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 50000 28346 1800 0 4C5FF890 4C5D7FA3 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7FA3
AR /4C4320F3/4C5D7FA3
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C5"
T1 0 -150 200 200 1800 40 M I 20 N"100nF"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
Sh "1" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 48675 25484 0 0 4C5FF890 4C5D8104 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D8104
AR /4C4320F3/4C5D8104
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C6"
T1 0 -150 200 200 0 40 M I 20 N"100nF"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 36 "/Ethernet_Phy/ETH_A1.8V"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 47690 25484 0 0 4C5FF890 4C5D7FA7 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7FA7
AR /4C4320F3/4C5D7FA7
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C8"
T1 0 -150 200 200 0 40 M I 20 N"100nF"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
Sh "1" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 37 "/Ethernet_Phy/ETH_A3.3V"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 47691 27059 0 0 4C5FF890 4C5D8114 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D8114
AR /4C4320F3/4C5D8114
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C9"
T1 0 -150 200 200 0 40 M I 20 N"100nF"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 43 "/Ethernet_Phy/ETH_PLL1.8V"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 49659 25484 1800 0 4C5FF890 4C5D7E41 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7E41
AR /4C4320F3/4C5D7E41
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C10"
T1 0 -150 200 200 1800 40 M I 20 N"100nF"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-17 00:32:29 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-17 00:32:29 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 48675 27453 1800 0 4C5FF890 4C5D7E43 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7E43
AR /4C4320F3/4C5D7E43
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"C11"
T1 0 -150 200 200 1800 40 M I 20 N"100nF"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 50394 19488 0 0 4C5FF890 4C5D7DCB ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7DCB
AR /4C4320F3/4C5D7DCB
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"C12"
T1 0 -150 200 200 0 40 M I 20 N"47nF"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-17 00:32:29 +03:00
Sh "1" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 232 "N-000404"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-17 00:32:29 +03:00
Sh "2" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 61090 23610 1800 15 4C5FF890 4C5F2D1E ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5F2D1E
AR /4C5F1EDC/4C5F2D1E
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"C16"
T1 0 150 200 200 1800 40 N I 25 N"4.7nF"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
2010-08-13 19:24:39 +03:00
$PAD
2010-08-17 00:32:29 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 236 "N-000424"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-17 00:32:29 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 51500 29000 1800 0 4C5FF890 4C5D7F39 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7F39
AR /4C4320F3/4C5D7F39
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"R1"
T1 0 -150 200 200 1800 40 M I 20 N"4.7K"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 55 "/FPGA_Spartan6/ETH_MDIO"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 46903 24894 1800 0 4C5FF890 4C5D7ECF ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7ECF
AR /4C4320F3/4C5D7ECF
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"R2"
T1 0 -150 200 200 1800 40 M I 20 N"6.65K"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-17 00:32:29 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 228 "N-000396"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-17 00:32:29 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 52953 20866 1800 0 4C5FF890 4C5D7AFE ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7AFE
AR /4C4320F3/4C5D7AFE
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"R3"
T1 0 -150 200 200 1800 40 M I 20 N"49.9"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 234 "N-000406"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 52953 21457 1800 0 4C5FF890 4C5D7AFC ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7AFC
AR /4C4320F3/4C5D7AFC
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"R4"
T1 0 -150 200 200 1800 40 M I 20 N"49.9"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 227 "N-000395"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 47244 20866 0 0 4C5FF890 4C5D7AF7 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7AF7
AR /4C4320F3/4C5D7AF7
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"R5"
T1 0 -150 200 200 0 40 M I 20 N"49.9"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 233 "N-000405"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
2010-08-19 13:40:42 +03:00
Po 47244 21457 0 0 4C5FF890 4C5D7AF9 ~~
2010-08-13 19:24:39 +03:00
Li 0402
2010-08-19 13:40:42 +03:00
Sc 4C5D7AF9
AR /4C4320F3/4C5D7AF9
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"R6"
T1 0 -150 200 200 0 40 M I 20 N"49.9"
2010-08-17 00:32:29 +03:00
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-17 03:06:33 +03:00
Ne 4 "+3.3V"
2010-08-13 19:24:39 +03:00
Po -176 0
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 231 "N-000403"
2010-08-13 19:24:39 +03:00
Po 176 0
$EndPAD
$EndMODULE 0402
2010-08-19 13:40:42 +03:00
$MODULE 0402
Po 50031 24130 1800 0 4C5FF890 4C5D719D ~~
Li 0402
Sc 4C5D719D
AR /4C4320F3/4C5D719D
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 1800 40 M V 20 N"R7"
T1 0 -150 200 200 1800 40 M I 20 N"220"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 230 "N-000402"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 40 "/Ethernet_Phy/ETH_LED0"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-08-13 19:24:39 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 49118 24138 0 0 4C5FF890 4C6D06C7 ~~
Li 0402
Sc 4C6D06C7
AR /4C4320F3/4C5D71DB
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"R8"
T1 0 -150 200 200 0 40 M I 20 N"220"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 229 "N-000397"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 41 "/Ethernet_Phy/ETH_LED1"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-08-13 19:24:39 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 50394 18701 0 0 4C5FF890 4C5D7DC4 ~~
Li 0402
Sc 4C5D7DC4
AR /4C4320F3/4C5D7DC4
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 150 200 200 0 40 M V 20 N"R9"
T1 0 -150 200 200 0 40 M I 20 N"1M"
DS -305 -168 -305 168 50 20
DS -305 168 305 168 50 20
DS 305 168 305 -168 50 20
DS 305 -168 -305 -168 50 20
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 232 "N-000404"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 0
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-17 00:32:29 +03:00
At SMD N 00440001
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-08-13 19:24:39 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE 0402
Po 61115 22732 1800 15 4C5FF890 4C5F2D27 ~~
Li 0402
Sc 4C5F2D27
AR /4C5F1EDC/4C5F2D27
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 1800 40 N V 25 N"R10"
T1 0 150 200 200 1800 40 N I 25 N"1M"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 236 "N-000424"
2010-08-19 13:40:42 +03:00
Po -176 0
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 157 236 0 0 1800
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 176 0
2010-08-13 19:24:39 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 0402
$MODULE TSOP-66
Po 48819 34646 900 15 4C6098A7 4C609B99 ~~
Li TSOP-66
Sc 4C609B99
AR /4C421DD3/4C609B99
2010-08-13 19:24:39 +03:00
Op 0 0 0
At SMD
2010-08-19 13:40:42 +03:00
T0 0 -150 200 200 900 40 N V 25 N"U2"
T1 0 150 200 200 900 40 N I 25 N"MT46V32M16TG"
DC -4094 1881 -4094 1822 39 21
DS 4350 -1968 4350 1968 39 21
DS 4350 1968 -4350 1968 39 21
DS -4350 1968 -4350 -1968 39 21
DS -4350 -1968 4350 -1968 39 21
2010-08-13 19:24:39 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po -4094 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 77 "/FPGA_Spartan6/M0_DQ0"
2010-08-19 13:40:42 +03:00
Po -3838 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-19 13:40:42 +03:00
Po -3582 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 10 "/DDR_Banks/M0_DQ1"
2010-08-19 13:40:42 +03:00
Po -3326 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 137 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 79 "/FPGA_Spartan6/M0_DQ2"
2010-08-19 13:40:42 +03:00
Po -3070 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 137 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po -2814 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 137 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 80 "/FPGA_Spartan6/M0_DQ3"
2010-08-19 13:40:42 +03:00
Po -2558 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 81 "/FPGA_Spartan6/M0_DQ4"
2010-08-19 13:40:42 +03:00
Po -2303 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "9" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
Po -2047 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "10" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 82 "/FPGA_Spartan6/M0_DQ5"
2010-08-19 13:40:42 +03:00
Po -1791 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "11" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 83 "/FPGA_Spartan6/M0_DQ6"
2010-08-19 13:40:42 +03:00
Po -1535 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "12" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po -1279 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "13" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 84 "/FPGA_Spartan6/M0_DQ7"
2010-08-19 13:40:42 +03:00
Po -1023 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "14" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po -767 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "15" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-19 13:40:42 +03:00
Po -511 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "16" R 137 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 17 "/DDR_Banks/M0_LDQS"
2010-08-19 13:40:42 +03:00
Po -255 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "17" R 136 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 0 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "18" R 137 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
Po 255 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "19" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 511 2176
2010-08-13 19:24:39 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "20" R 138 275 0 0 900
2010-08-13 19:24:39 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 16 "/DDR_Banks/M0_LDM"
2010-08-19 13:40:42 +03:00
Po 767 2176
2010-08-13 19:24:39 +03:00
$EndPAD
2010-08-13 23:42:35 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "21" R 138 275 0 0 900
2010-08-13 23:42:35 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 88 "/FPGA_Spartan6/M0_WE#"
2010-08-19 13:40:42 +03:00
Po 1023 2176
2010-08-13 23:42:35 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "22" R 138 275 0 0 900
2010-08-13 23:42:35 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 76 "/FPGA_Spartan6/M0_CAS#"
2010-08-19 13:40:42 +03:00
Po 1279 2176
2010-08-13 23:42:35 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "23" R 138 275 0 0 900
2010-08-13 23:42:35 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 18 "/DDR_Banks/M0_RAS#"
2010-08-19 13:40:42 +03:00
Po 1535 2176
2010-08-13 23:42:35 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "24" R 138 275 0 0 900
2010-08-13 23:42:35 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 1791 2176
2010-08-13 23:42:35 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "25" R 138 275 0 0 900
2010-08-13 23:42:35 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 0 ""
Po 2047 2176
2010-08-13 23:42:35 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "26" R 137 275 0 0 900
2010-08-13 23:42:35 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 74 "/FPGA_Spartan6/M0_BA0"
2010-08-19 13:40:42 +03:00
Po 2302 2176
2010-08-13 23:42:35 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "27" R 137 275 0 0 900
2010-08-13 23:42:35 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 75 "/FPGA_Spartan6/M0_BA1"
2010-08-19 13:40:42 +03:00
Po 2558 2176
2010-08-13 23:42:35 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "28" R 137 275 0 0 900
2010-08-13 23:42:35 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 63 "/FPGA_Spartan6/M0_A10"
2010-08-19 13:40:42 +03:00
Po 2814 2176
2010-08-13 23:42:35 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "29" R 138 275 0 0 900
2010-08-13 23:42:35 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 6 "/DDR_Banks/M0_A0"
2010-08-19 13:40:42 +03:00
Po 3070 2176
2010-08-13 23:42:35 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "30" R 138 275 0 0 900
2010-08-13 23:42:35 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 62 "/FPGA_Spartan6/M0_A1"
2010-08-19 13:40:42 +03:00
Po 3326 2176
2010-08-13 23:42:35 +03:00
$EndPAD
2010-08-14 02:20:50 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "31" R 138 275 0 0 900
2010-08-14 02:20:50 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 66 "/FPGA_Spartan6/M0_A2"
2010-08-19 13:40:42 +03:00
Po 3582 2176
2010-08-14 02:20:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "32" R 138 275 0 0 900
2010-08-14 02:20:50 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 67 "/FPGA_Spartan6/M0_A3"
2010-08-19 13:40:42 +03:00
Po 3838 2176
2010-08-14 02:20:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "33" R 138 275 0 0 900
2010-08-14 02:20:50 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-17 03:06:33 +03:00
Ne 3 "+2.5V"
2010-08-19 13:40:42 +03:00
Po 4094 2176
2010-08-14 02:20:50 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "34" R 138 275 0 0 900
2010-08-14 02:20:50 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po 4094 -2176
2010-08-14 02:20:50 +03:00
$EndPAD
2010-08-14 02:38:38 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "35" R 138 275 0 0 900
2010-08-14 02:38:38 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 68 "/FPGA_Spartan6/M0_A4"
2010-08-19 13:40:42 +03:00
Po 3838 -2176
2010-08-14 02:38:38 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "36" R 138 275 0 0 900
2010-08-14 02:38:38 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 69 "/FPGA_Spartan6/M0_A5"
2010-08-19 13:40:42 +03:00
Po 3582 -2176
2010-08-14 02:38:38 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "37" R 138 275 0 0 900
2010-08-14 02:38:38 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 70 "/FPGA_Spartan6/M0_A6"
2010-08-19 13:40:42 +03:00
Po 3326 -2176
2010-08-14 02:38:38 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "38" R 138 275 0 0 900
2010-08-14 02:38:38 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 71 "/FPGA_Spartan6/M0_A7"
2010-08-19 13:40:42 +03:00
Po 3070 -2176
2010-08-14 02:38:38 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "39" R 137 275 0 0 900
2010-08-14 02:38:38 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 72 "/FPGA_Spartan6/M0_A8"
2010-08-19 13:40:42 +03:00
Po 2814 -2176
2010-08-14 02:38:38 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "40" R 137 275 0 0 900
2010-08-14 02:38:38 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 73 "/FPGA_Spartan6/M0_A9"
2010-08-19 13:40:42 +03:00
Po 2558 -2176
2010-08-14 02:38:38 +03:00
$EndPAD
2010-08-14 15:42:37 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "41" R 138 275 0 0 900
2010-08-14 15:42:37 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 64 "/FPGA_Spartan6/M0_A11"
2010-08-19 13:40:42 +03:00
Po 2303 -2176
2010-08-14 15:42:37 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "42" R 138 275 0 0 900
2010-08-14 15:42:37 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 65 "/FPGA_Spartan6/M0_A12"
2010-08-19 13:40:42 +03:00
Po 2047 -2176
2010-08-14 15:42:37 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "43" R 138 275 0 0 900
2010-08-14 15:42:37 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1791 -2176
2010-08-14 15:42:37 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "44" R 138 275 0 0 900
2010-08-14 15:42:37 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 9 "/DDR_Banks/M0_CLK#"
2010-08-19 13:40:42 +03:00
Po 1535 -2176
2010-08-14 15:42:37 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "45" R 138 275 0 0 900
2010-08-14 15:42:37 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 7 "/DDR_Banks/M0_CKE"
2010-08-19 13:40:42 +03:00
Po 1279 -2176
2010-08-14 15:42:37 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "46" R 138 275 0 0 900
2010-08-14 15:42:37 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 8 "/DDR_Banks/M0_CLK"
2010-08-19 13:40:42 +03:00
Po 1023 -2176
2010-08-14 15:42:37 +03:00
$EndPAD
2010-08-17 00:32:29 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "47" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 87 "/FPGA_Spartan6/M0_UDM"
2010-08-19 13:40:42 +03:00
Po 767 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "48" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 511 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "49" R 137 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 226 "N-000059"
Po 255 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "50" R 136 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 0 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "51" R 137 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 19 "/DDR_Banks/M0_UDQS"
Po -255 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "52" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -511 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "53" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -767 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "54" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 85 "/FPGA_Spartan6/M0_DQ8"
2010-08-19 13:40:42 +03:00
Po -1023 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "55" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po -1279 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "56" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 86 "/FPGA_Spartan6/M0_DQ9"
2010-08-19 13:40:42 +03:00
Po -1535 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "57" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 11 "/DDR_Banks/M0_DQ10"
2010-08-19 13:40:42 +03:00
Po -1791 -2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "58" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -2047 -2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "59" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 12 "/DDR_Banks/M0_DQ11"
2010-08-19 13:40:42 +03:00
Po -2303 -2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "60" R 137 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 13 "/DDR_Banks/M0_DQ12"
2010-08-19 13:40:42 +03:00
Po -2558 -2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "61" R 137 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po -2814 -2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "62" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 14 "/DDR_Banks/M0_DQ13"
2010-08-19 13:40:42 +03:00
Po -3070 -2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "63" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 15 "/DDR_Banks/M0_DQ14"
2010-08-19 13:40:42 +03:00
Po -3326 -2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "64" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -3582 -2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "65" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 78 "/FPGA_Spartan6/M0_DQ15"
2010-08-19 13:40:42 +03:00
Po -3838 -2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "66" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -4094 -2176
2010-08-17 03:36:21 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE TSOP-66
$MODULE TSOP-66
Po 63780 34646 900 15 4C6098A7 4C609C8E ~~
Li TSOP-66
Sc 4C609C8E
AR /4C421DD3/4C609C8E
Op 0 0 0
At SMD
T0 0 -150 200 200 900 40 N V 25 N"U3"
T1 0 150 200 200 900 40 N I 25 N"MT46V32M16TG"
DC -4094 1881 -4094 1822 39 21
DS 4350 -1968 4350 1968 39 21
DS 4350 1968 -4350 1968 39 21
DS -4350 1968 -4350 -1968 39 21
DS -4350 -1968 4350 -1968 39 21
2010-08-17 03:36:21 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po -4094 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 101 "/FPGA_Spartan6/M1_DQ0"
2010-08-19 13:40:42 +03:00
Po -3838 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po -3582 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 28 "/DDR_Banks/M1_DQ1"
2010-08-19 13:40:42 +03:00
Po -3326 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 137 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 104 "/FPGA_Spartan6/M1_DQ2"
2010-08-19 13:40:42 +03:00
Po -3070 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 137 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -2814 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 137 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 33 "/DDR_Banks/M1_DQ3"
2010-08-19 13:40:42 +03:00
Po -2558 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 105 "/FPGA_Spartan6/M1_DQ4"
2010-08-19 13:40:42 +03:00
Po -2303 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "9" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po -2047 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "10" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 106 "/FPGA_Spartan6/M1_DQ5"
2010-08-19 13:40:42 +03:00
Po -1791 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "11" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 107 "/FPGA_Spartan6/M1_DQ6"
2010-08-19 13:40:42 +03:00
Po -1535 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "12" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -1279 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "13" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 108 "/FPGA_Spartan6/M1_DQ7"
2010-08-19 13:40:42 +03:00
Po -1023 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "14" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -767 2176
2010-08-17 03:36:21 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "15" R 138 275 0 0 900
2010-08-17 03:36:21 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po -511 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "16" R 137 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 34 "/DDR_Banks/M1_LDQS"
2010-08-19 13:40:42 +03:00
Po -255 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "17" R 136 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 0 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "18" R 137 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po 255 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "19" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 511 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "20" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 111 "/FPGA_Spartan6/M1_LDM"
2010-08-19 13:40:42 +03:00
Po 767 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "21" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 35 "/DDR_Banks/M1_WE#"
2010-08-19 13:40:42 +03:00
Po 1023 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "22" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 98 "/FPGA_Spartan6/M1_CAS#"
2010-08-19 13:40:42 +03:00
Po 1279 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "23" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 112 "/FPGA_Spartan6/M1_RAS#"
2010-08-19 13:40:42 +03:00
Po 1535 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "24" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 27 "/DDR_Banks/M1_CS#"
2010-08-19 13:40:42 +03:00
Po 1791 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "25" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-17 04:56:08 +03:00
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po 2047 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "26" R 137 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 24 "/DDR_Banks/M1_BA0"
2010-08-19 13:40:42 +03:00
Po 2302 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "27" R 137 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 25 "/DDR_Banks/M1_BA1"
2010-08-19 13:40:42 +03:00
Po 2558 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "28" R 137 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 20 "/DDR_Banks/M1_A10"
Po 2814 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "29" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 89 "/FPGA_Spartan6/M1_A0"
2010-08-19 13:40:42 +03:00
Po 3070 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "30" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 90 "/FPGA_Spartan6/M1_A1"
2010-08-19 13:40:42 +03:00
Po 3326 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "31" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 92 "/FPGA_Spartan6/M1_A2"
2010-08-19 13:40:42 +03:00
Po 3582 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "32" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 93 "/FPGA_Spartan6/M1_A3"
2010-08-19 13:40:42 +03:00
Po 3838 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "33" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po 4094 2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "34" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po 4094 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "35" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 94 "/FPGA_Spartan6/M1_A4"
2010-08-19 13:40:42 +03:00
Po 3838 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "36" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 95 "/FPGA_Spartan6/M1_A5"
2010-08-19 13:40:42 +03:00
Po 3582 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "37" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 22 "/DDR_Banks/M1_A6"
2010-08-19 13:40:42 +03:00
Po 3326 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "38" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 96 "/FPGA_Spartan6/M1_A7"
2010-08-19 13:40:42 +03:00
Po 3070 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "39" R 137 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 23 "/DDR_Banks/M1_A8"
2010-08-19 13:40:42 +03:00
Po 2814 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "40" R 137 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 97 "/FPGA_Spartan6/M1_A9"
2010-08-19 13:40:42 +03:00
Po 2558 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "41" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 91 "/FPGA_Spartan6/M1_A11"
2010-08-19 13:40:42 +03:00
Po 2303 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "42" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 21 "/DDR_Banks/M1_A12"
2010-08-19 13:40:42 +03:00
Po 2047 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "43" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1791 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "44" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 26 "/DDR_Banks/M1_CLK#"
2010-08-19 13:40:42 +03:00
Po 1535 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "45" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 99 "/FPGA_Spartan6/M1_CKE"
2010-08-19 13:40:42 +03:00
Po 1279 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "46" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 100 "/FPGA_Spartan6/M1_CLK"
2010-08-19 13:40:42 +03:00
Po 1023 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "47" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 113 "/FPGA_Spartan6/M1_UDM"
2010-08-19 13:40:42 +03:00
Po 767 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "48" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po 511 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "49" R 137 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 225 "N-000058"
Po 255 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "50" R 136 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 0 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "51" R 137 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 114 "/FPGA_Spartan6/M1_UDQS"
Po -255 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "52" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -511 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "53" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -767 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "54" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 109 "/FPGA_Spartan6/M1_DQ8"
2010-08-19 13:40:42 +03:00
Po -1023 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "55" R 138 275 0 0 900
2010-08-17 00:32:29 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po -1279 -2176
2010-08-17 00:32:29 +03:00
$EndPAD
2010-08-17 04:56:08 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "56" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 110 "/FPGA_Spartan6/M1_DQ9"
2010-08-19 13:40:42 +03:00
Po -1535 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "57" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 29 "/DDR_Banks/M1_DQ10"
2010-08-19 13:40:42 +03:00
Po -1791 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "58" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -2047 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "59" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 30 "/DDR_Banks/M1_DQ11"
2010-08-19 13:40:42 +03:00
Po -2303 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "60" R 137 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 31 "/DDR_Banks/M1_DQ12"
2010-08-19 13:40:42 +03:00
Po -2558 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "61" R 137 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 3 "+2.5V"
Po -2814 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "62" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 32 "/DDR_Banks/M1_DQ13"
2010-08-19 13:40:42 +03:00
Po -3070 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "63" R 138 275 0 0 900
2010-08-17 04:56:08 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 102 "/FPGA_Spartan6/M1_DQ14"
2010-08-19 13:40:42 +03:00
Po -3326 -2176
2010-08-17 04:56:08 +03:00
$EndPAD
2010-08-17 05:49:00 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "64" R 138 275 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po -3582 -2176
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "65" R 138 275 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 103 "/FPGA_Spartan6/M1_DQ15"
2010-08-19 13:40:42 +03:00
Po -3838 -2176
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "66" R 138 275 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-18 03:04:05 +03:00
Ne 224 "GND"
2010-08-19 13:40:42 +03:00
Po -4094 -2176
2010-08-17 05:49:00 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE TSOP-66
$MODULE TSSOP-14
Po 57430 25930 2700 0 4C5F22BD 4C5F2025 ~~
Li TSSOP-14
Sc 4C5F2025
AR /4C5F1EDC/4C5F2025
Op 0 0 0
T0 50 1822 276 276 2700 69 M V 20 N"U6"
T1 70 -1848 276 276 2700 69 M V 20 N"MIC2550AYTS"
DC -738 -409 -666 -418 150 20
DS 987 -634 -984 -628 150 20
DS -984 -628 -984 -187 150 20
DS -984 -187 -726 -187 150 20
DS -726 -187 -726 185 150 20
DS -726 185 -987 188 150 20
DS -987 188 -984 649 150 20
DS -984 649 982 650 150 20
DS 982 650 986 -634 150 20
DS -984 787 984 787 1 20
DS 984 787 984 -787 1 20
DS -984 -787 984 -787 1 20
DS -984 787 -984 -787 1 20
2010-08-17 05:49:00 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 137 570 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 3 "+2.5V"
Po -767 -1112
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 137 570 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 207 "/FPGA_Spartan6/USBA_SPD"
2010-08-19 13:40:42 +03:00
Po -511 -1112
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 137 570 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 221 "/USB/USBA_RCV"
2010-08-19 13:40:42 +03:00
Po -255 -1112
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 137 570 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 223 "/USB/USBA_VP"
Po 0 -1112
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 137 570 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 222 "/USB/USBA_VM"
2010-08-19 13:40:42 +03:00
Po 255 -1112
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 137 570 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-17 05:49:00 +03:00
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po 511 -1112
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 137 570 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 767 -1112
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 137 570 0 0 2700
2010-08-17 05:49:00 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
Ne 224 "GND"
Po 767 1112
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "9" R 137 570 0 0 2700
2010-08-17 05:49:00 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 206 "/FPGA_Spartan6/USBA_OE_N"
2010-08-19 13:40:42 +03:00
Po 511 1112
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "10" R 137 570 0 0 2700
2010-08-17 05:49:00 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 238 "N-000426"
2010-08-19 13:40:42 +03:00
Po 255 1112
$EndPAD
$PAD
Sh "11" R 137 570 0 0 2700
Dr 0 0 0
At SMD N 00440001
2010-08-19 16:51:56 +03:00
Ne 241 "N-000430"
2010-08-19 13:40:42 +03:00
Po 0 1112
$EndPAD
$PAD
Sh "12" R 137 570 0 0 2700
Dr 0 0 0
At SMD N 00440001
Ne 4 "+3.3V"
Po -255 1112
$EndPAD
$PAD
Sh "13" R 137 570 0 0 2700
Dr 0 0 0
At SMD N 00440001
2010-08-17 05:49:00 +03:00
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -511 1112
$EndPAD
$PAD
Sh "14" R 137 570 0 0 2700
Dr 0 0 0
At SMD N 00440001
Ne 4 "+3.3V"
Po -767 1112
$EndPAD
$EndMODULE TSSOP-14
$MODULE SD-48025
Po 50197 17913 1800 15 00000000 4C5D6F5A ~~
Li SD-48025
Sc 4C5D6F5A
AR /4C4320F3/4C5D6F5A
Op 0 0 0
T0 527 -694 157 157 1800 20 N V 21 N"J4"
T1 0 118 118 118 0 20 N I 21 N"RJ45-48025"
DS -3700 -5800 -3700 4300 60 21
DS -3700 -5800 3700 -5800 60 21
DS 3700 -5800 3700 4300 60 21
DS -3700 4300 3700 4300 60 21
$PAD
Sh "13" C 1646 1646 0 0 1800
Dr 1252 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 232 "N-000404"
2010-08-19 13:40:42 +03:00
Po 2250 0
$EndPAD
$PAD
Sh "13" C 984 984 0 0 1800
Dr 640 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 232 "N-000404"
2010-08-19 13:40:42 +03:00
Po 3100 -1200
$EndPAD
$PAD
Sh "14" C 1646 1646 0 0 1800
Dr 1252 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 232 "N-000404"
2010-08-19 13:40:42 +03:00
Po -2250 0
$EndPAD
$PAD
Sh "14" C 984 984 0 0 1800
Dr 640 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 232 "N-000404"
2010-08-19 13:40:42 +03:00
Po -3100 -1200
$EndPAD
$PAD
Sh "1" R 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 234 "N-000406"
2010-08-19 13:40:42 +03:00
Po -1750 -2500
$EndPAD
$PAD
Sh "3" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
Ne 4 "+3.3V"
Po -750 -2500
$EndPAD
$PAD
Sh "5" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
Ne 224 "GND"
Po 250 -2500
$EndPAD
$PAD
Sh "7" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 233 "N-000405"
2010-08-19 13:40:42 +03:00
Po 1250 -2500
$EndPAD
$PAD
Sh "2" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 227 "N-000395"
2010-08-19 13:40:42 +03:00
Po -1250 -3500
$EndPAD
$PAD
Sh "4" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
Ne 224 "GND"
Po -250 -3500
$EndPAD
$PAD
Sh "6" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
Ne 4 "+3.3V"
Po 750 -3500
$EndPAD
$PAD
Sh "8" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 231 "N-000403"
2010-08-19 13:40:42 +03:00
Po 1750 -3500
$EndPAD
$PAD
Sh "9" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
Ne 4 "+3.3V"
Po -2150 -5400
$EndPAD
$PAD
Sh "10" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 230 "N-000402"
2010-08-19 13:40:42 +03:00
Po -1150 -5400
$EndPAD
$PAD
Sh "11" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
Ne 4 "+3.3V"
Po 1150 -5400
$EndPAD
$PAD
Sh "12" C 540 540 0 0 1800
Dr 350 0 0
At STD N 0CC0FFFF
2010-08-19 16:51:56 +03:00
Ne 229 "N-000397"
2010-08-19 13:40:42 +03:00
Po 2150 -5400
2010-08-17 05:49:00 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE SD-48025
$MODULE MICROSD-500901
Po 60827 17913 0 0 4C5F34DA 4B76F5E2 ~~
Li MICROSD-500901
Sc 4B76F5E2
AR /4C4227FE/4B76F5E2
Op 0 0 0
T0 -160 652 157 157 0 20 M V 20 N"J1"
T1 0 -118 118 118 1800 20 M I 20 N"MICROSD"
DS -2709 -1675 -2709 507 60 20
DS -2707 -3095 -2707 -2747 60 20
DS 2709 -1699 2709 500 60 20
DS 2706 -3088 2706 -2767 60 20
DS -1989 1553 -1989 1013 60 20
DS -1989 1013 1573 1016 60 20
DS 1573 1016 1573 1548 60 20
DS -2707 1555 2707 1555 60 20
DS -2707 -3091 2707 -3091 60 20
$PAD
Sh "1" R 315 590 0 0 0
Dr 0 0 0
At STD N 00440001
Ne 220 "/Non_volatile_memories/SD_DAT2"
Po -1299 0
$EndPAD
$PAD
Sh "2" R 315 590 0 0 0
Dr 0 0 0
At STD N 00440001
2010-08-19 16:51:56 +03:00
Ne 205 "/FPGA_Spartan6/SD_DAT3"
2010-08-19 13:40:42 +03:00
Po -866 0
$EndPAD
$PAD
Sh "3" R 315 590 0 0 0
Dr 0 0 0
At STD N 00440001
2010-08-19 16:51:56 +03:00
Ne 217 "/Non_volatile_memories/SD_CMD"
2010-08-19 13:40:42 +03:00
Po -433 0
$EndPAD
$PAD
Sh "4" R 315 590 0 0 0
Dr 0 0 0
At STD N 00440001
Ne 4 "+3.3V"
Po 0 0
$EndPAD
$PAD
Sh "5" R 315 590 0 0 0
Dr 0 0 0
At STD N 00440001
2010-08-19 16:51:56 +03:00
Ne 216 "/Non_volatile_memories/SD_CLK"
2010-08-19 13:40:42 +03:00
Po 433 0
$EndPAD
$PAD
Sh "6" R 315 590 0 0 0
Dr 0 0 0
At STD N 00440001
Ne 224 "GND"
Po 866 0
$EndPAD
$PAD
Sh "7" R 315 590 0 0 0
Dr 0 0 0
At STD N 00440001
2010-08-19 16:51:56 +03:00
Ne 218 "/Non_volatile_memories/SD_DAT0"
2010-08-19 13:40:42 +03:00
Po 1299 0
$EndPAD
$PAD
Sh "8" R 315 590 0 0 0
Dr 0 0 0
At STD N 00440001
2010-08-19 16:51:56 +03:00
Ne 219 "/Non_volatile_memories/SD_DAT1"
2010-08-19 13:40:42 +03:00
Po 1732 0
$EndPAD
$PAD
Sh "CASE" R 571 787 0 0 0
Dr 0 0 0
At STD N 00440001
Ne 224 "GND"
Po 2707 1024
$EndPAD
$PAD
Sh "CASE" R 571 787 0 0 0
Dr 0 0 0
At STD N 00440001
Ne 224 "GND"
Po -2707 1024
$EndPAD
$PAD
Sh "CASE" R 571 787 0 0 0
Dr 0 0 0
At STD N 00440001
Ne 224 "GND"
Po -2707 -2244
$EndPAD
$PAD
Sh "CASE" R 571 787 0 0 0
Dr 0 0 0
At STD N 00440001
Ne 224 "GND"
Po 2707 -2244
$EndPAD
$EndMODULE MICROSD-500901
$MODULE NAND-48TSOP
Po 57547 26398 900 15 4B8F4C98 4B76F108 ~~
Li NAND-48TSOP
Sc 4B76F108
AR /4C4227FE/4B76F108
Op 0 0 0
T0 -1816 4454 157 157 -900 20 N V 21 N"U5"
T1 0 118 118 118 -900 20 N I 21 N"NAND"
DS -2470 3900 -2470 -3900 60 24
DS -2470 -3900 2430 -3900 60 24
DS 2430 -3900 2430 3900 60 24
DS 2430 3900 -2470 3900 60 24
DS -2270 4320 -2470 4520 60 26
DS -2470 4520 -2070 4520 60 26
DS -2070 4520 -2270 4320 60 26
DS -2360 3500 2360 3500 60 26
DS 2360 3500 2360 -3500 60 26
DS 2360 -3500 -2360 -3500 60 26
DS -2360 -3500 -2360 3500 60 26
DS -2270 4320 -2470 4520 60 21
DS -2470 4520 -2070 4520 60 21
DS -2070 4520 -2270 4320 60 21
DS -2420 3400 2380 3400 60 21
DS 2380 3400 2380 -3450 60 21
DS 2380 -3450 -2420 -3450 60 21
DS -2420 -3450 -2420 3400 60 21
DS -2400 3500 -2290 3500 30 26
DS -2290 3500 -2290 3900 30 26
DS -2290 3900 -2240 3900 30 26
DS -2240 3900 -2240 3500 30 26
DS -2240 3500 -2090 3500 30 26
DS -2090 3500 -2090 3900 30 26
DS -2090 3900 -2040 3900 30 26
DS -2040 3900 -2040 3500 30 26
DS -2040 3500 -1900 3500 30 26
DS -1900 3500 -1900 3900 30 26
DS -1900 3900 -1850 3900 30 26
DS -1850 3900 -1850 3500 30 26
DS -1850 3500 -1700 3500 30 26
DS -1700 3500 -1700 3900 30 26
DS -1700 3900 -1650 3900 30 26
DS -1650 3900 -1650 3500 30 26
DS -1650 3500 -1500 3500 30 26
DS -1500 3500 -1500 3900 30 26
DS -1500 3900 -1450 3900 30 26
DS -1450 3900 -1450 3500 30 26
DS -1450 3500 -1300 3500 30 26
DS -1300 3500 -1300 3900 30 26
DS -1300 3900 -1250 3900 30 26
DS -1250 3900 -1250 3500 30 26
DS -1250 3500 -1110 3500 30 26
DS -1110 3500 -1110 3900 30 26
DS -1110 3900 -1060 3900 30 26
DS -1060 3900 -1060 3500 30 26
DS -1060 3500 -910 3500 30 26
DS -910 3500 -910 3900 30 26
DS -910 3900 -860 3900 30 26
DS -860 3900 -860 3500 30 26
DS -860 3500 -710 3500 30 26
DS -710 3500 -710 3900 30 26
DS -710 3900 -660 3900 30 26
DS -660 3900 -660 3500 30 26
DS -660 3500 -510 3500 30 26
DS -510 3500 -510 3900 30 26
DS -510 3900 -460 3900 30 26
DS -460 3900 -460 3500 30 26
DS -460 3500 -320 3500 30 26
DS -320 3500 -320 3900 30 26
DS -320 3900 -270 3900 30 26
DS -270 3900 -270 3500 30 26
DS -270 3500 -120 3500 30 26
DS -120 3500 -120 3900 30 26
DS -120 3900 -70 3900 30 26
DS -70 3900 -70 3500 30 26
DS -70 3500 80 3500 30 26
DS 80 3500 80 3900 30 26
DS 80 3900 130 3900 30 26
DS 130 3900 130 3500 30 26
DS 130 3500 280 3500 30 26
DS 280 3500 280 3900 30 26
DS 280 3900 330 3900 30 26
DS 330 3900 330 3500 30 26
DS 330 3500 470 3500 30 26
DS 470 3500 470 3900 30 26
DS 470 3900 520 3900 30 26
DS 520 3900 520 3500 30 26
DS 520 3500 670 3500 30 26
DS 670 3500 670 3900 30 26
DS 670 3900 720 3900 30 26
DS 720 3900 720 3500 30 26
DS 720 3500 860 3500 30 26
DS 860 3500 860 3900 30 26
DS 860 3900 910 3900 30 26
DS 910 3900 910 3500 30 26
DS 910 3500 1060 3500 30 26
DS 1060 3500 1060 3900 30 26
DS 1060 3900 1110 3900 30 26
DS 1110 3900 1110 3500 30 26
DS 1110 3500 1250 3500 30 26
DS 1250 3500 1250 3900 30 26
DS 1250 3900 1300 3900 30 26
DS 1300 3900 1300 3500 30 26
DS 1300 3500 1450 3500 30 26
DS 1450 3500 1450 3900 30 26
DS 1450 3900 1500 3900 30 26
DS 1500 3900 1500 3500 30 26
DS 1500 3500 1650 3500 30 26
DS 1650 3500 1650 3900 30 26
DS 1650 3900 1700 3900 30 26
DS 1700 3900 1700 3510 30 26
DS 1700 3510 1710 3500 30 26
DS 1710 3500 1850 3500 30 26
DS 1850 3500 1850 3900 30 26
DS 1850 3900 1900 3900 30 26
DS 1900 3900 1900 3500 30 26
DS 1900 3500 2040 3500 30 26
DS 2040 3500 2040 3900 30 26
DS 2040 3900 2090 3900 30 26
DS 2090 3900 2090 3500 30 26
DS 2090 3500 2240 3500 30 26
DS 2240 3500 2240 3900 30 26
DS 2240 3900 2290 3900 30 26
DS 2290 3900 2290 3500 30 26
DS 2290 3500 2360 3500 30 26
DS 2360 3500 2360 -3500 30 26
DS 2360 -3500 2290 -3500 30 26
DS 2290 -3500 2290 -3900 30 26
DS 2290 -3900 2240 -3900 30 26
DS 2240 -3900 2240 -3500 30 26
DS 2240 -3500 2090 -3500 30 26
DS 2090 -3500 2090 -3900 30 26
DS 2090 -3900 2040 -3900 30 26
DS 2040 -3900 2040 -3500 30 26
DS 2040 -3500 1900 -3500 30 26
DS 1900 -3500 1900 -3900 30 26
DS 1900 -3900 1850 -3900 30 26
DS 1850 -3900 1850 -3500 30 26
DS 1850 -3500 1700 -3500 30 26
DS 1700 -3500 1700 -3900 30 26
DS 1700 -3900 1650 -3900 30 26
DS 1650 -3900 1650 -3500 30 26
DS 1650 -3500 1500 -3500 30 26
DS 1500 -3500 1500 -3900 30 26
DS 1500 -3900 1450 -3900 30 26
DS 1450 -3900 1450 -3500 30 26
DS 1450 -3500 1300 -3500 30 26
DS 1300 -3500 1300 -3900 30 26
DS 1300 -3900 1250 -3900 30 26
DS 1250 -3900 1250 -3500 30 26
DS 1250 -3500 1110 -3500 30 26
DS 1110 -3500 1110 -3900 30 26
DS 1110 -3900 1060 -3900 30 26
DS 1060 -3900 1060 -3500 30 26
DS 1060 -3500 910 -3500 30 26
DS 910 -3500 910 -3900 30 26
DS 910 -3900 860 -3900 30 26
DS 860 -3900 860 -3500 30 26
DS 860 -3500 720 -3500 30 26
DS 720 -3500 720 -3900 30 26
DS 720 -3900 670 -3900 30 26
DS 670 -3900 670 -3500 30 26
DS 670 -3500 520 -3500 30 26
DS 520 -3500 520 -3900 30 26
DS 520 -3900 470 -3900 30 26
DS 470 -3900 470 -3500 30 26
DS 470 -3500 330 -3500 30 26
DS 330 -3500 330 -3900 30 26
DS 330 -3900 280 -3900 30 26
DS 280 -3900 280 -3500 30 26
DS 280 -3500 130 -3500 30 26
DS 130 -3500 130 -3900 30 26
DS 130 -3900 80 -3900 30 26
DS 80 -3900 80 -3500 30 26
DS 80 -3500 -70 -3500 30 26
DS -70 -3500 -70 -3900 30 26
DS -70 -3900 -120 -3900 30 26
DS -120 -3900 -120 -3500 30 26
DS -120 -3500 -270 -3500 30 26
DS -270 -3500 -270 -3900 30 26
DS -270 -3900 -320 -3900 30 26
DS -320 -3900 -320 -3500 30 26
DS -320 -3500 -460 -3500 30 26
DS -460 -3500 -460 -3900 30 26
DS -460 -3900 -510 -3900 30 26
DS -510 -3900 -510 -3500 30 26
DS -510 -3500 -660 -3500 30 26
DS -660 -3500 -660 -3900 30 26
DS -660 -3900 -710 -3900 30 26
DS -710 -3900 -710 -3500 30 26
DS -710 -3500 -860 -3500 30 26
DS -860 -3500 -860 -3900 30 26
DS -860 -3900 -910 -3900 30 26
DS -910 -3900 -910 -3500 30 26
DS -910 -3500 -1060 -3500 30 26
DS -1060 -3500 -1060 -3900 30 26
DS -1060 -3900 -1110 -3900 30 26
DS -1110 -3900 -1110 -3500 30 26
DS -1110 -3500 -1250 -3500 30 26
DS -1250 -3500 -1250 -3900 30 26
DS -1250 -3900 -1300 -3900 30 26
DS -1300 -3900 -1300 -3500 30 26
DS -1300 -3500 -1450 -3500 30 26
DS -1450 -3500 -1450 -3900 30 26
DS -1450 -3900 -1500 -3900 30 26
DS -1500 -3900 -1500 -3500 30 26
DS -1500 -3500 -1650 -3500 30 26
DS -1650 -3500 -1650 -3900 30 26
DS -1650 -3900 -1700 -3900 30 26
DS -1700 -3900 -1700 -3500 30 26
DS -1700 -3500 -1850 -3500 30 26
DS -1850 -3500 -1850 -3900 30 26
DS -1850 -3900 -1900 -3900 30 26
DS -1900 -3900 -1900 -3500 30 26
DS -1900 -3500 -2040 -3500 30 26
DS -2040 -3500 -2040 -3900 30 26
DS -2040 -3900 -2090 -3900 30 26
DS -2090 -3900 -2090 -3500 30 26
DS -2090 -3500 -2240 -3500 30 26
DS -2240 -3500 -2240 -3900 30 26
DS -2240 -3900 -2290 -3900 30 26
DS -2290 -3900 -2290 -3500 30 26
2010-08-17 05:49:00 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -2270 3850
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -2070 3850
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -1870 3850
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -1680 3850
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -1480 3850
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 214 "/Non_volatile_memories/NF_RNB"
2010-08-19 13:40:42 +03:00
Po -1280 3850
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 214 "/Non_volatile_memories/NF_RNB"
2010-08-19 13:40:42 +03:00
Po -1090 3850
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 213 "/Non_volatile_memories/NF_RE_N"
2010-08-19 13:40:42 +03:00
Po -890 3850
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "9" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 116 "/FPGA_Spartan6/NF_CS1_N"
2010-08-19 13:40:42 +03:00
Po -690 3850
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "10" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -500 3850
2010-08-17 05:49:00 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "11" R 100 600 0 0 900
2010-08-17 05:49:00 +03:00
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
2010-08-19 13:40:42 +03:00
Po -300 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "12" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 4 "+3.3V"
Po -100 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "13" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po 100 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "14" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 290 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "15" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 490 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "16" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 115 "/FPGA_Spartan6/NF_CLE"
2010-08-19 13:40:42 +03:00
Po 690 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "17" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 208 "/Non_volatile_memories/NF_ALE"
2010-08-19 13:40:42 +03:00
Po 880 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "18" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 215 "/Non_volatile_memories/NF_WE_N"
2010-08-19 13:40:42 +03:00
Po 1080 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "19" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 4 "+3.3V"
Po 1280 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "20" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1470 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "21" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1670 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "22" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1870 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "23" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 2060 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "24" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 2260 3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "25" R 100 600 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 2260 -3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "26" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 2060 -3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "27" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1870 -3850
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "28" R 100 600 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1670 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "29" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 117 "/FPGA_Spartan6/NF_D0"
Po 1470 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "30" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 118 "/FPGA_Spartan6/NF_D1"
Po 1280 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "31" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 209 "/Non_volatile_memories/NF_D2"
2010-08-19 13:40:42 +03:00
Po 1080 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "32" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 210 "/Non_volatile_memories/NF_D3"
2010-08-19 13:40:42 +03:00
Po 880 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "33" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 690 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "34" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 490 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "35" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 290 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "36" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po 100 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "37" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 4 "+3.3V"
Po -100 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "38" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -300 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "39" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -500 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "40" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -690 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "41" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 211 "/Non_volatile_memories/NF_D4"
2010-08-19 13:40:42 +03:00
Po -890 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "42" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 119 "/FPGA_Spartan6/NF_D5"
2010-08-19 13:40:42 +03:00
Po -1090 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "43" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 212 "/Non_volatile_memories/NF_D6"
2010-08-19 13:40:42 +03:00
Po -1280 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "44" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 120 "/FPGA_Spartan6/NF_D7"
2010-08-19 13:40:42 +03:00
Po -1480 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "45" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -1680 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "46" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -1870 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "47" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -2070 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "48" R 100 600 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -2270 -3850
2010-08-17 07:30:34 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE NAND-48TSOP
$MODULE LQFP48
Po 48675 26272 900 15 4C433D64 4C432132 ~~
Li LQFP48
Sc 4C432132
AR /4C4320F3/4C432132
Op 0 0 0
At SMD
T0 0 -150 200 200 900 40 N V 25 N"U4"
T1 0 150 200 200 900 40 N I 25 N"K8001"
DC -1574 -1574 -1574 -1653 39 21
DS -1377 -1377 -1377 1377 39 21
DS -1377 1377 1377 1377 39 21
DS 1377 1377 1377 -1377 39 21
DS 1377 -1377 -1377 -1377 39 21
2010-08-17 07:30:34 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "12" R 315 98 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -1613 1082
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "11" R 315 99 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 49 "/Ethernet_Phy/ETH_RXER"
2010-08-19 13:40:42 +03:00
Po -1613 885
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "10" R 315 99 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 57 "/FPGA_Spartan6/ETH_RXC"
2010-08-19 13:40:42 +03:00
Po -1613 688
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "9" R 315 99 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 48 "/Ethernet_Phy/ETH_RXDV"
2010-08-19 13:40:42 +03:00
Po -1613 491
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "8" R 315 98 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -1613 295
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "7" R 315 98 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 4 "+3.3V"
Po -1613 98
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "6" R 315 98 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 44 "/Ethernet_Phy/ETH_RXD0"
2010-08-19 13:40:42 +03:00
Po -1613 -98
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "5" R 315 98 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 45 "/Ethernet_Phy/ETH_RXD1"
2010-08-19 13:40:42 +03:00
Po -1613 -295
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "4" R 315 99 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 46 "/Ethernet_Phy/ETH_RXD2"
2010-08-19 13:40:42 +03:00
Po -1613 -491
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "3" R 315 99 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 47 "/Ethernet_Phy/ETH_RXD3"
2010-08-19 13:40:42 +03:00
Po -1613 -688
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 315 99 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 42 "/Ethernet_Phy/ETH_MDC"
2010-08-19 13:40:42 +03:00
Po -1613 -885
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 315 98 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 55 "/FPGA_Spartan6/ETH_MDIO"
2010-08-19 13:40:42 +03:00
Po -1613 -1082
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "48" R 98 315 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 56 "/FPGA_Spartan6/ETH_RESET_N"
2010-08-19 13:40:42 +03:00
Po -1082 -1613
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "47" R 99 315 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 43 "/Ethernet_Phy/ETH_PLL1.8V"
2010-08-19 13:40:42 +03:00
Po -885 -1613
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "46" R 99 315 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 38 "/Ethernet_Phy/ETH_CLK"
2010-08-19 13:40:42 +03:00
Po -688 -1613
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "45" R 99 315 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -491 -1613
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "44" R 98 315 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po -295 -1613
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "43" R 98 315 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po -98 -1613
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "42" R 98 315 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 98 -1613
2010-08-17 07:30:34 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "41" R 98 315 0 0 900
2010-08-17 07:30:34 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 234 "N-000406"
2010-08-19 13:40:42 +03:00
Po 295 -1613
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "40" R 99 315 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 227 "N-000395"
2010-08-19 13:40:42 +03:00
Po 491 -1613
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "39" R 99 315 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po 688 -1613
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "38" R 99 315 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 37 "/Ethernet_Phy/ETH_A3.3V"
2010-08-19 13:40:42 +03:00
Po 885 -1613
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "37" R 98 315 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 228 "N-000396"
2010-08-19 13:40:42 +03:00
Po 1082 -1613
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "25" R 315 98 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 54 "/FPGA_Spartan6/ETH_INT"
2010-08-19 13:40:42 +03:00
Po 1613 1082
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "26" R 315 99 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 40 "/Ethernet_Phy/ETH_LED0"
2010-08-19 13:40:42 +03:00
Po 1613 885
2010-08-17 06:48:30 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "27" R 315 99 0 0 900
2010-08-17 06:48:30 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 41 "/Ethernet_Phy/ETH_LED1"
2010-08-19 13:40:42 +03:00
Po 1613 688
2010-08-17 06:48:30 +03:00
$EndPAD
2010-08-18 03:04:05 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "28" R 315 99 0 0 900
2010-08-18 03:04:05 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1613 491
2010-08-18 03:04:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "29" R 315 98 0 0 900
2010-08-18 03:04:05 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1613 295
2010-08-18 03:04:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "30" R 315 98 0 0 900
2010-08-18 03:04:05 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1613 98
2010-08-18 03:04:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "31" R 315 98 0 0 900
2010-08-18 03:04:05 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 36 "/Ethernet_Phy/ETH_A1.8V"
2010-08-19 13:40:42 +03:00
Po 1613 -98
2010-08-18 03:04:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "32" R 315 98 0 0 900
2010-08-18 03:04:05 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 231 "N-000403"
2010-08-19 13:40:42 +03:00
Po 1613 -295
2010-08-18 03:04:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "33" R 315 99 0 0 900
2010-08-18 03:04:05 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 233 "N-000405"
2010-08-19 13:40:42 +03:00
Po 1613 -491
2010-08-18 03:04:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "34" R 315 99 0 0 900
2010-08-18 03:04:05 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 0 ""
Po 1613 -688
2010-08-18 03:04:05 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "35" R 315 99 0 0 900
2010-08-18 03:04:05 +03:00
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po 1613 -885
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "36" R 315 98 0 0 900
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 224 "GND"
Po 1613 -1082
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "13" R 98 315 0 0 900
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
Ne 2 "+1.8V"
Po -1082 1613
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "14" R 99 315 0 0 900
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 52 "/Ethernet_Phy/ETH_TXER"
2010-08-19 13:40:42 +03:00
Po -885 1613
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "15" R 99 315 0 0 900
Dr 0 0 0
2010-08-19 13:40:42 +03:00
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 58 "/FPGA_Spartan6/ETH_TXC"
2010-08-19 13:40:42 +03:00
Po -688 1613
2010-08-18 03:04:05 +03:00
$EndPAD
2010-08-19 06:09:52 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "16" R 99 315 0 0 900
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 51 "/Ethernet_Phy/ETH_TXEN"
2010-08-19 13:40:42 +03:00
Po -491 1613
2010-08-19 06:09:52 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "17" R 98 315 0 0 900
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 59 "/FPGA_Spartan6/ETH_TXD0"
2010-08-19 13:40:42 +03:00
Po -295 1613
2010-08-19 06:09:52 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "18" R 98 315 0 0 900
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 50 "/Ethernet_Phy/ETH_TXD1"
2010-08-19 13:40:42 +03:00
Po -98 1613
2010-08-19 06:09:52 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "19" R 98 315 0 0 900
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 60 "/FPGA_Spartan6/ETH_TXD2"
2010-08-19 13:40:42 +03:00
Po 98 1613
2010-08-19 06:09:52 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "20" R 98 315 0 0 900
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 61 "/FPGA_Spartan6/ETH_TXD3"
2010-08-19 13:40:42 +03:00
Po 295 1613
2010-08-19 06:09:52 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "21" R 99 315 0 0 900
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 53 "/FPGA_Spartan6/ETH_COL"
2010-08-19 13:40:42 +03:00
Po 491 1613
2010-08-19 06:09:52 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "22" R 99 315 0 0 900
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 16:51:56 +03:00
Ne 39 "/Ethernet_Phy/ETH_CRS"
2010-08-19 13:40:42 +03:00
Po 688 1613
2010-08-19 06:09:52 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "23" R 99 315 0 0 900
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 885 1613
2010-08-19 06:09:52 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "24" R 98 315 0 0 900
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 4 "+3.3V"
Po 1082 1613
2010-08-19 06:09:52 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE LQFP48
$MODULE 1206
Po 63750 39693 1800 15 4C5FF890 4C61D1D4 ~~
Li 1206
Sc 4C61D1D4
AR /4C421DD3/4C61D1D4
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"C34"
T1 0 150 200 200 1800 40 N I 25 N"10uF"
DS -798 384 -798 -384 50 21
DS -798 -384 798 -384 50 21
DS 798 -384 798 384 50 21
DS 798 384 -798 384 50 21
2010-08-19 06:09:52 +03:00
$PAD
2010-08-19 13:40:42 +03:00
Sh "1" R 355 668 0 0 1800
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 3 "+2.5V"
Po -570 0
2010-08-19 06:09:52 +03:00
$EndPAD
$PAD
2010-08-19 13:40:42 +03:00
Sh "2" R 355 668 0 0 1800
2010-08-19 06:09:52 +03:00
Dr 0 0 0
At SMD N 00888000
2010-08-19 13:40:42 +03:00
Ne 224 "GND"
Po 570 0
2010-08-19 06:09:52 +03:00
$EndPAD
2010-08-19 13:40:42 +03:00
$EndMODULE 1206
2010-08-19 16:51:56 +03:00
$MODULE SOT23-5
Po 61220 48622 900 15 451B82FA 4C6D2BAF ~~
Li SOT23-5
Cd SOT23-5
Sc 4C6D2BAF
AR /4C69ED5F/4C6D2AA5
Op 0 0 0
At SMD
T0 0 -150 300 250 900 50 N V 21 N"U11"
T1 0 150 300 250 900 50 N I 21 N"A7108"
DS 600 -350 600 350 50 21
DS 600 350 -600 350 50 21
DS -600 350 -600 -350 50 21
DS -600 -350 600 -350 50 21
$PAD
Sh "1" R 200 300 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 247 "N-000436"
Po -375 500
$EndPAD
$PAD
Sh "3" R 200 300 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 249 "N-000447"
Po 375 500
$EndPAD
$PAD
Sh "5" R 200 300 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 248 "N-000437"
Po -375 -500
$EndPAD
$PAD
Sh "2" R 200 300 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 0 500
$EndPAD
$PAD
Sh "4" R 200 300 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 247 "N-000436"
Po 375 -500
$EndPAD
$SHAPE3D
Na "smd/SOT23_5.wrl"
Sc 0.100000 0.100000 0.100000
Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000
$EndSHAPE3D
$EndMODULE SOT23-5
$MODULE SOT23-5
Po 60827 45866 900 15 451B82FA 4C6D2BB1 ~~
Li SOT23-5
Cd SOT23-5
Sc 4C6D2BB1
AR /4C69ED5F/4C6D2AE0
Op 0 0 0
At SMD
T0 0 -150 300 250 900 50 N V 21 N"U12"
T1 0 150 300 250 900 50 N I 21 N"A7108"
DS 600 -350 600 350 50 21
DS 600 350 -600 350 50 21
DS -600 350 -600 -350 50 21
DS -600 -350 600 -350 50 21
$PAD
Sh "1" R 200 300 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 245 "N-000434"
Po -375 500
$EndPAD
$PAD
Sh "3" R 200 300 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 250 "N-000466"
Po 375 500
$EndPAD
$PAD
Sh "5" R 200 300 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 246 "N-000435"
Po -375 -500
$EndPAD
$PAD
Sh "2" R 200 300 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 0 500
$EndPAD
$PAD
Sh "4" R 200 300 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 245 "N-000434"
Po 375 -500
$EndPAD
$SHAPE3D
Na "smd/SOT23_5.wrl"
Sc 0.100000 0.100000 0.100000
Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000
$EndSHAPE3D
$EndMODULE SOT23-5
$MODULE 0402
Po 63582 49213 2700 15 4C5FF890 4C6D30F3 ~~
Li 0402
Sc 4C6D30F3
AR /4C69ED5F/4C6D2C7F
Op 0 0 0
At SMD
T0 0 -150 200 200 2700 40 N V 25 N"C79"
T1 0 150 200 200 2700 40 N I 25 N"22pF"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
$PAD
Sh "1" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 4 "+3.3V"
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 248 "N-000437"
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
Po 62401 49213 900 15 4C5FF890 4C6D30F5 ~~
Li 0402
Sc 4C6D30F5
AR /4C69ED5F/4C6D2DBC
Op 0 0 0
At SMD
T0 0 -150 200 200 900 40 N V 25 N"R25"
T1 0 150 200 200 900 40 N I 25 N"R"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
$PAD
Sh "1" R 157 236 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 248 "N-000437"
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
Po 62992 49213 2700 15 4C5FF890 4C6D30F7 ~~
Li 0402
Sc 4C6D30F7
AR /4C69ED5F/4C6D2DDD
Op 0 0 0
At SMD
T0 0 -150 200 200 2700 40 N V 25 N"R26"
T1 0 150 200 200 2700 40 N I 25 N"R"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
$PAD
Sh "1" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 4 "+3.3V"
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 248 "N-000437"
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
Po 65945 48622 2700 15 4C5FF890 4C6D30F9 ~~
Li 0402
Sc 4C6D30F9
AR /4C69ED5F/4C6D2F0B
Op 0 0 0
At SMD
T0 0 -150 200 200 2700 40 N V 25 N"C81"
T1 0 150 200 200 2700 40 N I 25 N"100nF"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
$PAD
Sh "1" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 4 "+3.3V"
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
Po 64961 45669 2700 15 4C5FF890 4C6D30FB ~~
Li 0402
Sc 4C6D30FB
AR /4C69ED5F/4C6D2FD0
Op 0 0 0
At SMD
T0 0 -150 200 200 2700 40 N V 25 N"C85"
T1 0 150 200 200 2700 40 N I 25 N"100nF"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
$PAD
Sh "1" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 1 "+1.2V"
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
Po 63189 46457 900 15 4C5FF890 4C6D30FD ~~
Li 0402
Sc 4C6D30FD
AR /4C69ED5F/4C6D2FD2
Op 0 0 0
At SMD
T0 0 -150 200 200 900 40 N V 25 N"R28"
T1 0 150 200 200 900 40 N I 25 N"R"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
$PAD
Sh "1" R 157 236 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 1 "+1.2V"
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 246 "N-000435"
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
Po 62008 46457 2700 15 4C5FF890 4C6D30FF ~~
Li 0402
Sc 4C6D30FF
AR /4C69ED5F/4C6D2FD3
Op 0 0 0
At SMD
T0 0 -150 200 200 2700 40 N V 21 N"R27"
T1 0 150 200 200 2700 40 N I 21 N"R"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
$PAD
Sh "1" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 246 "N-000435"
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0402
Po 62598 46457 900 15 4C5FF890 4C6D3101 ~~
Li 0402
Sc 4C6D3101
AR /4C69ED5F/4C6D2FD6
Op 0 0 0
At SMD
T0 0 -150 200 200 900 40 N V 25 N"C83"
T1 0 150 200 200 900 40 N I 25 N"22pF"
DS -305 168 -305 -168 50 21
DS -305 -168 305 -168 50 21
DS 305 -168 305 168 50 21
DS 305 168 -305 168 50 21
$PAD
Sh "1" R 157 236 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 1 "+1.2V"
Po -176 0
$EndPAD
$PAD
Sh "2" R 157 236 0 0 900
Dr 0 0 0
At SMD N 00888000
Ne 246 "N-000435"
Po 176 0
$EndPAD
$EndMODULE 0402
$MODULE 0805
Po 60039 48622 2700 15 4C5FF890 4C6D3102 ~~
Li 0805
Sc 4C6D3102
AR /4C69ED5F/4C6D2C7C
Op 0 0 0
At SMD
T0 0 -150 200 200 2700 40 N V 25 N"C78"
T1 0 150 200 200 2700 40 N I 25 N"4.7uF"
DS -561 305 -561 -305 50 21
DS -561 -305 561 -305 50 21
DS 561 -305 561 305 50 21
DS 561 305 -561 305 50 21
$PAD
Sh "1" R 275 510 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 247 "N-000436"
Po -373 0
$EndPAD
$PAD
Sh "2" R 275 510 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 373 0
$EndPAD
$EndMODULE 0805
$MODULE 0805
Po 59646 45866 2700 15 4C5FF890 4C6D3104 ~~
Li 0805
Sc 4C6D3104
AR /4C69ED5F/4C6D2FD7
Op 0 0 0
At SMD
T0 0 -150 200 200 2700 40 N V 25 N"C82"
T1 0 150 200 200 2700 40 N I 25 N"4.7uF"
DS -561 305 -561 -305 50 21
DS -561 -305 561 -305 50 21
DS 561 -305 561 305 50 21
DS 561 305 -561 305 50 21
$PAD
Sh "1" R 275 510 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 245 "N-000434"
Po -373 0
$EndPAD
$PAD
Sh "2" R 275 510 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 373 0
$EndPAD
$EndMODULE 0805
$MODULE 1206
Po 64763 48622 2700 15 4C5FF890 4C6D3105 ~~
Li 1206
Sc 4C6D3105
AR /4C69ED5F/4C6D2C83
Op 0 0 0
At SMD
T0 0 -150 200 200 2700 40 N V 25 N"C80"
T1 0 150 200 200 2700 40 N I 25 N"10uF"
DS -798 384 -798 -384 50 21
DS -798 -384 798 -384 50 21
DS 798 -384 798 384 50 21
DS 798 384 -798 384 50 21
$PAD
Sh "1" R 355 668 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 4 "+3.3V"
Po -570 0
$EndPAD
$PAD
Sh "2" R 355 668 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 570 0
$EndPAD
$EndMODULE 1206
$MODULE 1206
Po 64173 45669 2700 15 4C5FF890 4C6D3107 ~~
Li 1206
Sc 4C6D3107
AR /4C69ED5F/4C6D2FD5
Op 0 0 0
At SMD
T0 0 -150 200 200 2700 40 N V 25 N"C84"
T1 0 150 200 200 2700 40 N I 25 N"10uF"
DS -798 384 -798 -384 50 21
DS -798 -384 798 -384 50 21
DS 798 -384 798 384 50 21
DS 798 384 -798 384 50 21
$PAD
Sh "1" R 355 668 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 1 "+1.2V"
Po -570 0
$EndPAD
$PAD
Sh "2" R 355 668 0 0 2700
Dr 0 0 0
At SMD N 00888000
Ne 224 "GND"
Po 570 0
$EndPAD
$EndMODULE 1206
$MODULE 1210
Po 62993 48031 1800 15 4C5FF890 4C6D3108 ~~
Li 1210
Sc 4C6D3108
AR /4C69ED5F/4C6D2E6A
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"L8"
T1 0 150 200 200 1800 40 N I 25 N"2.2uH"
DS -798 542 -798 -542 50 21
DS -798 -542 798 -542 50 21
DS 798 -542 798 542 50 21
DS 798 542 -798 542 50 21
$PAD
Sh "1" R 355 984 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 4 "+3.3V"
Po -570 0
$EndPAD
$PAD
Sh "2" R 355 984 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 249 "N-000447"
Po 570 0
$EndPAD
$EndMODULE 1210
$MODULE 1210
Po 62598 45079 1800 15 4C5FF890 4C6D310A ~~
Li 1210
Sc 4C6D310A
AR /4C69ED5F/4C6D2FD1
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"L9"
T1 0 150 200 200 1800 40 N I 25 N"2.2uH"
DS -798 542 -798 -542 50 21
DS -798 -542 798 -542 50 21
DS 798 -542 798 542 50 21
DS 798 542 -798 542 50 21
$PAD
Sh "1" R 355 984 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 1 "+1.2V"
Po -570 0
$EndPAD
$PAD
Sh "2" R 355 984 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 250 "N-000466"
Po 570 0
$EndPAD
$EndMODULE 1210
$COTATION
Ge 0 25 0
Va 35827
Te "91.001 mm"
Po 42274 32677 600 800 120 2700 1
Sb 0 42914 14764 42914 50591 120
Sd 0 43701 50591 41634 50591 120
Sg 0 43701 14764 41634 14764 120
S1 0 42914 50591 42684 50148 120
S2 0 42914 50591 43144 50148 120
S3 0 42914 14764 42684 15207 120
S4 0 42914 14764 43144 15207 120
$endCOTATION
$COTATION
Ge 0 25 0
Va 21851
Te "55.502 mm"
Po 56397 42520 600 800 120 0 1
Sb 0 45472 42520 67323 42520 120
Sd 0 67323 42520 67323 42520 120
Sg 0 45472 42520 45472 42520 120
S1 0 67323 42520 66880 42750 120
S2 0 67323 42520 66880 42290 120
S3 0 45472 42520 45915 42750 120
S4 0 45472 42520 45915 42290 120
$endCOTATION
$DRAWSEGMENT
Po 0 45276 14764 45472 14764 150
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 45276 50591 45276 14764 150
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 66929 50591 45276 50591 150
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 67127 14765 67127 50592 150
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 45474 14765 67127 14765 150
De 28 0 900 0 0
$EndDRAWSEGMENT
$TRACK
Po 0 53317 30639 53317 30443 39 -1
De 15 0 4 0 800
Po 0 53317 30443 53319 30441 39 -1
De 15 0 4 0 0
Po 0 50995 31576 50656 31576 39 -1
De 15 0 6 0 800
Po 0 50534 31695 50177 31695 39 -1
De 0 0 6 0 400
Po 0 50646 31583 50534 31695 39 -1
De 0 0 6 0 0
Po 3 50646 31583 50646 31583 157 -1
De 15 1 6 0 0
Po 0 50649 31583 50646 31583 39 -1
De 15 0 6 0 0
Po 0 50656 31576 50649 31583 39 -1
De 15 0 6 0 0
Po 0 51858 33439 52896 33439 39 -1
De 3 0 8 0 0
Po 0 51677 33439 51858 33439 39 -1
De 3 0 8 0 0
Po 3 53126 33209 53126 33209 157 -1
De 15 1 8 0 0
Po 0 53126 33209 53317 33018 39 -1
De 15 0 8 0 0
Po 0 53317 33018 53317 33001 39 -1
De 15 0 8 0 400
Po 0 52896 33439 53126 33209 39 -1
De 3 0 8 0 0
Po 0 51551 33439 51568 33439 39 -1
De 3 0 8 0 0
Po 0 51568 33439 51618 33489 39 -1
De 3 0 8 0 0
Po 0 51677 33439 51668 33439 39 -1
De 3 0 8 0 0
Po 0 51668 33439 51618 33489 39 -1
De 3 0 8 0 0
Po 0 51618 33439 51618 33489 39 -1
De 3 0 8 0 0
Po 0 51618 33489 51618 33543 39 -1
De 3 0 8 0 0
Po 0 51568 33593 51370 33593 39 -1
De 0 0 8 0 400
Po 0 51598 33563 51568 33593 39 -1
De 0 0 8 0 0
Po 3 51598 33563 51598 33563 157 -1
De 15 1 8 0 0
Po 0 51618 33543 51598 33563 39 -1
De 3 0 8 0 0
Po 0 46643 33623 46922 33623 39 -1
De 15 0 8 0 800
Po 0 47112 33439 51551 33439 39 -1
De 3 0 8 0 0
Po 0 51551 33439 51618 33439 39 -1
De 3 0 8 0 0
Po 0 51618 33439 51677 33439 39 -1
De 3 0 8 0 0
Po 0 46925 33626 47112 33439 39 -1
De 3 0 8 0 0
Po 3 46925 33626 46925 33626 157 -1
De 15 1 8 0 0
Po 0 46922 33623 46925 33626 39 -1
De 15 0 8 0 0
Po 0 51370 33567 51370 33593 39 -1
De 0 0 8 0 400
Po 0 51823 33358 52591 33358 39 -1
De 3 0 9 0 0
Po 0 52740 33209 52923 33026 39 -1
De 15 0 9 0 0
Po 3 52740 33209 52740 33209 157 -1
De 15 1 9 0 0
Po 0 51658 33358 51823 33358 39 -1
De 3 0 9 0 0
Po 0 52923 33026 52923 33001 39 -1
De 15 0 9 0 400
Po 0 52591 33358 52740 33209 39 -1
De 3 0 9 0 0
Po 0 51610 33264 51610 33310 39 -1
De 3 0 9 0 0
Po 0 51610 33310 51658 33358 39 -1
De 3 0 9 0 0
Po 0 51610 33264 51610 33315 39 -1
De 3 0 9 0 0
Po 0 51610 33315 51567 33358 39 -1
De 3 0 9 0 0
Po 0 51614 33358 51614 33268 39 -1
De 3 0 9 0 0
Po 0 51587 33241 51370 33241 39 -1
De 0 0 9 0 400
Po 0 51610 33264 51587 33241 39 -1
De 0 0 9 0 0
Po 3 51610 33264 51610 33264 157 -1
De 15 1 9 0 0
Po 0 51614 33268 51610 33264 39 -1
De 3 0 9 0 0
Po 0 46643 33111 46922 33111 39 -1
De 15 0 9 0 800
Po 0 47169 33358 51567 33358 39 -1
De 3 0 9 0 0
Po 0 46929 33118 47169 33358 39 -1
De 3 0 9 0 0
Po 3 46929 33118 46929 33118 157 -1
De 15 1 9 0 0
Po 0 46922 33111 46929 33118 39 -1
De 15 0 9 0 0
Po 0 51567 33358 51614 33358 39 -1
De 3 0 9 0 0
Po 0 51614 33358 51658 33358 39 -1
De 3 0 9 0 0
Po 0 47062 26960 47560 26960 39 -1
De 15 0 38 0 800
Po 0 53317 29917 53317 30245 39 -1
De 15 0 38 0 400
Po 0 53300 29900 53317 29917 39 -1
De 15 0 38 0 0
Po 3 53300 29900 53300 29900 157 -1
De 15 1 38 0 0
Po 0 52800 29400 53300 29900 39 -1
De 0 0 38 0 0
Po 0 50000 29400 52800 29400 39 -1
De 0 0 38 0 0
Po 0 48000 27400 50000 29400 39 -1
De 0 0 38 0 0
Po 3 48000 27400 48000 27400 157 -1
De 15 1 38 0 0
Po 0 47560 26960 48000 27400 39 -1
De 15 0 38 0 0
Po 0 49855 24130 49846 24130 79 -1
De 0 0 40 0 800
Po 0 49846 24130 49764 24212 79 -1
De 0 0 40 0 0
Po 0 49560 24659 49560 24421 79 -1
De 15 0 40 0 800
Po 0 49764 24212 49764 24209 79 -1
De 0 0 40 0 0
Po 0 49657 24319 49764 24212 79 -1
De 0 0 40 0 0
Po 3 49657 24319 49657 24319 157 -1
De 15 1 40 0 0
Po 0 49657 24324 49657 24319 79 -1
De 15 0 40 0 0
Po 0 49560 24421 49657 24324 79 -1
De 15 0 40 0 0
Po 0 49363 24659 49363 24340 79 -1
De 15 0 41 0 800
Po 0 49294 24271 49294 24138 79 -1
De 0 0 41 0 400
Po 0 49354 24331 49294 24271 79 -1
De 0 0 41 0 0
Po 3 49354 24331 49354 24331 157 -1
De 15 1 41 0 0
Po 0 49363 24340 49354 24331 79 -1
De 15 0 41 0 0
2010-08-19 13:40:42 +03:00
Po 0 54104 30245 54104 29953 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 44 0 800
2010-08-19 13:40:42 +03:00
Po 0 53486 29335 52384 29335 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 44 0 0
2010-08-19 13:40:42 +03:00
Po 0 54104 29953 53486 29335 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 44 0 0
Po 0 54104 30639 54104 30635 39 -1
De 15 0 45 0 800
Po 0 53445 29436 52384 29436 39 -1
De 15 0 45 0 0
Po 0 53909 29900 53445 29436 39 -1
De 15 0 45 0 0
Po 0 53909 30440 53909 29900 39 -1
De 15 0 45 0 0
Po 0 54104 30635 53909 30440 39 -1
De 15 0 45 0 0
Po 0 47996 28193 47996 27894 39 -1
De 15 0 47 0 0
Po 0 54092 31426 53906 31240 39 -1
De 15 0 47 0 0
Po 0 53906 31240 53614 31240 39 -1
De 15 0 47 0 0
Po 0 53614 31240 53516 31142 39 -1
De 15 0 47 0 0
Po 0 53516 31142 53516 31008 39 -1
De 15 0 47 0 0
Po 0 53516 31008 53378 30870 39 -1
De 15 0 47 0 0
Po 0 53378 30870 53323 30870 39 -1
De 15 0 47 0 0
Po 0 53323 30870 53157 30704 39 -1
De 15 0 47 0 0
Po 0 53157 30704 53157 29996 39 -1
De 15 0 47 0 0
Po 0 53157 29996 52921 29760 39 -1
De 15 0 47 0 0
Po 0 52921 29760 50996 29760 39 -1
De 15 0 47 0 0
Po 0 50996 29760 50189 28953 39 -1
De 15 0 47 0 0
Po 0 50189 28953 48756 28953 39 -1
De 15 0 47 0 0
Po 0 48756 28953 47996 28193 39 -1
De 15 0 47 0 0
Po 0 54104 31426 54092 31426 39 -1
De 15 0 47 0 800
Po 0 47996 27894 47987 27885 39 -1
De 15 0 47 0 400
2010-08-19 13:40:42 +03:00
Po 0 53527 29234 53131 29234 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 48 0 0
2010-08-19 13:40:42 +03:00
Po 0 54498 31025 54303 30830 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 48 0 0
2010-08-19 13:40:42 +03:00
Po 0 54303 30830 54303 30010 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 48 0 0
2010-08-19 13:40:42 +03:00
Po 0 54303 30010 53527 29234 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 48 0 0
2010-08-19 13:40:42 +03:00
Po 0 54498 31032 54498 31025 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 48 0 800
2010-08-19 13:40:42 +03:00
Po 0 49166 27692 49166 27885 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 48 0 400
2010-08-19 13:40:42 +03:00
Po 0 49350 27508 49166 27692 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 48 0 0
2010-08-19 13:40:42 +03:00
Po 0 51405 27508 49350 27508 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 48 0 0
2010-08-19 13:40:42 +03:00
Po 0 53131 29234 51405 27508 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 48 0 0
2010-08-19 13:40:42 +03:00
Po 0 54892 30245 54867 30245 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 51 0 800
2010-08-19 13:40:42 +03:00
Po 0 50944 26763 50288 26763 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 51 0 400
2010-08-19 13:40:42 +03:00
Po 0 53213 29032 50944 26763 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 51 0 0
2010-08-19 13:40:42 +03:00
Po 0 53654 29032 53213 29032 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 51 0 0
2010-08-19 13:40:42 +03:00
Po 0 54867 30245 53654 29032 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 51 0 0
Po 0 53613 29133 53172 29133 39 -1
De 15 0 52 0 0
Po 0 54875 30639 54689 30453 39 -1
De 15 0 52 0 0
Po 0 54689 30453 54689 30209 39 -1
De 15 0 52 0 0
Po 0 54689 30209 53613 29133 39 -1
De 15 0 52 0 0
Po 0 54892 30639 54875 30639 39 -1
De 15 0 52 0 800
Po 0 51196 27157 50288 27157 39 -1
De 15 0 52 0 400
Po 0 53172 29133 51196 27157 39 -1
De 15 0 52 0 0
Po 0 55679 30639 55666 30639 39 -1
De 15 0 53 0 800
Po 0 55469 30198 55270 29999 39 -1
De 0 0 53 0 0
Po 0 55469 30438 55469 30198 39 -1
De 0 0 53 0 0
Po 0 55472 30441 55469 30438 39 -1
De 0 0 53 0 0
Po 3 55472 30441 55472 30441 157 -1
De 15 1 53 0 0
Po 0 55472 30445 55472 30441 39 -1
De 15 0 53 0 0
Po 0 55666 30639 55472 30445 39 -1
De 15 0 53 0 0
Po 0 49757 24659 49757 24895 39 -1
De 15 0 54 0 800
Po 0 55679 30179 55679 30245 39 -1
De 15 0 54 0 400
Po 0 55504 30004 55679 30179 39 -1
De 15 0 54 0 0
Po 3 55504 30004 55504 30004 157 -1
De 15 1 54 0 0
Po 0 55477 30004 55504 30004 39 -1
De 0 0 54 0 0
Po 0 55371 29898 55477 30004 39 -1
De 0 0 54 0 0
Po 0 53878 29898 55371 29898 39 -1
De 0 0 54 0 0
Po 0 52890 28910 53878 29898 39 -1
De 0 0 54 0 0
Po 0 52890 28028 52890 28910 39 -1
De 0 0 54 0 0
Po 0 49909 25047 52890 28028 39 -1
De 0 0 54 0 0
Po 3 49909 25047 49909 25047 157 -1
De 15 1 54 0 0
Po 0 49757 24895 49909 25047 39 -1
De 15 0 54 0 0
Po 0 53711 31032 53682 31032 39 -1
De 15 0 55 0 800
Po 0 53363 29638 51094 29638 39 -1
De 15 0 55 0 0
Po 0 53516 29791 53363 29638 39 -1
De 15 0 55 0 0
Po 0 53516 30866 53516 29791 39 -1
De 15 0 55 0 0
Po 0 53682 31032 53516 30866 39 -1
De 15 0 55 0 0
Po 0 53711 30245 53711 29844 39 -1
De 15 0 56 0 800
Po 0 53404 29537 52384 29537 39 -1
De 15 0 56 0 0
Po 0 53711 29844 53404 29537 39 -1
De 15 0 56 0 0
Po 0 55286 31426 55281 31426 39 -1
De 15 0 59 0 800
Po 0 54898 31043 54898 30906 39 -1
De 3 0 59 0 0
Po 0 55091 31236 54898 31043 39 -1
De 3 0 59 0 0
Po 3 55091 31236 55091 31236 157 -1
De 15 1 59 0 0
Po 0 55281 31426 55091 31236 39 -1
De 15 0 59 0 0
Po 0 55286 31032 55284 31032 39 -1
De 15 0 60 0 800
Po 0 55079 30827 55079 30457 39 -1
De 0 0 60 0 0
Po 0 55083 30831 55079 30827 39 -1
De 0 0 60 0 0
Po 3 55083 30831 55083 30831 157 -1
De 15 1 60 0 0
Po 0 55284 31032 55083 30831 39 -1
De 15 0 60 0 0
Po 0 55286 30245 55285 30245 39 -1
De 15 0 61 0 800
Po 0 50599 25977 50288 25977 39 -1
De 15 0 61 0 400
Po 0 50606 25984 50599 25977 39 -1
De 15 0 61 0 0
Po 3 50606 25984 50606 25984 157 -1
De 15 1 61 0 0
Po 0 50700 25984 50606 25984 39 -1
De 0 0 61 0 0
Po 0 52789 28073 50700 25984 39 -1
De 0 0 61 0 0
Po 0 52789 28951 52789 28073 39 -1
De 0 0 61 0 0
Po 0 53838 30000 52789 28951 39 -1
De 0 0 61 0 0
Po 0 55043 30000 53838 30000 39 -1
De 0 0 61 0 0
Po 0 55106 30063 55043 30000 39 -1
De 0 0 61 0 0
Po 3 55106 30063 55106 30063 157 -1
De 15 1 61 0 0
Po 0 55106 30066 55106 30063 39 -1
De 15 0 61 0 0
Po 0 55285 30245 55106 30066 39 -1
De 15 0 61 0 0
2010-08-19 04:15:48 +03:00
Po 0 50995 31320 50649 31320 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 62 0 800
2010-08-19 04:15:48 +03:00
Po 0 50471 31498 50177 31498 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 62 0 400
2010-08-19 04:15:48 +03:00
Po 0 50646 31323 50471 31498 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 62 0 0
2010-08-19 06:09:52 +03:00
Po 3 50646 31323 50646 31323 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 62 0 0
2010-08-19 04:15:48 +03:00
Po 0 50649 31320 50646 31323 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 62 0 0
Po 0 50995 31064 50651 31064 39 -1
De 15 0 66 0 800
Po 0 50395 31302 50177 31302 39 -1
De 0 0 66 0 400
Po 0 50642 31055 50395 31302 39 -1
De 0 0 66 0 0
Po 3 50642 31055 50642 31055 157 -1
De 15 1 66 0 0
Po 0 50651 31064 50642 31055 39 -1
De 15 0 66 0 0
2010-08-19 04:15:48 +03:00
Po 0 50995 30808 50525 30808 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 67 0 800
2010-08-19 04:15:48 +03:00
Po 0 50218 31105 50177 31105 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 67 0 400
2010-08-19 04:15:48 +03:00
Po 0 50520 30803 50218 31105 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 67 0 0
2010-08-19 06:09:52 +03:00
Po 3 50520 30803 50520 30803 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 67 0 0
2010-08-19 04:15:48 +03:00
Po 0 50525 30808 50520 30803 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 67 0 0
2010-08-19 13:40:42 +03:00
Po 0 60008 38117 60008 38118 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 121 0 800
2010-08-19 13:40:42 +03:00
Po 0 59566 40315 59566 40482 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 121 0 400
2010-08-19 13:40:42 +03:00
Po 0 59598 40283 59566 40315 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 121 0 0
2010-08-19 13:40:42 +03:00
Po 3 59598 40283 59598 40283 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 121 0 0
2010-08-19 13:40:42 +03:00
Po 0 59760 40121 59598 40283 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 121 0 0
2010-08-19 13:40:42 +03:00
Po 0 59760 38366 59760 40121 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 121 0 0
2010-08-19 13:40:42 +03:00
Po 0 59827 38299 59760 38366 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 121 0 0
2010-08-19 13:40:42 +03:00
Po 3 59827 38299 59827 38299 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 121 0 0
2010-08-19 13:40:42 +03:00
Po 0 60008 38118 59827 38299 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 121 0 0
2010-08-19 13:40:42 +03:00
Po 0 53711 36149 53712 36149 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 122 0 800
2010-08-19 13:40:42 +03:00
Po 0 57317 39482 57466 39482 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 122 0 400
2010-08-19 13:40:42 +03:00
Po 0 57189 39354 57317 39482 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 122 0 0
2010-08-19 13:40:42 +03:00
Po 3 57189 39354 57189 39354 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 122 0 0
2010-08-19 13:40:42 +03:00
Po 0 56858 39023 57189 39354 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 122 0 0
2010-08-19 13:40:42 +03:00
Po 0 56858 36539 56858 39023 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 122 0 0
2010-08-19 13:40:42 +03:00
Po 0 56697 36378 56858 36539 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 122 0 0
2010-08-19 13:40:42 +03:00
Po 0 53941 36378 56697 36378 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 122 0 0
2010-08-19 13:40:42 +03:00
Po 0 53894 36331 53941 36378 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 122 0 0
2010-08-19 13:40:42 +03:00
Po 3 53894 36331 53894 36331 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 122 0 0
2010-08-19 13:40:42 +03:00
Po 0 53712 36149 53894 36331 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 122 0 0
2010-08-19 13:40:42 +03:00
Po 0 59795 40854 59843 40854 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 123 0 0
2010-08-19 13:40:42 +03:00
Po 0 59566 40982 59694 40854 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 123 0 800
2010-08-19 13:40:42 +03:00
Po 0 59795 40854 59694 40854 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 123 0 0
2010-08-19 13:40:42 +03:00
Po 0 59615 39032 59615 38511 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 123 0 400
2010-08-19 13:40:42 +03:00
Po 0 59894 39311 59615 39032 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 123 0 0
2010-08-19 13:40:42 +03:00
Po 0 59894 40803 59894 39311 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 123 0 0
2010-08-19 13:40:42 +03:00
Po 0 59843 40854 59894 40803 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 123 0 0
2010-08-19 13:40:42 +03:00
Po 0 56859 36543 56859 36544 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 126 0 800
2010-08-19 13:40:42 +03:00
Po 0 59281 39982 59566 39982 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 126 0 400
2010-08-19 13:40:42 +03:00
Po 0 59268 39969 59281 39982 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 126 0 0
2010-08-19 13:40:42 +03:00
Po 3 59268 39969 59268 39969 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 126 0 0
2010-08-19 13:40:42 +03:00
Po 0 58387 39969 59268 39969 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 126 0 0
2010-08-19 13:40:42 +03:00
Po 0 57150 38732 58387 39969 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 126 0 0
2010-08-19 13:40:42 +03:00
Po 0 57150 36835 57150 38732 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 126 0 0
2010-08-19 13:40:42 +03:00
Po 0 57043 36728 57150 36835 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 126 0 0
2010-08-19 13:40:42 +03:00
Po 3 57043 36728 57043 36728 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 126 0 0
2010-08-19 13:40:42 +03:00
Po 0 56859 36544 57043 36728 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 126 0 0
2010-08-19 04:15:48 +03:00
Po 0 51583 32799 51128 32799 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 127 0 0
2010-08-19 04:15:48 +03:00
Po 0 51583 32799 52335 32799 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 127 0 0
2010-08-19 04:15:48 +03:00
Po 0 49823 31695 49640 31695 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 127 0 800
2010-08-19 04:15:48 +03:00
Po 0 52530 32994 52530 33001 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 127 0 400
2010-08-19 04:15:48 +03:00
Po 0 52335 32799 52530 32994 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 127 0 0
2010-08-19 06:09:52 +03:00
Po 3 52335 32799 52335 32799 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 127 0 0
2010-08-19 06:09:52 +03:00
Po 3 49638 31693 49638 31693 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 127 0 0
2010-08-19 04:15:48 +03:00
Po 0 49640 31695 49638 31693 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 127 0 0
2010-08-19 04:15:48 +03:00
Po 0 50022 31693 49638 31693 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 127 0 0
2010-08-19 04:15:48 +03:00
Po 0 51128 32799 50022 31693 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 127 0 0
2010-08-19 04:15:48 +03:00
Po 0 49823 31498 49467 31498 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 128 0 800
2010-08-19 04:15:48 +03:00
Po 0 51857 33001 52136 33001 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 128 0 400
2010-08-19 04:15:48 +03:00
Po 0 51854 33004 51857 33001 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 128 0 0
2010-08-19 06:09:52 +03:00
Po 3 51854 33004 51854 33004 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 128 0 0
2010-08-19 04:15:48 +03:00
Po 0 51185 33004 51854 33004 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 128 0 0
2010-08-19 04:15:48 +03:00
Po 0 50063 31882 51185 33004 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 128 0 0
2010-08-19 04:15:48 +03:00
Po 0 49539 31882 50063 31882 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 128 0 0
2010-08-19 04:15:48 +03:00
Po 0 49413 31756 49539 31882 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 128 0 0
2010-08-19 04:15:48 +03:00
Po 0 49413 31552 49413 31756 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 128 0 0
2010-08-19 04:15:48 +03:00
Po 0 49469 31496 49413 31552 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 128 0 0
2010-08-19 06:09:52 +03:00
Po 3 49469 31496 49469 31496 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 128 0 0
2010-08-19 04:15:48 +03:00
Po 0 49467 31498 49469 31496 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 128 0 0
2010-08-19 04:15:48 +03:00
Po 0 49673 31177 49708 31177 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 49449 31221 49493 31177 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 49493 31177 49673 31177 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 49823 31302 49515 31302 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 132 0 800
2010-08-19 06:09:52 +03:00
Po 3 49449 31236 49449 31236 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 49515 31302 49449 31236 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 49449 31236 49449 31221 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 53327 32598 53520 32791 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 51129 32598 53327 32598 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 49708 31177 51129 32598 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 53524 32787 53520 32791 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 132 0 0
2010-08-19 06:09:52 +03:00
Po 3 53520 32791 53520 32791 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 53520 32791 53711 32982 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 132 0 0
2010-08-19 04:15:48 +03:00
Po 0 53711 33001 53711 32982 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 132 0 800
2010-08-19 04:15:48 +03:00
Po 0 49823 31105 49676 31105 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 133 0 800
2010-08-19 04:15:48 +03:00
Po 0 54084 33788 54104 33788 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 133 0 400
2010-08-19 04:15:48 +03:00
Po 0 53894 33598 54084 33788 39 -1
2010-08-19 16:51:56 +03:00
De 15 0 133 0 0
2010-08-19 06:09:52 +03:00
Po 3 53894 33598 53894 33598 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 133 0 0
2010-08-19 04:15:48 +03:00
Po 0 53894 32819 53894 33598 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 133 0 0
2010-08-19 04:15:48 +03:00
Po 0 53343 32268 53894 32819 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 133 0 0
2010-08-19 04:15:48 +03:00
Po 0 50980 32268 53343 32268 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 133 0 0
2010-08-19 04:15:48 +03:00
Po 0 49653 30941 50980 32268 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 133 0 0
2010-08-19 04:15:48 +03:00
Po 0 49622 30941 49653 30941 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 133 0 0
2010-08-19 04:15:48 +03:00
Po 0 49567 30996 49622 30941 39 -1
2010-08-19 16:51:56 +03:00
De 3 0 133 0 0
2010-08-19 06:09:52 +03:00
Po 3 49567 30996 49567 30996 157 -1
2010-08-19 16:51:56 +03:00
De 15 1 133 0 0
2010-08-19 04:15:48 +03:00
Po 0 49676 31105 49567 30996 39 -1
2010-08-19 16:51:56 +03:00
De 0 0 133 0 0
2010-07-24 14:58:53 +03:00
$EndTRACK
$ZONE
$EndZONE
$EndBOARD